- for (i=0; i<h; i++) {
- __asm__ volatile (
- "daddiu $6, $0, 32 \r\n"
- "ldl $2, %2 \r\n"
- "ldr $2, %1 \r\n"
- "ldl $3, %4 \r\n"
- "ldr $3, %3 \r\n"
- "mtc1 $6, $f14 \r\n"
- "mtc1 %5, $f6 \r\n"
- "mtc1 %6, $f8 \r\n"
- "mtc1 $0, $f20 \r\n"
- "mtc1 $2, $f2 \r\n"
- "mtc1 $3, $f4 \r\n"
- "daddiu $6, $0, 6 \r\n"
- "punpcklbh $f2, $f2, $f20 \r\n"
- "punpcklbh $f4, $f4, $f20 \r\n"
- "pshufh $f6, $f6, $f20 \r\n"
- "pshufh $f8, $f8, $f20 \r\n"
- "pshufh $f14, $f14, $f20 \r\n"
- "mtc1 $6, $f22 \r\n"
- "dsrl32 $2, $2, 0 \r\n"
- "dsrl32 $3, $3, 0 \r\n"
- "pmullh $f2, $f2, $f6 \r\n"
- "pmullh $f4, $f4, $f8 \r\n"
- "paddh $f2, $f2, $f14 \r\n"
- "paddh $f2, $f2, $f4 \r\n"
- "psrah $f24, $f2, $f22 \r\n"
- "mtc1 $2, $f2 \r\n"
- "mtc1 $3, $f4 \r\n"
- "punpcklbh $f2, $f2, $f20 \r\n"
- "punpcklbh $f4, $f4, $f20 \r\n"
- "pmullh $f2, $f2, $f6 \r\n"
- "pmullh $f4, $f4, $f8 \r\n"
- "paddh $f2, $f2, $f14 \r\n"
- "paddh $f2, $f2, $f4 \r\n"
- "psrah $f2, $f2, $f22 \r\n"
- "packushb $f2, $f24, $f2 \r\n"
- "ldc1 $f4, %0 \r\n"
- "pavgb $f2, $f2, $f4 \r\n"
- "sdc1 $f2, %0 \r\n"
- : "=m"(*dst)
- : "m"(*(src)),"m"(*(src+7)),
- "m"(*(src+step)),"m"(*(src+step+7)),"r"(A),"r"(E)
- : "$2","$3","$4","$5","$6"
- );
-
- dst += stride;
- src += stride;
- }
+ __asm__ volatile (
+ "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
+ "dli %[tmp0], 0x06 \n\t"
+ "pshufh %[A], %[A], %[ftmp0] \n\t"
+ "pshufh %[E], %[E], %[ftmp0] \n\t"
+ "mtc1 %[tmp0], %[ftmp7] \n\t"
+ "1: \n\t"
+ PTR_ADDU "%[addr0], %[src], %[step] \n\t"
+ "gsldlc1 %[ftmp1], 0x07(%[src]) \n\t"
+ "gsldrc1 %[ftmp1], 0x00(%[src]) \n\t"
+ "gsldlc1 %[ftmp2], 0x07(%[addr0]) \n\t"
+ "gsldrc1 %[ftmp2], 0x00(%[addr0]) \n\t"
+
+ "punpcklbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t"
+ "punpckhbh %[ftmp4], %[ftmp1], %[ftmp0] \n\t"
+ "punpcklbh %[ftmp5], %[ftmp2], %[ftmp0] \n\t"
+ "punpckhbh %[ftmp6], %[ftmp2], %[ftmp0] \n\t"
+ "pmullh %[ftmp3], %[ftmp3], %[A] \n\t"
+ "pmullh %[ftmp5], %[ftmp5], %[E] \n\t"
+ "paddh %[ftmp1], %[ftmp3], %[ftmp5] \n\t"
+ "pmullh %[ftmp4], %[ftmp4], %[A] \n\t"
+ "pmullh %[ftmp6], %[ftmp6], %[E] \n\t"
+ "paddh %[ftmp2], %[ftmp4], %[ftmp6] \n\t"
+
+ "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t"
+ "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t"
+ "psrlh %[ftmp1], %[ftmp1], %[ftmp7] \n\t"
+ "psrlh %[ftmp2], %[ftmp2], %[ftmp7] \n\t"
+ "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ "ldc1 %[ftmp2], 0x00(%[dst]) \n\t"
+ "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ "addi %[h], %[h], -0x01 \n\t"
+ "sdc1 %[ftmp1], 0x00(%[dst]) \n\t"
+ PTR_ADDU "%[src], %[src], %[stride] \n\t"
+ PTR_ADDU "%[dst], %[dst], %[stride] \n\t"
+ "bnez %[h], 1b \n\t"
+ : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
+ [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
+ [ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
+ [ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
+ [tmp0]"=&r"(tmp[0]),
+ [addr0]"=&r"(addr[0]),
+ [dst]"+&r"(dst), [src]"+&r"(src),
+ [h]"+&r"(h)
+ : [stride]"r"((mips_reg)stride),[step]"r"((mips_reg)step),
+ [ff_pw_32]"f"(ff_pw_32),
+ [A]"f"(A), [E]"f"(E)
+ : "memory"
+ );
+ } else {
+ __asm__ volatile (
+ "xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
+ "dli %[tmp0], 0x06 \n\t"
+ "pshufh %[A], %[A], %[ftmp0] \n\t"
+ "mtc1 %[tmp0], %[ftmp4] \n\t"
+ "1: \n\t"
+ "gsldlc1 %[ftmp1], 0x07(%[src]) \n\t"
+ "gsldrc1 %[ftmp1], 0x00(%[src]) \n\t"
+ "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t"
+ "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t"
+ "pmullh %[ftmp1], %[ftmp2], %[A] \n\t"
+ "pmullh %[ftmp2], %[ftmp3], %[A] \n\t"
+ "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t"
+ "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t"
+ "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t"
+ "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
+ "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ "ldc1 %[ftmp2], 0x00(%[dst]) \n\t"
+ "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ PTR_ADDU "%[src], %[src], %[stride] \n\t"
+ "sdc1 %[ftmp1], 0x00(%[dst]) \n\t"
+ PTR_ADDU "%[dst], %[dst], %[stride] \n\t"
+
+ "gsldlc1 %[ftmp1], 0x07(%[src]) \n\t"
+ "gsldrc1 %[ftmp1], 0x00(%[src]) \n\t"
+ "punpcklbh %[ftmp2], %[ftmp1], %[ftmp0] \n\t"
+ "punpckhbh %[ftmp3], %[ftmp1], %[ftmp0] \n\t"
+ "pmullh %[ftmp1], %[ftmp2], %[A] \n\t"
+ "pmullh %[ftmp2], %[ftmp3], %[A] \n\t"
+ "paddh %[ftmp1], %[ftmp1], %[ff_pw_32] \n\t"
+ "paddh %[ftmp2], %[ftmp2], %[ff_pw_32] \n\t"
+ "psrlh %[ftmp1], %[ftmp1], %[ftmp4] \n\t"
+ "psrlh %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
+ "packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ "ldc1 %[ftmp2], 0x00(%[dst]) \n\t"
+ "pavgb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
+ "addi %[h], %[h], -0x02 \n\t"
+ "sdc1 %[ftmp1], 0x00(%[dst]) \n\t"
+
+ PTR_ADDU "%[src], %[src], %[stride] \n\t"
+ PTR_ADDU "%[dst], %[dst], %[stride] \n\t"
+ "bnez %[h], 1b \n\t"
+ : [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
+ [ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
+ [ftmp4]"=&f"(ftmp[4]),
+ [tmp0]"=&r"(tmp[0]),
+ [dst]"+&r"(dst), [src]"+&r"(src),
+ [h]"+&r"(h)
+ : [stride]"r"((mips_reg)stride),[ff_pw_32]"f"(ff_pw_32),
+ [A]"f"(A)
+ : "memory"
+ );