]> git.sesse.net Git - x264/blobdiff - common/cpu.c
Minor asm changes
[x264] / common / cpu.c
index 742254cb927567951b79e260306f1210880699db..cfcdfd4f9972973e9c9e5ddecec5638e02df762b 100644 (file)
@@ -1,7 +1,7 @@
 /*****************************************************************************
  * cpu.c: cpu detection
  *****************************************************************************
- * Copyright (C) 2003-2011 x264 project
+ * Copyright (C) 2003-2012 x264 project
  *
  * Authors: Loren Merritt <lorenm@u.washington.edu>
  *          Laurent Aimar <fenrir@via.ecp.fr>
@@ -29,7 +29,7 @@
 #include "common.h"
 #include "cpu.h"
 
-#if HAVE_PTHREAD && SYS_LINUX
+#if HAVE_POSIXTHREAD && SYS_LINUX
 #include <sched.h>
 #endif
 #if SYS_BEOS
 #include <machine/cpu.h>
 #endif
 
-const x264_cpu_name_t x264_cpu_names[] = {
-    {"Altivec", X264_CPU_ALTIVEC},
-//  {"MMX",     X264_CPU_MMX}, // we don't support asm on mmx1 cpus anymore
-    {"MMX2",    X264_CPU_MMX|X264_CPU_MMXEXT},
-    {"MMXEXT",  X264_CPU_MMX|X264_CPU_MMXEXT},
-//  {"SSE",     X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE}, // there are no sse1 functions in x264
-    {"SSE2Slow",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_SLOW},
-    {"SSE2",    X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2},
-    {"SSE2Fast",X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE2_IS_FAST},
-    {"SSE3",    X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3},
-    {"SSSE3",   X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3},
-    {"FastShuffle",   X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SHUFFLE_IS_FAST},
-    {"SSE4.1",  X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
-    {"SSE4.2",  X264_CPU_MMX|X264_CPU_MMXEXT|X264_CPU_SSE|X264_CPU_SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42},
-    {"AVX", X264_CPU_AVX},
-    {"Cache32", X264_CPU_CACHELINE_32},
-    {"Cache64", X264_CPU_CACHELINE_64},
-    {"SSEMisalign", X264_CPU_SSE_MISALIGN},
-    {"LZCNT", X264_CPU_LZCNT},
+const x264_cpu_name_t x264_cpu_names[] =
+{
+    {"Altivec",     X264_CPU_ALTIVEC},
+//  {"MMX",         X264_CPU_MMX}, // we don't support asm on mmx1 cpus anymore
+    {"MMX2",        X264_CPU_MMX|X264_CPU_MMX2},
+    {"MMXEXT",      X264_CPU_MMX|X264_CPU_MMX2},
+//  {"SSE",         X264_CPU_MMX|X264_CPU_MMX2|X264_CPU_SSE}, // there are no sse1 functions in x264
+#define SSE2 X264_CPU_MMX|X264_CPU_MMX2|X264_CPU_SSE|X264_CPU_SSE2
+    {"SSE2Slow",    SSE2|X264_CPU_SSE2_IS_SLOW},
+    {"SSE2",        SSE2},
+    {"SSE2Fast",    SSE2|X264_CPU_SSE2_IS_FAST},
+    {"SSE3",        SSE2|X264_CPU_SSE3},
+    {"SSSE3",       SSE2|X264_CPU_SSE3|X264_CPU_SSSE3},
+    {"FastShuffle", SSE2|X264_CPU_SHUFFLE_IS_FAST},
+    {"SSE4.1",      SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
+    {"SSE4",        SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4},
+    {"SSE4.2",      SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42},
+#define AVX SSE2|X264_CPU_SSE3|X264_CPU_SSSE3|X264_CPU_SSE4|X264_CPU_SSE42|X264_CPU_AVX
+    {"AVX",         AVX},
+    {"XOP",         AVX|X264_CPU_XOP},
+    {"FMA4",        AVX|X264_CPU_FMA4},
+    {"AVX2",        AVX|X264_CPU_AVX2},
+    {"FMA3",        AVX|X264_CPU_FMA3},
+#undef AVX
+#undef SSE2
+    {"Cache32",         X264_CPU_CACHELINE_32},
+    {"Cache64",         X264_CPU_CACHELINE_64},
+    {"SSEMisalign",     X264_CPU_SSE_MISALIGN},
+    {"LZCNT",           X264_CPU_LZCNT},
+    {"BMI1",            X264_CPU_BMI1},
+    {"BMI2",            X264_CPU_BMI1|X264_CPU_BMI2},
+    {"TBM",             X264_CPU_TBM},
     {"Slow_mod4_stack", X264_CPU_STACK_MOD4},
-    {"ARMv6", X264_CPU_ARMV6},
-    {"NEON",  X264_CPU_NEON},
-    {"Fast_NEON_MRC",  X264_CPU_FAST_NEON_MRC},
-    {"SlowCTZ", X264_CPU_SLOW_CTZ},
-    {"SlowAtom", X264_CPU_SLOW_ATOM},
+    {"ARMv6",           X264_CPU_ARMV6},
+    {"NEON",            X264_CPU_NEON},
+    {"Fast_NEON_MRC",   X264_CPU_FAST_NEON_MRC},
+    {"SlowCTZ",         X264_CPU_SLOW_CTZ},
+    {"SlowAtom",        X264_CPU_SLOW_ATOM},
     {"", 0},
 };
 
@@ -94,14 +107,15 @@ static void sigill_handler( int sig )
 
 #if HAVE_MMX
 int x264_cpu_cpuid_test( void );
-uint32_t x264_cpu_cpuid( uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx );
+void x264_cpu_cpuid( uint32_t op, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx );
+void x264_cpu_xgetbv( uint32_t op, uint32_t *eax, uint32_t *edx );
 
 uint32_t x264_cpu_detect( void )
 {
     uint32_t cpu = 0;
     uint32_t eax, ebx, ecx, edx;
     uint32_t vendor[4] = {0};
-    int max_extended_cap;
+    uint32_t max_extended_cap;
     int cache;
 
 #if !ARCH_X86_64
@@ -119,7 +133,7 @@ uint32_t x264_cpu_detect( void )
     else
         return 0;
     if( edx&0x02000000 )
-        cpu |= X264_CPU_MMXEXT|X264_CPU_SSE;
+        cpu |= X264_CPU_MMX2|X264_CPU_SSE;
     if( edx&0x04000000 )
         cpu |= X264_CPU_SSE2;
     if( ecx&0x00000001 )
@@ -130,8 +144,29 @@ uint32_t x264_cpu_detect( void )
         cpu |= X264_CPU_SSE4;
     if( ecx&0x00100000 )
         cpu |= X264_CPU_SSE42;
-    if( ecx&0x10000000 )
-        cpu |= X264_CPU_AVX;
+    /* Check OXSAVE and AVX bits */
+    if( (ecx&0x18000000) == 0x18000000 )
+    {
+        /* Check for OS support */
+        x264_cpu_xgetbv( 0, &eax, &edx );
+        if( (eax&0x6) == 0x6 )
+        {
+            cpu |= X264_CPU_AVX;
+            if( ecx&0x00001000 )
+                cpu |= X264_CPU_FMA3;
+        }
+    }
+
+    x264_cpu_cpuid( 7, &eax, &ebx, &ecx, &edx );
+    /* AVX2 requires OS support, but BMI1/2 don't. */
+    if( (cpu&X264_CPU_AVX) && (ebx&0x00000020) )
+        cpu |= X264_CPU_AVX2;
+    if( ebx&0x00000008 )
+    {
+        cpu |= X264_CPU_BMI1;
+        if( ebx&0x00000100 )
+            cpu |= X264_CPU_BMI2;
+    }
 
     if( cpu & X264_CPU_SSSE3 )
         cpu |= X264_CPU_SSE2_IS_FAST;
@@ -146,7 +181,7 @@ uint32_t x264_cpu_detect( void )
         cpu |= X264_CPU_SLOW_CTZ;
         x264_cpu_cpuid( 0x80000001, &eax, &ebx, &ecx, &edx );
         if( edx&0x00400000 )
-            cpu |= X264_CPU_MMXEXT;
+            cpu |= X264_CPU_MMX2;
         if( cpu & X264_CPU_SSE2 )
         {
             if( ecx&0x00000040 ) /* SSE4a */
@@ -164,6 +199,17 @@ uint32_t x264_cpu_detect( void )
                 cpu |= X264_CPU_SSE_MISALIGN;
                 x264_cpu_mask_misalign_sse();
             }
+
+            if( cpu & X264_CPU_AVX )
+            {
+                if( ecx&0x00000800 ) /* XOP */
+                    cpu |= X264_CPU_XOP;
+                if( ecx&0x00010000 ) /* FMA4 */
+                    cpu |= X264_CPU_FMA4;
+            }
+
+            if( ecx&0x00200000 )
+                cpu |= X264_CPU_TBM;
         }
     }
 
@@ -172,19 +218,26 @@ uint32_t x264_cpu_detect( void )
         x264_cpu_cpuid( 1, &eax, &ebx, &ecx, &edx );
         int family = ((eax>>8)&0xf) + ((eax>>20)&0xff);
         int model  = ((eax>>4)&0xf) + ((eax>>12)&0xf0);
-        /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
-         * theoretically support sse2, but it's significantly slower than mmx for
-         * almost all of x264's functions, so let's just pretend they don't. */
-        if( family == 6 && (model == 9 || model == 13 || model == 14) )
-        {
-            cpu &= ~(X264_CPU_SSE2|X264_CPU_SSE3);
-            assert(!(cpu&(X264_CPU_SSSE3|X264_CPU_SSE4)));
-        }
-        /* Detect Atom CPU */
-        if( family == 6 && model == 28 )
+        if( family == 6 )
         {
-            cpu |= X264_CPU_SLOW_ATOM;
-            cpu |= X264_CPU_SLOW_CTZ;
+            /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
+             * theoretically support sse2, but it's significantly slower than mmx for
+             * almost all of x264's functions, so let's just pretend they don't. */
+            if( model == 9 || model == 13 || model == 14 )
+            {
+                cpu &= ~(X264_CPU_SSE2|X264_CPU_SSE3);
+                assert(!(cpu&(X264_CPU_SSSE3|X264_CPU_SSE4)));
+            }
+            /* Detect Atom CPU */
+            else if( model == 28 )
+            {
+                cpu |= X264_CPU_SLOW_ATOM;
+                cpu |= X264_CPU_SLOW_CTZ;
+            }
+            /* Some Penryns and Nehalems are pointlessly crippled (SSE4 disabled), so
+             * detect them here. */
+            else if( model >= 23 )
+                cpu |= X264_CPU_SHUFFLE_IS_FAST;
         }
     }
 
@@ -343,18 +396,25 @@ int x264_cpu_num_processors( void )
 #if !HAVE_THREAD
     return 1;
 
-#elif defined(_WIN32)
+#elif SYS_WINDOWS
     return x264_pthread_num_processors_np();
 
+#elif SYS_CYGWIN
+    return sysconf( _SC_NPROCESSORS_ONLN );
+
 #elif SYS_LINUX
-    unsigned int bit;
-    int np;
     cpu_set_t p_aff;
     memset( &p_aff, 0, sizeof(p_aff) );
-    sched_getaffinity( 0, sizeof(p_aff), &p_aff );
-    for( np = 0, bit = 0; bit < sizeof(p_aff); bit++ )
+    if( sched_getaffinity( 0, sizeof(p_aff), &p_aff ) )
+        return 1;
+#if HAVE_CPU_COUNT
+    return CPU_COUNT(&p_aff);
+#else
+    int np = 0;
+    for( unsigned int bit = 0; bit < 8 * sizeof(p_aff); bit++ )
         np += (((uint8_t *)&p_aff)[bit / 8] >> (bit % 8)) & 1;
     return np;
+#endif
 
 #elif SYS_BEOS
     system_info info;