#include "emulator.h"
#include "platforms/platforms.h"
#include "input/input.h"
+#include "m68kcpu.h"
#include "platforms/amiga/Gayle.h"
#include "platforms/amiga/amiga-registers.h"
unsigned int write_addr[8];
unsigned int write_upper[8];
unsigned char *write_data[8];
+address_translation_cache code_translation_cache = {0};
int kb_hook_enabled = 0;
int mouse_hook_enabled = 0;
value = *(gpio + 13);
if (!(value & (1 << PIN_IPL_ZERO))) {
- irq = 1;
old_irq = irq_delay;
//NOP
- M68K_END_TIMESLICE;
- NOP
+ if (!irq) {
+ M68K_END_TIMESLICE;
+ NOP
+ irq = 1;
+ }
//usleep(0);
}
else {
int main(int argc, char *argv[]) {
int g;
+
+ ps_setup_protocol();
+
//const struct sched_param priority = {99};
// Some command line switch stuffles
printf("%s switch found, but no config filename specified.\n", argv[g]);
} else {
g++;
- cfg = load_config_file(argv[g]);
- if (cfg) {
+ FILE *chk = fopen(argv[g], "rb");
+ if (chk == NULL) {
+ printf("Config file %s does not exist, please check that you've specified the path correctly.\n", argv[g]);
+ } else {
+ fclose(chk);
+ load_new_config = 1;
set_pistorm_devcfg_filename(argv[g]);
}
}
switch_config:
srand(clock());
+ ps_reset_state_machine();
+ ps_pulse_reset();
+ usleep(1500);
+
if (load_new_config != 0) {
uint8_t config_action = load_new_config - 1;
load_new_config = 0;
- free_config_file(cfg);
if (cfg) {
+ free_config_file(cfg);
free(cfg);
cfg = NULL;
}
- /*for(int i = 0; i < 2 * SIZE_MEGA; i++) {
- write8(i, 0);
- }*/
-
switch(config_action) {
case PICFG_LOAD:
case PICFG_RELOAD:
InitGayle();
signal(SIGINT, sigint_handler);
- /*setup_io();
-
- //goto skip_everything;
-
- // Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending
- // on pi model
- printf("Enable 200MHz GPCLK0 on GPIO4\n");
- gpio_enable_200mhz();
- // reset cpld statemachine first
-
- write_reg(0x01);
- usleep(100);
- usleep(1500);
- write_reg(0x00);
- usleep(100);
-
- // reset amiga and statemachine
- skip_everything:;
-
- usleep(1500);
-
- m68k_init();
- printf("Setting CPU type to %d.\n", cpu_type);
- m68k_set_cpu_type(cpu_type);
- cpu_pulse_reset();
-
- if (maprom == 1) {
- m68k_set_reg(M68K_REG_PC, 0xF80002);
- } else {
- m68k_set_reg(M68K_REG_PC, 0x0);
- }*/
- ps_setup_protocol();
ps_reset_state_machine();
ps_pulse_reset();
-
usleep(1500);
+
m68k_init();
printf("Setting CPU type to %d.\n", cpu_type);
m68k_set_cpu_type(cpu_type);
uint32_t cdtv_dmac_read(uint32_t address, uint8_t type);
void cdtv_dmac_write(uint32_t address, uint32_t value, uint8_t type);
+static inline void inline_write_16(unsigned int address, unsigned int data) {
+ *(gpio + 0) = GPFSEL0_OUTPUT;
+ *(gpio + 1) = GPFSEL1_OUTPUT;
+ *(gpio + 2) = GPFSEL2_OUTPUT;
+
+ *(gpio + 7) = ((data & 0xffff) << 8) | (REG_DATA << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((address & 0xffff) << 8) | (REG_ADDR_LO << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((0x0000 | (address >> 16)) << 8) | (REG_ADDR_HI << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 0) = GPFSEL0_INPUT;
+ *(gpio + 1) = GPFSEL1_INPUT;
+ *(gpio + 2) = GPFSEL2_INPUT;
+
+ while (*(gpio + 13) & (1 << PIN_TXN_IN_PROGRESS))
+ ;
+}
+
+static inline void inline_write_8(unsigned int address, unsigned int data) {
+ if ((address & 1) == 0)
+ data = data + (data << 8); // EVEN, A0=0,UDS
+ else
+ data = data & 0xff; // ODD , A0=1,LDS
+
+ *(gpio + 0) = GPFSEL0_OUTPUT;
+ *(gpio + 1) = GPFSEL1_OUTPUT;
+ *(gpio + 2) = GPFSEL2_OUTPUT;
+
+ *(gpio + 7) = ((data & 0xffff) << 8) | (REG_DATA << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((address & 0xffff) << 8) | (REG_ADDR_LO << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((0x0100 | (address >> 16)) << 8) | (REG_ADDR_HI << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 0) = GPFSEL0_INPUT;
+ *(gpio + 1) = GPFSEL1_INPUT;
+ *(gpio + 2) = GPFSEL2_INPUT;
+
+ while (*(gpio + 13) & (1 << PIN_TXN_IN_PROGRESS))
+ ;
+}
+
+static inline void inline_write_32(unsigned int address, unsigned int value) {
+ inline_write_16(address, value >> 16);
+ inline_write_16(address + 2, value);
+}
+
+static inline unsigned int inline_read_16(unsigned int address) {
+ *(gpio + 0) = GPFSEL0_OUTPUT;
+ *(gpio + 1) = GPFSEL1_OUTPUT;
+ *(gpio + 2) = GPFSEL2_OUTPUT;
+
+ *(gpio + 7) = ((address & 0xffff) << 8) | (REG_ADDR_LO << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((0x0200 | (address >> 16)) << 8) | (REG_ADDR_HI << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 0) = GPFSEL0_INPUT;
+ *(gpio + 1) = GPFSEL1_INPUT;
+ *(gpio + 2) = GPFSEL2_INPUT;
+
+ *(gpio + 7) = (REG_DATA << PIN_A0);
+ *(gpio + 7) = 1 << PIN_RD;
+
+ unsigned int value = *(gpio + 13);
+ while ((value=*(gpio + 13)) & (1 << PIN_TXN_IN_PROGRESS))
+ ;
+
+ *(gpio + 10) = 0xffffec;
+
+ return (value >> 8) & 0xffff;
+}
+
+static inline unsigned int inline_read_8(unsigned int address) {
+ *(gpio + 0) = GPFSEL0_OUTPUT;
+ *(gpio + 1) = GPFSEL1_OUTPUT;
+ *(gpio + 2) = GPFSEL2_OUTPUT;
+
+ *(gpio + 7) = ((address & 0xffff) << 8) | (REG_ADDR_LO << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 7) = ((0x0300 | (address >> 16)) << 8) | (REG_ADDR_HI << PIN_A0);
+ *(gpio + 7) = 1 << PIN_WR;
+ *(gpio + 10) = 1 << PIN_WR;
+ *(gpio + 10) = 0xffffec;
+
+ *(gpio + 0) = GPFSEL0_INPUT;
+ *(gpio + 1) = GPFSEL1_INPUT;
+ *(gpio + 2) = GPFSEL2_INPUT;
+
+ *(gpio + 7) = (REG_DATA << PIN_A0);
+ *(gpio + 7) = 1 << PIN_RD;
+
+ unsigned int value = *(gpio + 13);
+ while ((value=*(gpio + 13)) & (1 << PIN_TXN_IN_PROGRESS))
+ ;
+
+ *(gpio + 10) = 0xffffec;
+
+ value = (value >> 8) & 0xffff;
+
+ if ((address & 1) == 0)
+ return (value >> 8) & 0xff; // EVEN, A0=0,UDS
+ else
+ return value & 0xff; // ODD , A0=1,LDS
+}
+
+static inline unsigned int inline_read_32(unsigned int address) {
+ unsigned int a = inline_read_16(address);
+ unsigned int b = inline_read_16(address + 2);
+ return (a << 16) | b;
+}
+
static inline uint32_t ps_read(uint8_t type, uint32_t addr) {
switch (type) {
case OP_TYPE_BYTE:
- return ps_read_8(addr);
+ return inline_read_8(addr);
case OP_TYPE_WORD:
- return ps_read_16(addr);
+ return inline_read_16(addr);
case OP_TYPE_LONGWORD:
- return ps_read_32(addr);
+ return inline_read_32(addr);
}
// This shouldn't actually happen.
return 0;
}
static inline int32_t platform_read_check(uint8_t type, uint32_t addr, uint32_t *res) {
- switch (addr) {
- case CIAAPRA:
- if (mouse_hook_enabled && (mouse_buttons & 0x01)) {
- rres = (uint32_t)ps_read(type, addr);
- *res = (rres ^ 0x40);
- return 1;
- }
- return 0;
- break;
- case CIAAICR:
- if (kb_hook_enabled) {
- rres = (uint32_t)ps_read(type, addr);
- if (get_num_kb_queued() && (!send_keypress || send_keypress == 1)) {
- rres |= 0x08;
- if (!send_keypress)
- send_keypress = 1;
- }
- if (send_keypress == 2) {
- send_keypress = 0;
- }
- *res = rres;
- return 1;
- }
- return 0;
- break;
- case CIAADAT:
- if (kb_hook_enabled) {
- rres = (uint32_t)ps_read(type, addr);
- uint8_t c = 0, t = 0;
- pop_queued_key(&c, &t);
- t ^= 0x01;
- rres = ((c << 1) | t) ^ 0xFF;
- send_keypress = 2;
- *res = rres;
- return 1;
- }
- return 0;
- break;
- case JOY0DAT:
- if (mouse_hook_enabled) {
- unsigned short result = (mouse_dy << 8) | (mouse_dx);
- *res = (unsigned int)result;
- return 1;
- }
- return 0;
- break;
- case POTGOR:
- if (mouse_hook_enabled) {
- unsigned short result = (unsigned short)ps_read(type, addr);
- // bit 1 rmb, bit 2 mmb
- if (mouse_buttons & 0x06) {
- *res = (unsigned int)((result ^ ((mouse_buttons & 0x02) << 9)) // move rmb to bit 10
- & (result ^ ((mouse_buttons & 0x04) << 6))); // move mmb to bit 8
- return 1;
- }
- *res = (unsigned int)(result & 0xfffd);
- return 1;
- }
- return 0;
- break;
- default:
- break;
- }
-
switch (cfg->platform->id) {
case PLATFORM_AMIGA:
+ switch (addr) {
+ case CIAAPRA:
+ if (mouse_hook_enabled && (mouse_buttons & 0x01)) {
+ rres = (uint32_t)ps_read(type, addr);
+ *res = (rres ^ 0x40);
+ return 1;
+ }
+ return 0;
+ break;
+ case CIAAICR:
+ if (kb_hook_enabled) {
+ rres = (uint32_t)ps_read(type, addr);
+ if (get_num_kb_queued() && (!send_keypress || send_keypress == 1)) {
+ rres |= 0x08;
+ if (!send_keypress)
+ send_keypress = 1;
+ }
+ if (send_keypress == 2) {
+ send_keypress = 0;
+ }
+ *res = rres;
+ return 1;
+ }
+ return 0;
+ break;
+ case CIAADAT:
+ if (kb_hook_enabled) {
+ rres = (uint32_t)ps_read(type, addr);
+ uint8_t c = 0, t = 0;
+ pop_queued_key(&c, &t);
+ t ^= 0x01;
+ rres = ((c << 1) | t) ^ 0xFF;
+ send_keypress = 2;
+ *res = rres;
+ return 1;
+ }
+ return 0;
+ break;
+ case JOY0DAT:
+ if (mouse_hook_enabled) {
+ unsigned short result = (mouse_dy << 8) | (mouse_dx);
+ *res = (unsigned int)result;
+ return 1;
+ }
+ return 0;
+ break;
+ case POTGOR:
+ if (mouse_hook_enabled) {
+ unsigned short result = (unsigned short)ps_read(type, addr);
+ // bit 1 rmb, bit 2 mmb
+ if (mouse_buttons & 0x06) {
+ *res = (unsigned int)((result ^ ((mouse_buttons & 0x02) << 9)) // move rmb to bit 10
+ & (result ^ ((mouse_buttons & 0x04) << 6))); // move mmb to bit 8
+ return 1;
+ }
+ *res = (unsigned int)(result & 0xfffd);
+ return 1;
+ }
+ return 0;
+ break;
+ default:
+ break;
+ }
+
if (addr >= cfg->custom_low && addr < cfg->custom_high) {
if (addr >= PISCSI_OFFSET && addr < PISCSI_UPPER) {
*res = handle_piscsi_read(addr, type);
if (address & 0xFF000000)
return 0;
- return (unsigned int)read8((uint32_t)address);
+ return (unsigned int)inline_read_8((uint32_t)address);
}
unsigned int m68k_read_memory_16(unsigned int address) {
return 0;
if (address & 0x01) {
- return ((read8(address) << 8) | read8(address + 1));
+ return ((inline_read_8(address) << 8) | inline_read_8(address + 1));
}
- return (unsigned int)read16((uint32_t)address);
+ return (unsigned int)inline_read_16((uint32_t)address);
}
unsigned int m68k_read_memory_32(unsigned int address) {
return 0;
if (address & 0x01) {
- uint32_t c = read8(address);
- c |= (be16toh(read16(address+1)) << 8);
- c |= (read8(address + 3) << 24);
+ uint32_t c = inline_read_8(address);
+ c |= (be16toh(inline_read_16(address+1)) << 8);
+ c |= (inline_read_8(address + 3) << 24);
return htobe32(c);
}
- uint16_t a = read16(address);
- uint16_t b = read16(address + 2);
+ uint16_t a = inline_read_16(address);
+ uint16_t b = inline_read_16(address + 2);
return (a << 16) | b;
}
static inline int32_t platform_write_check(uint8_t type, uint32_t addr, uint32_t val) {
- switch (addr) {
- case CIAAPRA:
- if (ovl != (val & (1 << 0))) {
- ovl = (val & (1 << 0));
- printf("OVL:%x\n", ovl);
+ switch (cfg->platform->id) {
+ case PLATFORM_MAC:
+ switch (addr) {
+ case 0xEFFFFE: // VIA1?
+ if (val & 0x10 && !ovl) {
+ ovl = 1;
+ printf("[MAC] OVL on.\n");
+ } else if (ovl) {
+ ovl = 0;
+ printf("[MAC] OVL off.\n");
+ }
+ break;
}
- return 0;
break;
- case SERDAT: {
- char *serdat = (char *)&val;
- // SERDAT word. see amiga dev docs appendix a; upper byte is control codes, and bit 0 is always 1.
- // ignore this upper byte as it's not viewable data, only display lower byte.
- printf("%c", serdat[0]);
- return 0;
- break;
- }
- case INTENA:
- // This code is kind of strange and should probably be reworked/revoked.
- if (!(val & 0x8000)) {
- if (val & 0x04) {
- int2_enabled = 0;
+ case PLATFORM_AMIGA:
+ switch (addr) {
+ case CIAAPRA:
+ if (ovl != (val & (1 << 0))) {
+ ovl = (val & (1 << 0));
+ printf("OVL:%x\n", ovl);
+ }
+ return 0;
+ break;
+ case SERDAT: {
+ char *serdat = (char *)&val;
+ // SERDAT word. see amiga dev docs appendix a; upper byte is control codes, and bit 0 is always 1.
+ // ignore this upper byte as it's not viewable data, only display lower byte.
+ printf("%c", serdat[0]);
+ return 0;
+ break;
}
+ case INTENA:
+ // This code is kind of strange and should probably be reworked/revoked.
+ if (!(val & 0x8000)) {
+ if (val & 0x04) {
+ int2_enabled = 0;
+ }
+ }
+ else if (val & 0x04) {
+ int2_enabled = 1;
+ }
+ return 0;
+ break;
+ default:
+ break;
}
- else if (val & 0x04) {
- int2_enabled = 1;
- }
- return 0;
- break;
- default:
- break;
- }
- switch (cfg->platform->id) {
- case PLATFORM_AMIGA:
if (addr >= cfg->custom_low && addr < cfg->custom_high) {
if (addr >= PISCSI_OFFSET && addr < PISCSI_UPPER) {
handle_piscsi_write(addr, val, type);
return 0;
}
-
void m68k_write_memory_8(unsigned int address, unsigned int value) {
if (platform_write_check(OP_TYPE_BYTE, address, value))
return;
if (address & 0xFF000000)
return;
- write8((uint32_t)address, value);
+ inline_write_8((uint32_t)address, value);
return;
}
if (address & 0xFF000000)
return;
- if (address & 0x01)
- printf("Unaligned WORD write!\n");
+ if (address & 0x01) {
+ inline_write_8(value & 0xFF, address);
+ inline_write_8((value >> 8) & 0xFF, address + 1);
+ return;
+ }
- write16((uint32_t)address, value);
+ inline_write_16((uint32_t)address, value);
return;
}
if (address & 0xFF000000)
return;
- if (address & 0x01)
- printf("Unaligned LONGWORD write!\n");
+ if (address & 0x01) {
+ inline_write_8(value & 0xFF, address);
+ inline_write_16(htobe16(((value >> 8) & 0xFFFF)), address + 1);
+ inline_write_8((value >> 24), address + 3);
+ return;
+ }
- write16(address, value >> 16);
- write16(address + 2, value);
+ inline_write_16(address, value >> 16);
+ inline_write_16(address + 2, value);
return;
}