*/
typedef union {
- long long q; /* Quadword (64-bit) value */
- unsigned long long uq; /* Unsigned Quadword */
- int d[2]; /* 2 Doubleword (32-bit) values */
- unsigned int ud[2]; /* 2 Unsigned Doubleword */
- short w[4]; /* 4 Word (16-bit) values */
- unsigned short uw[4]; /* 4 Unsigned Word */
- char b[8]; /* 8 Byte (8-bit) values */
- unsigned char ub[8]; /* 8 Unsigned Byte */
+ int64_t q; /* Quadword (64-bit) value */
+ uint64_t uq; /* Unsigned Quadword */
+ int32_t d[2]; /* 2 Doubleword (32-bit) values */
+ uint32_t ud[2]; /* 2 Unsigned Doubleword */
+ int16_t w[4]; /* 4 Word (16-bit) values */
+ uint16_t uw[4]; /* 4 Unsigned Word */
+ int8_t b[8]; /* 8 Byte (8-bit) values */
+ uint8_t ub[8]; /* 8 Unsigned Byte */
float s[2]; /* Single-precision (32-bit) value */
} ATTR_ALIGN(8) mmx_t; /* On an 8-byte (64-bit) boundary */
#define mmx_i2r(op,imm,reg) \
__asm__ __volatile__ (#op " %0, %%" #reg \
: /* nothing */ \
- : "X" (imm) )
+ : "i" (imm) )
#define mmx_m2r(op,mem,reg) \
__asm__ __volatile__ (#op " %0, %%" #reg \
: /* nothing */ \
- : "X" (mem))
+ : "m" (mem))
#define mmx_r2m(op,reg,mem) \
__asm__ __volatile__ (#op " %%" #reg ", %0" \
- : "=X" (mem) \
+ : "=m" (mem) \
: /* nothing */ )
#define mmx_r2r(op,regs,regd) \