#if HAVE_INLINE_ASM
-# define MULL MULL
-static inline av_const int MULL(int a, int b, unsigned shift)
-{
- int lo, hi;
- __asm__("smull %0, %1, %2, %3 \n\t"
- "mov %0, %0, lsr %4 \n\t"
- "add %1, %0, %1, lsl %5 \n\t"
- : "=&r"(lo), "=&r"(hi)
- : "r"(b), "r"(a), "ir"(shift), "ir"(32-shift));
- return hi;
-}
-
+#if HAVE_ARMV6_INLINE
#define MULH MULH
-#if HAVE_ARMV6
static inline av_const int MULH(int a, int b)
{
int r;
__asm__ ("smmul %0, %1, %2" : "=r"(r) : "r"(a), "r"(b));
return r;
}
-#else
-static inline av_const int MULH(int a, int b)
-{
- int lo, hi;
- __asm__ ("smull %0, %1, %2, %3" : "=&r"(lo), "=&r"(hi) : "r"(b), "r"(a));
- return hi;
-}
-#endif
-static inline av_const int64_t MUL64(int a, int b)
+#define FASTDIV FASTDIV
+static av_always_inline av_const int FASTDIV(int a, int b)
{
- int64_t x;
- __asm__ ("smull %Q0, %R0, %1, %2" : "=r"(x) : "r"(a), "r"(b));
- return x;
+ int r;
+ __asm__ ("cmp %2, #2 \n\t"
+ "ldr %0, [%3, %2, lsl #2] \n\t"
+ "ite le \n\t"
+ "lsrle %0, %1, #1 \n\t"
+ "smmulgt %0, %0, %1 \n\t"
+ : "=&r"(r) : "r"(a), "r"(b), "r"(ff_inverse) : "cc");
+ return r;
}
-#define MUL64 MUL64
-static inline av_const int64_t MAC64(int64_t d, int a, int b)
+#else /* HAVE_ARMV6_INLINE */
+
+#define FASTDIV FASTDIV
+static av_always_inline av_const int FASTDIV(int a, int b)
{
- __asm__ ("smlal %Q0, %R0, %1, %2" : "+r"(d) : "r"(a), "r"(b));
- return d;
+ int r, t;
+ __asm__ ("umull %1, %0, %2, %3"
+ : "=&r"(r), "=&r"(t) : "r"(a), "r"(ff_inverse[b]));
+ return r;
}
-#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
+#endif
+
#define MLS64(d, a, b) MAC64(d, -(a), b)
-#if HAVE_ARMV5TE
+#if HAVE_ARMV5TE_INLINE
/* signed 16x16 -> 32 multiply add accumulate */
# define MAC16(rt, ra, rb) \
__asm__ (
"mov %0, %2 \n\t"
"cmp %1, %2 \n\t"
+ "itt gt \n\t"
"movgt %0, %1 \n\t"
"movgt %1, %2 \n\t"
"cmp %1, %3 \n\t"
+ "it le \n\t"
"movle %1, %3 \n\t"
"cmp %0, %1 \n\t"
+ "it gt \n\t"
"movgt %0, %1 \n\t"
: "=&r"(m), "+r"(a)
: "r"(b), "r"(c)