* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include "asm.S"
+#include "libavutil/arm/asm.S"
+#include "neon.S"
-.macro rv34_inv_transform
- mov r1, #16
- vld1.16 {d28}, [r0,:64], r1 @ block[i+8*0]
- vld1.16 {d29}, [r0,:64], r1 @ block[i+8*1]
- vld1.16 {d30}, [r0,:64], r1 @ block[i+8*2]
- vld1.16 {d31}, [r0,:64], r1 @ block[i+8*3]
+.macro rv34_inv_transform r0
+ vld1.16 {q14-q15}, [\r0,:128]
vmov.s16 d0, #13
vshll.s16 q12, d29, #3
vshll.s16 q13, d29, #4
vmlal.s16 q10, d30, d0
vmull.s16 q11, d28, d0
vmlsl.s16 q11, d30, d0
- vsubw.s16 q12, q12, d29 @ z2 = block[i+8*1]*7
- vaddw.s16 q13, q13, d29 @ z3 = block[i+8*1]*17
+ vsubw.s16 q12, q12, d29 @ z2 = block[i+4*1]*7
+ vaddw.s16 q13, q13, d29 @ z3 = block[i+4*1]*17
vsubw.s16 q9, q9, d31
vaddw.s16 q1, q1, d31
- vadd.s32 q13, q13, q9 @ z3 = 17*block[i+8*1] + 7*block[i+8*3]
- vsub.s32 q12, q12, q1 @ z2 = 7*block[i+8*1] - 17*block[i+8*3]
+ vadd.s32 q13, q13, q9 @ z3 = 17*block[i+4*1] + 7*block[i+4*3]
+ vsub.s32 q12, q12, q1 @ z2 = 7*block[i+4*1] - 17*block[i+4*3]
vadd.s32 q1, q10, q13 @ z0 + z3
vadd.s32 q2, q11, q12 @ z1 + z2
vsub.s32 q8, q10, q13 @ z0 - z3
vsub.s32 q15, q14, q9 @ z0 - z3
.endm
-/* void ff_rv34_inv_transform_neon(DCTELEM *block); */
-function ff_rv34_inv_transform_neon, export=1
- mov r2, r0
- rv34_inv_transform
- vrshrn.s32 d1, q2, #10 @ (z1 + z2) >> 10
- vrshrn.s32 d0, q1, #10 @ (z0 + z3) >> 10
- vrshrn.s32 d2, q3, #10 @ (z1 - z2) >> 10
- vrshrn.s32 d3, q15, #10 @ (z0 - z3) >> 10
- vst4.16 {d0[0], d1[0], d2[0], d3[0]}, [r2,:64], r1
- vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r2,:64], r1
- vst4.16 {d0[2], d1[2], d2[2], d3[2]}, [r2,:64], r1
- vst4.16 {d0[3], d1[3], d2[3], d3[3]}, [r2,:64], r1
+/* void rv34_idct_add_c(uint8_t *dst, int stride, DCTELEM *block) */
+function ff_rv34_idct_add_neon, export=1
+ mov r3, r0
+ rv34_inv_transform r2
+ vmov.i16 q12, #0
+ vrshrn.s32 d16, q1, #10 @ (z0 + z3) >> 10
+ vrshrn.s32 d17, q2, #10 @ (z1 + z2) >> 10
+ vrshrn.s32 d18, q3, #10 @ (z1 - z2) >> 10
+ vrshrn.s32 d19, q15, #10 @ (z0 - z3) >> 10
+ vld1.32 {d28[]}, [r0,:32], r1
+ vld1.32 {d29[]}, [r0,:32], r1
+ vtrn.32 q8, q9
+ vld1.32 {d28[1]}, [r0,:32], r1
+ vld1.32 {d29[1]}, [r0,:32], r1
+ vst1.16 {q12}, [r2,:128]! @ memset(block, 0, 16)
+ vst1.16 {q12}, [r2,:128] @ memset(block+16, 0, 16)
+ vtrn.16 d16, d17
+ vtrn.32 d28, d29
+ vtrn.16 d18, d19
+ vaddw.u8 q0, q8, d28
+ vaddw.u8 q1, q9, d29
+ vqmovun.s16 d28, q0
+ vqmovun.s16 d29, q1
+ vst1.32 {d28[0]}, [r3,:32], r1
+ vst1.32 {d28[1]}, [r3,:32], r1
+ vst1.32 {d29[0]}, [r3,:32], r1
+ vst1.32 {d29[1]}, [r3,:32], r1
bx lr
endfunc
/* void rv34_inv_transform_noround_neon(DCTELEM *block); */
function ff_rv34_inv_transform_noround_neon, export=1
- mov r2, r0
- rv34_inv_transform
+ rv34_inv_transform r0
vshl.s32 q11, q2, #1
vshl.s32 q10, q1, #1
vshl.s32 q12, q3, #1
vshrn.s32 d1, q11, #11 @ (z1 + z2)*3 >> 11
vshrn.s32 d2, q12, #11 @ (z1 - z2)*3 >> 11
vshrn.s32 d3, q13, #11 @ (z0 - z3)*3 >> 11
- vst4.16 {d0[0], d1[0], d2[0], d3[0]}, [r2,:64], r1
- vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r2,:64], r1
- vst4.16 {d0[2], d1[2], d2[2], d3[2]}, [r2,:64], r1
- vst4.16 {d0[3], d1[3], d2[3], d3[3]}, [r2,:64], r1
+ vst4.16 {d0[0], d1[0], d2[0], d3[0]}, [r0,:64]!
+ vst4.16 {d0[1], d1[1], d2[1], d3[1]}, [r0,:64]!
+ vst4.16 {d0[2], d1[2], d2[2], d3[2]}, [r0,:64]!
+ vst4.16 {d0[3], d1[3], d2[3], d3[3]}, [r0,:64]!
bx lr
endfunc
-/* void rv34_inv_transform_dc_c(DCTELEM *block) */
-function ff_rv34_inv_transform_dc_neon, export=1
- vld1.16 {d28[]}, [r0,:16] @ block[0]
- vmov.i16 d4, #169
- mov r1, #16
- vmull.s16 q3, d28, d4
- vrshrn.s32 d0, q3, #10
- vst1.16 {d0}, [r0,:64], r1
- vst1.16 {d0}, [r0,:64], r1
- vst1.16 {d0}, [r0,:64], r1
- vst1.16 {d0}, [r0,:64], r1
+/* void ff_rv34_idct_dc_add_neon(uint8_t *dst, int stride, int dc) */
+function ff_rv34_idct_dc_add_neon, export=1
+ mov r3, r0
+ vld1.32 {d28[]}, [r0,:32], r1
+ vld1.32 {d29[]}, [r0,:32], r1
+ vdup.16 d0, r2
+ vmov.s16 d1, #169
+ vld1.32 {d28[1]}, [r0,:32], r1
+ vmull.s16 q1, d0, d1 @ dc * 13 * 13
+ vld1.32 {d29[1]}, [r0,:32], r1
+ vrshrn.s32 d0, q1, #10 @ (dc * 13 * 13 + 0x200) >> 10
+ vmov d1, d0
+ vaddw.u8 q2, q0, d28
+ vaddw.u8 q3, q0, d29
+ vqmovun.s16 d28, q2
+ vqmovun.s16 d29, q3
+ vst1.32 {d28[0]}, [r3,:32], r1
+ vst1.32 {d29[0]}, [r3,:32], r1
+ vst1.32 {d28[1]}, [r3,:32], r1
+ vst1.32 {d29[1]}, [r3,:32], r1
bx lr
endfunc
vld1.16 {d28[]}, [r0,:16] @ block[0]
vmov.i16 d4, #251
vorr.s16 d4, #256 @ 13^2 * 3
- mov r1, #16
vmull.s16 q3, d28, d4
vshrn.s32 d0, q3, #11
- vst1.64 {d0}, [r0,:64], r1
- vst1.64 {d0}, [r0,:64], r1
- vst1.64 {d0}, [r0,:64], r1
- vst1.64 {d0}, [r0,:64], r1
+ vmov.i16 d1, d0
+ vst1.64 {q0}, [r0,:128]!
+ vst1.64 {q0}, [r0,:128]!
bx lr
endfunc
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