VC1: transpose IDCT 8x8 coeffs while reading.

[ffmpeg] / libavcodec / ppc / int_altivec.c

diff --git a/libavcodec/ppc/int_altivec.c b/libavcodec/ppc/int_altivec.c
index 1983fe15ae5fe76937a51d23852ad6cb4880c6da..61c18c815457467db34c63815f0cb998d2d48747 100644 (file)
--- a/libavcodec/ppc/int_altivec.c
+++ b/libavcodec/ppc/int_altivec.c
@@ -19,16 +19,21 @@
  */
 
 /**
- ** @file int_altivec.c
+ ** @file
  ** integer misc ops.
  **/
 
-#include "libavcodec/dsputil.h"
+#include "config.h"
+#if HAVE_ALTIVEC_H
+#include <altivec.h>
+#endif
 
-#include "gcc_fixes.h"
+#include "libavcodec/dsputil.h"
 
 #include "dsputil_altivec.h"
 
+#include "types_altivec.h"
+
 static int ssd_int8_vs_int16_altivec(const int8_t *pix1, const int16_t *pix2,
                                      int size) {
     int i, size16;
@@ -36,7 +41,7 @@ static int ssd_int8_vs_int16_altivec(const int8_t *pix1, const int16_t *pix2,
     vector signed short vpix2, vdiff, vpix1l,vpix1h;
     union { vector signed int vscore;
             int32_t score[4];
-           } u;
+          } u;
     u.vscore = vec_splat_s32(0);
 //
 //XXX lazy way, fix it later
@@ -74,7 +79,74 @@ static int ssd_int8_vs_int16_altivec(const int8_t *pix1, const int16_t *pix2,
     return u.score[3];
 }
 
+static int32_t scalarproduct_int16_altivec(const int16_t * v1, const int16_t * v2, int order, const int shift)
+{
+    int i;
+    LOAD_ZERO;
+    register vec_s16 vec1, *pv;
+    register vec_s32 res = vec_splat_s32(0), t;
+    register vec_u32 shifts;
+    int32_t ires;
+
+    shifts = zero_u32v;
+    if(shift & 0x10) shifts = vec_add(shifts, vec_sl(vec_splat_u32(0x08), vec_splat_u32(0x1)));
+    if(shift & 0x08) shifts = vec_add(shifts, vec_splat_u32(0x08));
+    if(shift & 0x04) shifts = vec_add(shifts, vec_splat_u32(0x04));
+    if(shift & 0x02) shifts = vec_add(shifts, vec_splat_u32(0x02));
+    if(shift & 0x01) shifts = vec_add(shifts, vec_splat_u32(0x01));
+
+    for(i = 0; i < order; i += 8){
+        pv = (vec_s16*)v1;
+        vec1 = vec_perm(pv[0], pv[1], vec_lvsl(0, v1));
+        t = vec_msum(vec1, vec_ld(0, v2), zero_s32v);
+        t = vec_sr(t, shifts);
+        res = vec_sums(t, res);
+        v1 += 8;
+        v2 += 8;
+    }
+    res = vec_splat(res, 3);
+    vec_ste(res, 0, &ires);
+    return ires;
+}
+
+static int32_t scalarproduct_and_madd_int16_altivec(int16_t *v1, const int16_t *v2, const int16_t *v3, int order, int mul)
+{
+    LOAD_ZERO;
+    vec_s16 *pv1 = (vec_s16*)v1;
+    vec_s16 *pv2 = (vec_s16*)v2;
+    vec_s16 *pv3 = (vec_s16*)v3;
+    register vec_s16 muls = {mul,mul,mul,mul,mul,mul,mul,mul};
+    register vec_s16 t0, t1, i0, i1;
+    register vec_s16 i2 = pv2[0], i3 = pv3[0];
+    register vec_s32 res = zero_s32v;
+    register vec_u8 align = vec_lvsl(0, v2);
+    int32_t ires;
+    order >>= 4;
+    do {
+        t0 = vec_perm(i2, pv2[1], align);
+        i2 = pv2[2];
+        t1 = vec_perm(pv2[1], i2, align);
+        i0 = pv1[0];
+        i1 = pv1[1];
+        res = vec_msum(t0, i0, res);
+        res = vec_msum(t1, i1, res);
+        t0 = vec_perm(i3, pv3[1], align);
+        i3 = pv3[2];
+        t1 = vec_perm(pv3[1], i3, align);
+        pv1[0] = vec_mladd(t0, muls, i0);
+        pv1[1] = vec_mladd(t1, muls, i1);
+        pv1 += 2;
+        pv2 += 2;
+        pv3 += 2;
+    } while(--order);
+    res = vec_splat(vec_sums(res, zero_s32v), 3);
+    vec_ste(res, 0, &ires);
+    return ires;
+}
+
 void int_init_altivec(DSPContext* c, AVCodecContext *avctx)
 {
     c->ssd_int8_vs_int16 = ssd_int8_vs_int16_altivec;
+    c->scalarproduct_int16 = scalarproduct_int16_altivec;
+    c->scalarproduct_and_madd_int16 = scalarproduct_and_madd_int16_altivec;
 }