int rval = 0;
int eax, ebx, ecx, edx;
int max_std_level, max_ext_level, std_caps=0, ext_caps=0;
- x86_reg a, c;
-#ifdef ARCH_X86_64
-#define PUSHF "pushfq\n\t"
-#define POPF "popfq\n\t"
-#else
-#define PUSHF "pushfl\n\t"
-#define POPF "popfl\n\t"
-#endif
+#if ARCH_X86_32
+ x86_reg a, c;
__asm__ volatile (
/* See if CPUID instruction is supported ... */
/* ... Get copies of EFLAGS into eax and ecx */
- PUSHF
+ "pushfl\n\t"
"pop %0\n\t"
"mov %0, %1\n\t"
/* to the EFLAGS reg */
"xor $0x200000, %0\n\t"
"push %0\n\t"
- POPF
+ "popfl\n\t"
/* ... Get the (hopefully modified) EFLAGS */
- PUSHF
+ "pushfl\n\t"
"pop %0\n\t"
: "=a" (a), "=c" (c)
:
if (a == c)
return 0; /* CPUID not supported */
+#endif
cpuid(0, max_std_level, ebx, ecx, edx);
if (std_caps & (1<<23))
rval |= FF_MM_MMX;
if (std_caps & (1<<25))
- rval |= FF_MM_MMXEXT
-#if !defined(__GNUC__) || __GNUC__ > 2
+ rval |= FF_MM_MMX2
+#if HAVE_SSE
| FF_MM_SSE;
if (std_caps & (1<<26))
rval |= FF_MM_SSE2;
if (ecx & 1)
rval |= FF_MM_SSE3;
if (ecx & 0x00000200 )
- rval |= FF_MM_SSSE3
+ rval |= FF_MM_SSSE3;
+ if (ecx & 0x00080000 )
+ rval |= FF_MM_SSE4;
+ if (ecx & 0x00100000 )
+ rval |= FF_MM_SSE42;
#endif
;
}
if (ext_caps & (1<<23))
rval |= FF_MM_MMX;
if (ext_caps & (1<<22))
- rval |= FF_MM_MMXEXT;
+ rval |= FF_MM_MMX2;
}
#if 0
- av_log(NULL, AV_LOG_DEBUG, "%s%s%s%s%s%s%s%s\n",
+ av_log(NULL, AV_LOG_DEBUG, "%s%s%s%s%s%s%s%s%s%s\n",
(rval&FF_MM_MMX) ? "MMX ":"",
- (rval&FF_MM_MMXEXT) ? "MMX2 ":"",
+ (rval&FF_MM_MMX2) ? "MMX2 ":"",
(rval&FF_MM_SSE) ? "SSE ":"",
(rval&FF_MM_SSE2) ? "SSE2 ":"",
(rval&FF_MM_SSE3) ? "SSE3 ":"",
(rval&FF_MM_SSSE3) ? "SSSE3 ":"",
+ (rval&FF_MM_SSE4) ? "SSE4.1 ":"",
+ (rval&FF_MM_SSE42) ? "SSE4.2 ":"",
(rval&FF_MM_3DNOW) ? "3DNow ":"",
(rval&FF_MM_3DNOWEXT) ? "3DNowExt ":"");
#endif