#include "libavutil/x86/asm.h"
#include "libavutil/x86/cpu.h"
#include "libavutil/cpu.h"
+#include "libavutil/cpu_internal.h"
#if HAVE_YASM
#define cpuid_test ff_cpu_cpuid_test
-#elif HAVE_INLINE_ASM || HAVE_RWEFLAGS
+#elif HAVE_INLINE_ASM
static int cpuid_test(void)
{
if ((ecx & 0x18000000) == 0x18000000) {
/* Check for OS support */
xgetbv(0, eax, edx);
- if ((eax & 0x6) == 0x6)
+ if ((eax & 0x6) == 0x6) {
rval |= AV_CPU_FLAG_AVX;
+ if (ecx & 0x00001000)
+ rval |= AV_CPU_FLAG_FMA3;
+ }
}
#endif /* HAVE_AVX */
#endif /* HAVE_SSE */
}
+ if (max_std_level >= 7) {
+ cpuid(7, eax, ebx, ecx, edx);
+#if HAVE_AVX2
+ if (ebx & 0x00000020)
+ rval |= AV_CPU_FLAG_AVX2;
+#endif /* HAVE_AVX2 */
+ /* BMI1/2 don't need OS support */
+ if (ebx & 0x00000008) {
+ rval |= AV_CPU_FLAG_BMI1;
+ if (ebx & 0x00000100)
+ rval |= AV_CPU_FLAG_BMI2;
+ }
+ }
cpuid(0x80000000, max_ext_level, ebx, ecx, edx);
if (ext_caps & (1 << 22))
rval |= AV_CPU_FLAG_MMXEXT;
+ if (!strncmp(vendor.c, "AuthenticAMD", 12)) {
/* Allow for selectively disabling SSE2 functions on AMD processors
with SSE2 support but not SSE4a. This includes Athlon64, some
Opteron, and some Sempron processors. MMX, SSE, or 3DNow! are faster
AV_CPU_FLAG_SSE2 and AV_CPU_FLAG_SSE2SLOW are both set in this case
so that SSE2 is used unless explicitly disabled by checking
AV_CPU_FLAG_SSE2SLOW. */
- if (!strncmp(vendor.c, "AuthenticAMD", 12) &&
- rval & AV_CPU_FLAG_SSE2 && !(ecx & 0x00000040)) {
- rval |= AV_CPU_FLAG_SSE2SLOW;
+ if (rval & AV_CPU_FLAG_SSE2 && !(ecx & 0x00000040))
+ rval |= AV_CPU_FLAG_SSE2SLOW;
+
+ /* Similar to the above but for AVX functions on AMD processors.
+ This is necessary only for functions using YMM registers on Bulldozer
+ based CPUs as they lack 256-bits execution units. SSE/AVX functions
+ using XMM registers are always faster on them.
+ AV_CPU_FLAG_AVX and AV_CPU_FLAG_AVXSLOW are both set so that AVX is
+ used unless explicitly disabled by checking AV_CPU_FLAG_AVXSLOW.
+ TODO: Confirm if Excavator is affected or not by this once it's
+ released, and update the check if necessary. Same for btver2. */
+ if (family == 0x15 && (rval & AV_CPU_FLAG_AVX))
+ rval |= AV_CPU_FLAG_AVXSLOW;
}
/* XOP and FMA4 use the AVX instruction coding scheme, so they can't be