"movd %%mm4, %1 \n\t"
: "=r" (numEq), "=r" (dcOk)
- : "r" (src), "r" ((long)stride), "m" (c->pQPb)
+ : "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a
);
"sub %1, %0 \n\t"
:
- : "r" (src), "r" ((long)stride), "m" (c->pQPb)
+ : "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm2, (%%"REG_c", %1) \n\t"
:
- : "r" (src), "r" ((long)stride)
+ : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm0, (%%"REG_c", %1, 2) \n\t" // line 7
:
- : "r" (src), "r" ((long)stride), "m" (co->pQPb)
+ : "r" (src), "r" ((x86_reg)stride), "m" (co->pQPb)
: "%"REG_a, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm2, (%0, %1, 4) \n\t"
:
- : "r" (src), "r" ((long)stride), "m" (c->pQPb)
+ : "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a, "%"REG_c
);
"movq %%mm0, (%0, %1) \n\t"
: "+r" (src)
- : "r" ((long)stride), "m" (c->pQPb)
+ : "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
DERING_CORE((%0, %1, 8) ,(%%REGd, %1, 4),%%mm2,%%mm4,%%mm0,%%mm3,%%mm5,%%mm1,%%mm6,%%mm7)
"1: \n\t"
- : : "r" (src), "r" ((long)stride), "m" (c->pQPb), "m"(c->pQPb2)
+ : : "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb), "m"(c->pQPb2)
: "%"REG_a, "%"REG_d, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
PAVGB(%%mm0, %%mm1)
"movq %%mm1, (%%"REG_c", %1, 2) \n\t"
- : : "r" (src), "r" ((long)stride)
+ : : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_c
);
#else
DEINT_CUBIC((%0, %1, 4) , (%%REGd, %1), (%%REGd, %1, 2), (%0, %1, 8) , (%%REGc))
DEINT_CUBIC((%%REGd, %1), (%0, %1, 8) , (%%REGd, %1, 4), (%%REGc) , (%%REGc, %1, 2))
- : : "r" (src), "r" ((long)stride)
+ : : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_d, "%"REG_c
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
DEINT_FF((%%REGd, %1), (%%REGd, %1, 2), (%0, %1, 8) , (%%REGd, %1, 4))
"movq %%mm0, (%2) \n\t"
- : : "r" (src), "r" ((long)stride), "r"(tmp)
+ : : "r" (src), "r" ((x86_reg)stride), "r"(tmp)
: "%"REG_a, "%"REG_d
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm0, (%2) \n\t"
"movq %%mm1, (%3) \n\t"
- : : "r" (src), "r" ((long)stride), "r"(tmp), "r"(tmp2)
+ : : "r" (src), "r" ((x86_reg)stride), "r"(tmp), "r"(tmp2)
: "%"REG_a, "%"REG_d
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm2, (%%"REG_d", %1, 2) \n\t"
"movq %%mm1, (%2) \n\t"
- : : "r" (src), "r" ((long)stride), "r" (tmp)
+ : : "r" (src), "r" ((x86_reg)stride), "r" (tmp)
: "%"REG_a, "%"REG_d
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm2, (%%"REG_d", %1, 2) \n\t"
- : : "r" (src), "r" ((long)stride)
+ : : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_d
);
MEDIAN((%0, %1, 4) , (%%REGd) , (%%REGd, %1))
MEDIAN((%%REGd, %1), (%%REGd, %1, 2), (%0, %1, 8))
- : : "r" (src), "r" ((long)stride)
+ : : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_d
);
#endif //HAVE_MMX2
"movd %%mm1, 116(%3) \n\t"
- :: "r" (src), "r" ((long)srcStride), "r" (dst1), "r" (dst2)
+ :: "r" (src), "r" ((x86_reg)srcStride), "r" (dst1), "r" (dst2)
: "%"REG_a
);
}
"psrlq $32, %%mm1 \n\t"
"movd %%mm1, 4(%%"REG_d", %1, 2) \n\t"
- :: "r" (dst), "r" ((long)dstStride), "r" (src)
+ :: "r" (dst), "r" ((x86_reg)dstStride), "r" (src)
: "%"REG_a, "%"REG_d
);
}
"4: \n\t"
- :: "r" (src), "r" (tempBlurred), "r"((long)stride), "m" (tempBlurredPast)
+ :: "r" (src), "r" (tempBlurred), "r"((x86_reg)stride), "m" (tempBlurredPast)
: "%"REG_a, "%"REG_d, "%"REG_c, "memory"
);
#else //defined (HAVE_MMX2) || defined (HAVE_3DNOW)
"movq %%mm6, %0 \n\t"
: "=m" (eq_mask), "=m" (dc_mask)
- : "r" (src), "r" ((long)step), "m" (c->pQPb), "m"(c->ppMode.flatnessThreshold)
+ : "r" (src), "r" ((x86_reg)step), "m" (c->pQPb), "m"(c->ppMode.flatnessThreshold)
: "%"REG_a
);
both_masks = dc_mask & eq_mask;
if(both_masks){
- long offset= -8*step;
+ x86_reg offset= -8*step;
int64_t *temp_sums= sums;
__asm__ volatile(
"mov %4, %0 \n\t" //FIXME
: "+&r"(src)
- : "r" ((long)step), "m" (c->pQPb), "r"(sums), "g"(src)
+ : "r" ((x86_reg)step), "m" (c->pQPb), "r"(sums), "g"(src)
);
src+= step; // src points to begin of the 8x8 Block
" js 1b \n\t"
: "+r"(offset), "+r"(temp_sums)
- : "r" ((long)step), "r"(src - offset), "m"(both_masks)
+ : "r" ((x86_reg)step), "r"(src - offset), "m"(both_masks)
);
}else
src+= step; // src points to begin of the 8x8 Block
"movq %%mm0, (%0, %1) \n\t"
: "+r" (temp_src)
- : "r" ((long)step), "m" (c->pQPb), "m"(eq_mask)
+ : "r" ((x86_reg)step), "m" (c->pQPb), "m"(eq_mask)
: "%"REG_a, "%"REG_c
);
}
: "0" (packedOffsetAndScale),
"r"(src),
"r"(dst),
- "r" ((long)srcStride),
- "r" ((long)dstStride)
+ "r" ((x86_reg)srcStride),
+ "r" ((x86_reg)dstStride)
: "%"REG_d
);
#else //HAVE_MMX
: : "r" (src),
"r" (dst),
- "r" ((long)srcStride),
- "r" ((long)dstStride)
+ "r" ((x86_reg)srcStride),
+ "r" ((x86_reg)dstStride)
: "%"REG_a, "%"REG_d
);
#else //HAVE_MMX
"movq %%mm0, (%0, %1) \n\t"
"movq %%mm0, (%0, %1, 2) \n\t"
: "+r" (src)
- : "r" ((long)-stride)
+ : "r" ((x86_reg)-stride)
);
#else
int i;
"add %3, %%"REG_d" \n\t"
"prefetchnta 32(%%"REG_a", %0) \n\t"
"prefetcht0 32(%%"REG_d", %2) \n\t"
- :: "r" (srcBlock), "r" ((long)srcStride), "r" (dstBlock), "r" ((long)dstStride),
- "g" ((long)x), "g" ((long)copyAhead)
+ :: "r" (srcBlock), "r" ((x86_reg)srcStride), "r" (dstBlock), "r" ((x86_reg)dstStride),
+ "g" ((x86_reg)x), "g" ((x86_reg)copyAhead)
: "%"REG_a, "%"REG_d
);
"add %3, %%"REG_d" \n\t"
"prefetchnta 32(%%"REG_a", %0) \n\t"
"prefetcht0 32(%%"REG_d", %2) \n\t"
- :: "r" (srcBlock), "r" ((long)srcStride), "r" (dstBlock), "r" ((long)dstStride),
- "g" ((long)x), "g" ((long)copyAhead)
+ :: "r" (srcBlock), "r" ((x86_reg)srcStride), "r" (dstBlock), "r" ((x86_reg)dstStride),
+ "g" ((x86_reg)x), "g" ((x86_reg)copyAhead)
: "%"REG_a, "%"REG_d
);