*/
/**
- * @file postprocess_template.c
+ * @file
* mmx/mmx2/3dnow postprocess code.
*/
#define ALIGN_MASK "$-8"
+#undef REAL_PAVGB
#undef PAVGB
#undef PMINUB
#undef PMAXUB
#if HAVE_MMX2
#define REAL_PAVGB(a,b) "pavgb " #a ", " #b " \n\t"
-#elif HAVE_3DNOW
+#elif HAVE_AMD3DNOW
#define REAL_PAVGB(a,b) "pavgusb " #a ", " #b " \n\t"
#endif
#define PAVGB(a,b) REAL_PAVGB(a,b)
#if !HAVE_ALTIVEC
static inline void RENAME(doVertLowPass)(uint8_t *src, int stride, PPContext *c)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= stride*3;
__asm__ volatile( //"movv %0 %1 %2\n\t"
"movq %2, %%mm0 \n\t" // QP,..., QP
: "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a, "%"REG_c
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
const int l1= stride;
const int l2= stride + l1;
const int l3= stride + l2;
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
#endif //HAVE_ALTIVEC
-#if 0
-/**
- * Experimental implementation of the filter (Algorithm 1) described in a paper from Ramkishor & Karandikar
- * values are correctly clipped (MMX2)
- * values are wraparound (C)
- * Conclusion: It is fast, but introduces ugly horizontal patterns
- * if there is a continuous gradient.
- 0 8 16 24
- x = 8
- x/2 = 4
- x/8 = 1
- 1 12 12 23
- */
-static inline void RENAME(vertRK1Filter)(uint8_t *src, int stride, int QP)
-{
-#if HAVE_MMX2 || HAVE_3DNOW
- src+= stride*3;
-// FIXME rounding
- __asm__ volatile(
- "pxor %%mm7, %%mm7 \n\t" // 0
- "movq "MANGLE(b80)", %%mm6 \n\t" // MIN_SIGNED_BYTE
- "leal (%0, %1), %%"REG_a" \n\t"
- "leal (%%"REG_a", %1, 4), %%"REG_c" \n\t"
-// 0 1 2 3 4 5 6 7 8 9
-// %0 eax eax+%1 eax+2%1 %0+4%1 ecx ecx+%1 ecx+2%1 %0+8%1 ecx+4%1
- "movq "MANGLE(pQPb)", %%mm0 \n\t" // QP,..., QP
- "movq %%mm0, %%mm1 \n\t" // QP,..., QP
- "paddusb "MANGLE(b02)", %%mm0 \n\t"
- "psrlw $2, %%mm0 \n\t"
- "pand "MANGLE(b3F)", %%mm0 \n\t" // QP/4,..., QP/4
- "paddusb %%mm1, %%mm0 \n\t" // QP*1.25 ...
- "movq (%0, %1, 4), %%mm2 \n\t" // line 4
- "movq (%%"REG_c"), %%mm3 \n\t" // line 5
- "movq %%mm2, %%mm4 \n\t" // line 4
- "pcmpeqb %%mm5, %%mm5 \n\t" // -1
- "pxor %%mm2, %%mm5 \n\t" // -line 4 - 1
- PAVGB(%%mm3, %%mm5)
- "paddb %%mm6, %%mm5 \n\t" // (l5-l4)/2
- "psubusb %%mm3, %%mm4 \n\t"
- "psubusb %%mm2, %%mm3 \n\t"
- "por %%mm3, %%mm4 \n\t" // |l4 - l5|
- "psubusb %%mm0, %%mm4 \n\t"
- "pcmpeqb %%mm7, %%mm4 \n\t"
- "pand %%mm4, %%mm5 \n\t" // d/2
-
-// "paddb %%mm6, %%mm2 \n\t" // line 4 + 0x80
- "paddb %%mm5, %%mm2 \n\t"
-// "psubb %%mm6, %%mm2 \n\t"
- "movq %%mm2, (%0,%1, 4) \n\t"
-
- "movq (%%"REG_c"), %%mm2 \n\t"
-// "paddb %%mm6, %%mm2 \n\t" // line 5 + 0x80
- "psubb %%mm5, %%mm2 \n\t"
-// "psubb %%mm6, %%mm2 \n\t"
- "movq %%mm2, (%%"REG_c") \n\t"
-
- "paddb %%mm6, %%mm5 \n\t"
- "psrlw $2, %%mm5 \n\t"
- "pand "MANGLE(b3F)", %%mm5 \n\t"
- "psubb "MANGLE(b20)", %%mm5 \n\t" // (l5-l4)/8
-
- "movq (%%"REG_a", %1, 2), %%mm2 \n\t"
- "paddb %%mm6, %%mm2 \n\t" // line 3 + 0x80
- "paddsb %%mm5, %%mm2 \n\t"
- "psubb %%mm6, %%mm2 \n\t"
- "movq %%mm2, (%%"REG_a", %1, 2) \n\t"
-
- "movq (%%"REG_c", %1), %%mm2 \n\t"
- "paddb %%mm6, %%mm2 \n\t" // line 6 + 0x80
- "psubsb %%mm5, %%mm2 \n\t"
- "psubb %%mm6, %%mm2 \n\t"
- "movq %%mm2, (%%"REG_c", %1) \n\t"
-
- :
- : "r" (src), "r" ((x86_reg)stride)
- : "%"REG_a, "%"REG_c
- );
-#else //HAVE_MMX2 || HAVE_3DNOW
- const int l1= stride;
- const int l2= stride + l1;
- const int l3= stride + l2;
- const int l4= stride + l3;
- const int l5= stride + l4;
- const int l6= stride + l5;
-// const int l7= stride + l6;
-// const int l8= stride + l7;
-// const int l9= stride + l8;
- int x;
- const int QP15= QP + (QP>>2);
- src+= stride*3;
- for(x=0; x<BLOCK_SIZE; x++){
- const int v = (src[x+l5] - src[x+l4]);
- if(FFABS(v) < QP15){
- src[x+l3] +=v>>3;
- src[x+l4] +=v>>1;
- src[x+l5] -=v>>1;
- src[x+l6] -=v>>3;
- }
- }
-
-#endif //HAVE_MMX2 || HAVE_3DNOW
-}
-#endif //0
-
/**
* Experimental Filter 1
* will not damage linear gradients
*/
static inline void RENAME(vertX1Filter)(uint8_t *src, int stride, PPContext *co)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= stride*3;
__asm__ volatile(
: "r" (src), "r" ((x86_reg)stride), "m" (co->pQPb)
: "%"REG_a, "%"REG_c
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
const int l1= stride;
const int l2= stride + l1;
}
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
#if !HAVE_ALTIVEC
static inline void RENAME(doVertDefFilter)(uint8_t src[], int stride, PPContext *c)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
/*
uint8_t tmp[16];
const int l1= stride;
: "r" ((x86_reg)stride), "m" (c->pQPb)
: "%"REG_a, "%"REG_c
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
const int l1= stride;
const int l2= stride + l1;
const int l3= stride + l2;
}
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
#endif //HAVE_ALTIVEC
#if !HAVE_ALTIVEC
static inline void RENAME(dering)(uint8_t src[], int stride, PPContext *c)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
__asm__ volatile(
"pxor %%mm6, %%mm6 \n\t"
"pcmpeqb %%mm7, %%mm7 \n\t"
// 0 1 2 3 4 5 6 7 8 9
// %0 eax eax+%1 eax+2%1 %0+4%1 edx edx+%1 edx+2%1 %0+8%1 edx+4%1
+#undef REAL_FIND_MIN_MAX
#undef FIND_MIN_MAX
#if HAVE_MMX2
#define REAL_FIND_MIN_MAX(addr)\
: : "r" (src), "r" ((x86_reg)stride), "m" (c->pQPb), "m"(c->pQPb2)
: "%"REG_a, "%"REG_d, "%"REG_c
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
int y;
int min=255;
int max=0;
// src[0] = src[7]=src[stride*7]=src[stride*7 + 7]=255;
}
#endif
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
#endif //HAVE_ALTIVEC
/**
- * Deinterlaces the given block by linearly interpolating every second line.
+ * Deinterlace the given block by linearly interpolating every second line.
* will be called for every 8x8 block and can read & write from line 4-15
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceInterpolateLinear)(uint8_t src[], int stride)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= 4*stride;
__asm__ volatile(
"lea (%0, %1), %%"REG_a" \n\t"
}
/**
- * Deinterlaces the given block by cubic interpolating every second line.
+ * Deinterlace the given block by cubic interpolating every second line.
* will be called for every 8x8 block and can read & write from line 4-15
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceInterpolateCubic)(uint8_t src[], int stride)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= stride*3;
__asm__ volatile(
"lea (%0, %1), %%"REG_a" \n\t"
: : "r" (src), "r" ((x86_reg)stride)
: "%"REG_a, "%"REG_d, "%"REG_c
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
int x;
src+= stride*3;
for(x=0; x<8; x++){
src[stride*9] = CLIP((-src[stride*6] + 9*src[stride*8] + 9*src[stride*10] - src[stride*12])>>4);
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
/**
- * Deinterlaces the given block by filtering every second line with a (-1 4 2 4 -1) filter.
+ * Deinterlace the given block by filtering every second line with a (-1 4 2 4 -1) filter.
* will be called for every 8x8 block and can read & write from line 4-15
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceFF)(uint8_t src[], int stride, uint8_t *tmp)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= stride*4;
__asm__ volatile(
"lea (%0, %1), %%"REG_a" \n\t"
: : "r" (src), "r" ((x86_reg)stride), "r"(tmp)
: "%"REG_a, "%"REG_d
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
int x;
src+= stride*4;
for(x=0; x<8; x++){
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
/**
- * Deinterlaces the given block by filtering every line with a (-1 2 6 2 -1) filter.
+ * Deinterlace the given block by filtering every line with a (-1 2 6 2 -1) filter.
* will be called for every 8x8 block and can read & write from line 4-15
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceL5)(uint8_t src[], int stride, uint8_t *tmp, uint8_t *tmp2)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= stride*4;
__asm__ volatile(
"lea (%0, %1), %%"REG_a" \n\t"
: : "r" (src), "r" ((x86_reg)stride), "r"(tmp), "r"(tmp2)
: "%"REG_a, "%"REG_d
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
int x;
src+= stride*4;
for(x=0; x<8; x++){
src++;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
/**
- * Deinterlaces the given block by filtering all lines with a (1 2 1) filter.
+ * Deinterlace the given block by filtering all lines with a (1 2 1) filter.
* will be called for every 8x8 block and can read & write from line 4-15
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceBlendLinear)(uint8_t src[], int stride, uint8_t *tmp)
{
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
src+= 4*stride;
__asm__ volatile(
"lea (%0, %1), %%"REG_a" \n\t"
: : "r" (src), "r" ((x86_reg)stride), "r" (tmp)
: "%"REG_a, "%"REG_d
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
int a, b, c, x;
src+= 4*stride;
src += 4;
tmp += 4;
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
/**
- * Deinterlaces the given block by applying a median filter to every second line.
+ * Deinterlace the given block by applying a median filter to every second line.
* will be called for every 8x8 block and can read & write from line 4-15,
* lines 0-3 have been passed through the deblock / dering filters already, but can be read, too.
* lines 4-12 will be read into the deblocking filter and should be deinterlaced
*/
static inline void RENAME(deInterlaceMedian)(uint8_t src[], int stride)
{
-#ifd HAVE_MMX
+#if HAVE_MMX
src+= 4*stride;
#if HAVE_MMX2
__asm__ volatile(
#define FAST_L2_DIFF
//#define L1_DIFF //u should change the thresholds too if u try that one
-#if HAVE_MMX2 || HAVE_3DNOW
+#if HAVE_MMX2 || HAVE_AMD3DNOW
__asm__ volatile(
"lea (%2, %2, 2), %%"REG_a" \n\t" // 3*stride
"lea (%2, %2, 4), %%"REG_d" \n\t" // 5*stride
:: "r" (src), "r" (tempBlurred), "r"((x86_reg)stride), "m" (tempBlurredPast)
: "%"REG_a, "%"REG_d, "%"REG_c, "memory"
);
-#else //HAVE_MMX2 || HAVE_3DNOW
+#else //HAVE_MMX2 || HAVE_AMD3DNOW
{
int y;
int d=0;
}
}
}
-#endif //HAVE_MMX2 || HAVE_3DNOW
+#endif //HAVE_MMX2 || HAVE_AMD3DNOW
}
#endif //HAVE_ALTIVEC
const QP_STORE_T QPs[], int QPStride, int isColor, PPContext *c);
/**
- * Copies a block from src to dst and fixes the blacklevel.
+ * Copy a block from src to dst and fixes the blacklevel.
* levelFix == 0 -> do not touch the brighness & contrast
*/
+#undef REAL_SCALED_CPY
#undef SCALED_CPY
static inline void RENAME(blockCopy)(uint8_t dst[], int dstStride, const uint8_t src[], int srcStride,
}
/**
- * Duplicates the given 8 src pixels ? times upward
+ * Duplicate the given 8 src pixels ? times upward
*/
static inline void RENAME(duplicate)(uint8_t src[], int stride)
{
}
/**
- * Filters array of bytes (Y or U or V values)
+ * Filter array of bytes (Y or U or V values)
*/
static void RENAME(postProcess)(const uint8_t src[], int srcStride, uint8_t dst[], int dstStride, int width, int height,
const QP_STORE_T QPs[], int QPStride, int isColor, PPContext *c2)
: "%"REG_a, "%"REG_d
);
-#elif HAVE_3DNOW
+#elif HAVE_AMD3DNOW
//FIXME check if this is faster on an 3dnow chip or if it is faster without the prefetch or ...
/* prefetch(srcBlock + (((x>>3)&3) + 5)*srcStride + 32);
prefetch(srcBlock + (((x>>3)&3) + 9)*srcStride + 32);
: "%"REG_a, "%"REG_d
);
-#elif HAVE_3DNOW
+#elif HAVE_AMD3DNOW
//FIXME check if this is faster on an 3dnow chip or if it is faster without the prefetch or ...
/* prefetch(srcBlock + (((x>>3)&3) + 5)*srcStride + 32);
prefetch(srcBlock + (((x>>3)&3) + 9)*srcStride + 32);
horizX1Filter(dstBlock-4, stride, QP);
else if(mode & H_DEBLOCK){
#if HAVE_ALTIVEC
- DECLARE_ALIGNED(16, unsigned char, tempBlock[272]);
+ DECLARE_ALIGNED(16, unsigned char, tempBlock)[272];
transpose_16x8_char_toPackedAlign_altivec(tempBlock, dstBlock - (4 + 1), stride);
const int t=vertClassify_altivec(tempBlock-48, 16, &c);
+ dstBlock[x +14*dstStride] + dstBlock[x +15*dstStride];
}*/
}
-#if HAVE_3DNOW
+#if HAVE_AMD3DNOW
__asm__ volatile("femms");
#elif HAVE_MMX
__asm__ volatile("emms");