Merge commit '0e083d7e43805db1a978cb57bfa25fda62e8ff18'

[ffmpeg] / libswresample / x86 / resample_mmx.h

diff --git a/libswresample/x86/resample_mmx.h b/libswresample/x86/resample_mmx.h
index d96fd5a9d2d301792422f0a5379b712f9143d496..ba36de9e5c7fe11c7e55101cb78b65cc58e22e91 100644 (file)
--- a/libswresample/x86/resample_mmx.h
+++ b/libswresample/x86/resample_mmx.h
@@ -23,7 +23,8 @@
 #include "libswresample/swresample_internal.h"
 
 int swri_resample_int16_mmx2 (struct ResampleContext *c, int16_t *dst, const int16_t *src, int *consumed, int src_size, int dst_size, int update_ctx);
-int swri_resample_int16_ssse3(struct ResampleContext *c, int16_t *dst, const int16_t *src, int *consumed, int src_size, int dst_size, int update_ctx);
+int swri_resample_int16_sse2 (struct ResampleContext *c, int16_t *dst, const int16_t *src, int *consumed, int src_size, int dst_size, int update_ctx);
+int swri_resample_float_sse  (struct ResampleContext *c,   float *dst, const   float *src, int *consumed, int src_size, int dst_size, int update_ctx);
 
 DECLARE_ALIGNED(16, const uint64_t, ff_resample_int16_rounder)[2]    = { 0x0000000000004000ULL, 0x0000000000000000ULL};
 
@@ -46,9 +47,10 @@ __asm__ volatile(\
     : "r" (((uint8_t*)(src+sample_index))-len),\
       "r" (((uint8_t*)filter)-len),\
       "r" (dst+dst_index)\
+      NAMED_CONSTRAINTS_ADD(ff_resample_int16_rounder)\
 );
 
-#define COMMON_CORE_INT16_SSSE3 \
+#define COMMON_CORE_INT16_SSE2 \
     x86_reg len= -2*c->filter_length;\
 __asm__ volatile(\
     "movdqa "MANGLE(ff_resample_int16_rounder)", %%xmm0 \n\t"\
@@ -58,8 +60,10 @@ __asm__ volatile(\
     "paddd  %%xmm1, %%xmm0        \n\t"\
     "add       $16, %0            \n\t"\
     " js 1b                       \n\t"\
-    "phaddd %%xmm0, %%xmm0        \n\t"\
-    "phaddd %%xmm0, %%xmm0        \n\t"\
+    "pshufd $0x0E, %%xmm0, %%xmm1 \n\t"\
+    "paddd %%xmm1, %%xmm0         \n\t"\
+    "pshufd $0x01, %%xmm0, %%xmm1 \n\t"\
+    "paddd %%xmm1, %%xmm0         \n\t"\
     "psrad    $15, %%xmm0         \n\t"\
     "packssdw %%xmm0, %%xmm0      \n\t"\
     "movd %%xmm0, (%3)            \n\t"\
@@ -67,4 +71,27 @@ __asm__ volatile(\
     : "r" (((uint8_t*)(src+sample_index))-len),\
       "r" (((uint8_t*)filter)-len),\
       "r" (dst+dst_index)\
+      NAMED_CONSTRAINTS_ADD(ff_resample_int16_rounder)\
+);
+
+#define COMMON_CORE_FLT_SSE \
+    x86_reg len= -4*c->filter_length;\
+__asm__ volatile(\
+    "xorps     %%xmm0, %%xmm0     \n\t"\
+    "1:                           \n\t"\
+    "movups  (%1, %0), %%xmm1     \n\t"\
+    "mulps   (%2, %0), %%xmm1     \n\t"\
+    "addps     %%xmm1, %%xmm0     \n\t"\
+    "add       $16, %0            \n\t"\
+    " js 1b                       \n\t"\
+    "movhlps   %%xmm0, %%xmm1     \n\t"\
+    "addps     %%xmm1, %%xmm0     \n\t"\
+    "movss     %%xmm0, %%xmm1     \n\t"\
+    "shufps $1, %%xmm0, %%xmm0    \n\t"\
+    "addps     %%xmm1, %%xmm0     \n\t"\
+    "movss     %%xmm0, (%3)       \n\t"\
+    : "+r" (len)\
+    : "r" (((uint8_t*)(src+sample_index))-len),\
+      "r" (((uint8_t*)filter)-len),\
+      "r" (dst+dst_index)\
 );