*
* This file is part of FFmpeg.
*
- * FFmpeg is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with FFmpeg; if not, write to the Free Software
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- *
- * The C code (not assembly, MMX, ...) of this file can be used
- * under the LGPL license.
*/
#include <stddef.h>
#undef EMMS
#undef SFENCE
#undef MMREG_SIZE
-#undef PREFETCHW
#undef PAVGB
-#if HAVE_SSE2
+#if COMPILE_TEMPLATE_SSE2
#define MMREG_SIZE 16
#else
#define MMREG_SIZE 8
#endif
-#if HAVE_AMD3DNOW
+#if COMPILE_TEMPLATE_AMD3DNOW
#define PREFETCH "prefetch"
-#define PREFETCHW "prefetchw"
#define PAVGB "pavgusb"
-#elif HAVE_MMX2
+#elif COMPILE_TEMPLATE_MMX2
#define PREFETCH "prefetchnta"
-#define PREFETCHW "prefetcht0"
#define PAVGB "pavgb"
#else
#define PREFETCH " # nop"
-#define PREFETCHW " # nop"
#endif
-#if HAVE_AMD3DNOW
+#if COMPILE_TEMPLATE_AMD3DNOW
/* On K6 femms is faster than emms. On K7 femms is directly mapped to emms. */
#define EMMS "femms"
#else
#define EMMS "emms"
#endif
-#if HAVE_MMX2
+#if COMPILE_TEMPLATE_MMX2
#define MOVNTQ "movntq"
#define SFENCE "sfence"
#else
uint8_t *dest = dst;
const uint8_t *s = src;
const uint8_t *end;
- #if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
- #endif
+#endif
end = s + src_size;
- #if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 23;
__asm__ volatile("movq %0, %%mm7"::"m"(mask32a):"memory");
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
}
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
- #endif
- while (s < end)
- {
- #if HAVE_BIGENDIAN
+#endif
+ while (s < end) {
+#if HAVE_BIGENDIAN
/* RGB24 (= R,G,B) -> RGB32 (= A,B,G,R) */
*dest++ = 255;
*dest++ = s[2];
*dest++ = s[1];
*dest++ = s[0];
s+=3;
- #else
+#else
*dest++ = *s++;
*dest++ = *s++;
*dest++ = *s++;
*dest++ = 255;
- #endif
+#endif
}
}
+#define STORE_BGR24_MMX \
+ "psrlq $8, %%mm2 \n\t" \
+ "psrlq $8, %%mm3 \n\t" \
+ "psrlq $8, %%mm6 \n\t" \
+ "psrlq $8, %%mm7 \n\t" \
+ "pand "MANGLE(mask24l)", %%mm0\n\t" \
+ "pand "MANGLE(mask24l)", %%mm1\n\t" \
+ "pand "MANGLE(mask24l)", %%mm4\n\t" \
+ "pand "MANGLE(mask24l)", %%mm5\n\t" \
+ "pand "MANGLE(mask24h)", %%mm2\n\t" \
+ "pand "MANGLE(mask24h)", %%mm3\n\t" \
+ "pand "MANGLE(mask24h)", %%mm6\n\t" \
+ "pand "MANGLE(mask24h)", %%mm7\n\t" \
+ "por %%mm2, %%mm0 \n\t" \
+ "por %%mm3, %%mm1 \n\t" \
+ "por %%mm6, %%mm4 \n\t" \
+ "por %%mm7, %%mm5 \n\t" \
+ \
+ "movq %%mm1, %%mm2 \n\t" \
+ "movq %%mm4, %%mm3 \n\t" \
+ "psllq $48, %%mm2 \n\t" \
+ "psllq $32, %%mm3 \n\t" \
+ "pand "MANGLE(mask24hh)", %%mm2\n\t" \
+ "pand "MANGLE(mask24hhh)", %%mm3\n\t" \
+ "por %%mm2, %%mm0 \n\t" \
+ "psrlq $16, %%mm1 \n\t" \
+ "psrlq $32, %%mm4 \n\t" \
+ "psllq $16, %%mm5 \n\t" \
+ "por %%mm3, %%mm1 \n\t" \
+ "pand "MANGLE(mask24hhhh)", %%mm5\n\t" \
+ "por %%mm5, %%mm4 \n\t" \
+ \
+ MOVNTQ" %%mm0, %0 \n\t" \
+ MOVNTQ" %%mm1, 8%0 \n\t" \
+ MOVNTQ" %%mm4, 16%0"
+
+
static inline void RENAME(rgb32tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
uint8_t *dest = dst;
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 31;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
"movq %%mm1, %%mm3 \n\t"
"movq %%mm4, %%mm6 \n\t"
"movq %%mm5, %%mm7 \n\t"
- "psrlq $8, %%mm2 \n\t"
- "psrlq $8, %%mm3 \n\t"
- "psrlq $8, %%mm6 \n\t"
- "psrlq $8, %%mm7 \n\t"
- "pand %2, %%mm0 \n\t"
- "pand %2, %%mm1 \n\t"
- "pand %2, %%mm4 \n\t"
- "pand %2, %%mm5 \n\t"
- "pand %3, %%mm2 \n\t"
- "pand %3, %%mm3 \n\t"
- "pand %3, %%mm6 \n\t"
- "pand %3, %%mm7 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "por %%mm6, %%mm4 \n\t"
- "por %%mm7, %%mm5 \n\t"
-
- "movq %%mm1, %%mm2 \n\t"
- "movq %%mm4, %%mm3 \n\t"
- "psllq $48, %%mm2 \n\t"
- "psllq $32, %%mm3 \n\t"
- "pand %4, %%mm2 \n\t"
- "pand %5, %%mm3 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "psrlq $16, %%mm1 \n\t"
- "psrlq $32, %%mm4 \n\t"
- "psllq $16, %%mm5 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "pand %6, %%mm5 \n\t"
- "por %%mm5, %%mm4 \n\t"
-
- MOVNTQ" %%mm0, %0 \n\t"
- MOVNTQ" %%mm1, 8%0 \n\t"
- MOVNTQ" %%mm4, 16%0"
+ STORE_BGR24_MMX
:"=m"(*dest)
- :"m"(*s),"m"(mask24l),
- "m"(mask24h),"m"(mask24hh),"m"(mask24hhh),"m"(mask24hhhh)
+ :"m"(*s)
:"memory");
dest += 24;
s += 32;
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
#if HAVE_BIGENDIAN
/* RGB32 (= A,B,G,R) -> RGB24 (= R,G,B) */
s++;
register const uint8_t *end;
const uint8_t *mm_end;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s));
__asm__ volatile("movq %0, %%mm4"::"m"(mask15s));
mm_end = end - 15;
- while (s<mm_end)
- {
+ while (s<mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
__asm__ volatile(EMMS:::"memory");
#endif
mm_end = end - 3;
- while (s < mm_end)
- {
+ while (s < mm_end) {
register unsigned x= *((const uint32_t *)s);
*((uint32_t *)d) = (x&0x7FFF7FFF) + (x&0x7FE07FE0);
d+=4;
s+=4;
}
- if (s < end)
- {
+ if (s < end) {
register unsigned short x= *((const uint16_t *)s);
*((uint16_t *)d) = (x&0x7FFF) + (x&0x7FE0);
}
register const uint8_t *end;
const uint8_t *mm_end;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s));
__asm__ volatile("movq %0, %%mm7"::"m"(mask15rg));
__asm__ volatile("movq %0, %%mm6"::"m"(mask15b));
mm_end = end - 15;
- while (s<mm_end)
- {
+ while (s<mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
__asm__ volatile(EMMS:::"memory");
#endif
mm_end = end - 3;
- while (s < mm_end)
- {
+ while (s < mm_end) {
register uint32_t x= *((const uint32_t*)s);
*((uint32_t *)d) = ((x>>1)&0x7FE07FE0) | (x&0x001F001F);
s+=4;
d+=4;
}
- if (s < end)
- {
+ if (s < end) {
register uint16_t x= *((const uint16_t*)s);
*((uint16_t *)d) = ((x>>1)&0x7FE0) | (x&0x001F);
}
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
mm_end = end - 15;
#if 1 //is faster only if multiplies are reasonably fast (FIXME figure out on which CPUs this is faster, on Athlon it is slightly faster)
__asm__ volatile(
"movq %4, %%mm6 \n\t"
"movq %5, %%mm7 \n\t"
"jmp 2f \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1) \n\t"
"movd (%1), %%mm0 \n\t"
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_16mask),"m"(green_16mask));
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register int rgb = *(const uint32_t*)s; s += 4;
*d++ = ((rgb&0xFF)>>3) + ((rgb&0xFC00)>>5) + ((rgb&0xF80000)>>8);
}
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_16mask),"m"(green_16mask));
mm_end = end - 15;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register int rgb = *(const uint32_t*)s; s += 4;
*d++ = ((rgb&0xF8)<<8) + ((rgb&0xFC00)>>5) + ((rgb&0xF80000)>>19);
}
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
mm_end = end - 15;
#if 1 //is faster only if multiplies are reasonably fast (FIXME figure out on which CPUs this is faster, on Athlon it is slightly faster)
__asm__ volatile(
"movq %4, %%mm6 \n\t"
"movq %5, %%mm7 \n\t"
"jmp 2f \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1) \n\t"
"movd (%1), %%mm0 \n\t"
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_15mask),"m"(green_15mask));
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register int rgb = *(const uint32_t*)s; s += 4;
*d++ = ((rgb&0xFF)>>3) + ((rgb&0xF800)>>6) + ((rgb&0xF80000)>>9);
}
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_15mask),"m"(green_15mask));
mm_end = end - 15;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register int rgb = *(const uint32_t*)s; s += 4;
*d++ = ((rgb&0xF8)<<7) + ((rgb&0xF800)>>6) + ((rgb&0xF80000)>>19);
}
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_16mask),"m"(green_16mask));
mm_end = end - 11;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
const int b = *s++;
const int g = *s++;
const int r = *s++;
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_16mask),"m"(green_16mask));
mm_end = end - 15;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
const int r = *s++;
const int g = *s++;
const int b = *s++;
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_15mask),"m"(green_15mask));
mm_end = end - 11;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
const int b = *s++;
const int g = *s++;
const int r = *s++;
{
const uint8_t *s = src;
const uint8_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint8_t *mm_end;
#endif
uint16_t *d = (uint16_t *)dst;
end = s + src_size;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
__asm__ volatile(
"movq %0, %%mm7 \n\t"
"movq %1, %%mm6 \n\t"
::"m"(red_15mask),"m"(green_15mask));
mm_end = end - 15;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movd %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
const int r = *s++;
const int g = *s++;
const int b = *s++;
static inline void RENAME(rgb15tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t*)src;
end = s + src_size/2;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 7;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
"movq %%mm0, %%mm2 \n\t"
"movq %%mm1, %%mm3 \n\t"
- "psrlq $8, %%mm2 \n\t"
- "psrlq $8, %%mm3 \n\t"
- "psrlq $8, %%mm6 \n\t"
- "psrlq $8, %%mm7 \n\t"
- "pand %2, %%mm0 \n\t"
- "pand %2, %%mm1 \n\t"
- "pand %2, %%mm4 \n\t"
- "pand %2, %%mm5 \n\t"
- "pand %3, %%mm2 \n\t"
- "pand %3, %%mm3 \n\t"
- "pand %3, %%mm6 \n\t"
- "pand %3, %%mm7 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "por %%mm6, %%mm4 \n\t"
- "por %%mm7, %%mm5 \n\t"
-
- "movq %%mm1, %%mm2 \n\t"
- "movq %%mm4, %%mm3 \n\t"
- "psllq $48, %%mm2 \n\t"
- "psllq $32, %%mm3 \n\t"
- "pand %4, %%mm2 \n\t"
- "pand %5, %%mm3 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "psrlq $16, %%mm1 \n\t"
- "psrlq $32, %%mm4 \n\t"
- "psllq $16, %%mm5 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "pand %6, %%mm5 \n\t"
- "por %%mm5, %%mm4 \n\t"
-
- MOVNTQ" %%mm0, %0 \n\t"
- MOVNTQ" %%mm1, 8%0 \n\t"
- MOVNTQ" %%mm4, 16%0"
+ STORE_BGR24_MMX
:"=m"(*d)
- :"m"(*s),"m"(mask24l),"m"(mask24h),"m"(mask24hh),"m"(mask24hhh),"m"(mask24hhhh)
+ :"m"(*s)
:"memory");
d += 24;
s += 8;
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register uint16_t bgr;
bgr = *s++;
*d++ = (bgr&0x1F)<<3;
static inline void RENAME(rgb16tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = (uint8_t *)dst;
const uint16_t *s = (const uint16_t *)src;
end = s + src_size/2;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 7;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
"movq %%mm0, %%mm2 \n\t"
"movq %%mm1, %%mm3 \n\t"
- "psrlq $8, %%mm2 \n\t"
- "psrlq $8, %%mm3 \n\t"
- "psrlq $8, %%mm6 \n\t"
- "psrlq $8, %%mm7 \n\t"
- "pand %2, %%mm0 \n\t"
- "pand %2, %%mm1 \n\t"
- "pand %2, %%mm4 \n\t"
- "pand %2, %%mm5 \n\t"
- "pand %3, %%mm2 \n\t"
- "pand %3, %%mm3 \n\t"
- "pand %3, %%mm6 \n\t"
- "pand %3, %%mm7 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "por %%mm6, %%mm4 \n\t"
- "por %%mm7, %%mm5 \n\t"
-
- "movq %%mm1, %%mm2 \n\t"
- "movq %%mm4, %%mm3 \n\t"
- "psllq $48, %%mm2 \n\t"
- "psllq $32, %%mm3 \n\t"
- "pand %4, %%mm2 \n\t"
- "pand %5, %%mm3 \n\t"
- "por %%mm2, %%mm0 \n\t"
- "psrlq $16, %%mm1 \n\t"
- "psrlq $32, %%mm4 \n\t"
- "psllq $16, %%mm5 \n\t"
- "por %%mm3, %%mm1 \n\t"
- "pand %6, %%mm5 \n\t"
- "por %%mm5, %%mm4 \n\t"
-
- MOVNTQ" %%mm0, %0 \n\t"
- MOVNTQ" %%mm1, 8%0 \n\t"
- MOVNTQ" %%mm4, 16%0"
+ STORE_BGR24_MMX
:"=m"(*d)
- :"m"(*s),"m"(mask24l),"m"(mask24h),"m"(mask24hh),"m"(mask24hhh),"m"(mask24hhhh)
+ :"m"(*s)
:"memory");
d += 24;
s += 8;
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register uint16_t bgr;
bgr = *s++;
*d++ = (bgr&0x1F)<<3;
static inline void RENAME(rgb15to32)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t *)src;
end = s + src_size/2;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
__asm__ volatile("pxor %%mm7,%%mm7 \n\t":::"memory");
__asm__ volatile("pcmpeqd %%mm6,%%mm6 \n\t":::"memory");
mm_end = end - 3;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register uint16_t bgr;
bgr = *s++;
#if HAVE_BIGENDIAN
static inline void RENAME(rgb16to32)(const uint8_t *src, uint8_t *dst, long src_size)
{
const uint16_t *end;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
const uint16_t *mm_end;
#endif
uint8_t *d = dst;
const uint16_t *s = (const uint16_t*)src;
end = s + src_size/2;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
__asm__ volatile("pxor %%mm7,%%mm7 \n\t":::"memory");
__asm__ volatile("pcmpeqd %%mm6,%%mm6 \n\t":::"memory");
mm_end = end - 3;
- while (s < mm_end)
- {
+ while (s < mm_end) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
__asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory");
#endif
- while (s < end)
- {
+ while (s < end) {
register uint16_t bgr;
bgr = *s++;
#if HAVE_BIGENDIAN
}
}
-static inline void RENAME(rgb32tobgr32)(const uint8_t *src, uint8_t *dst, long src_size)
+static inline void RENAME(shuffle_bytes_2103)(const uint8_t *src, uint8_t *dst, long src_size)
{
x86_reg idx = 15 - src_size;
const uint8_t *s = src-idx;
uint8_t *d = dst-idx;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(
"test %0, %0 \n\t"
"jns 2f \n\t"
"pxor %4, %%mm7 \n\t"
"movq %%mm7, %%mm6 \n\t"
"pxor %5, %%mm7 \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1, %0) \n\t"
"movq (%1, %0), %%mm0 \n\t"
"movq 8(%1, %0), %%mm1 \n\t"
-# if HAVE_MMX2
+# if COMPILE_TEMPLATE_MMX2
"pshufw $177, %%mm0, %%mm3 \n\t"
"pshufw $177, %%mm1, %%mm5 \n\t"
"pand %%mm7, %%mm0 \n\t"
static inline void RENAME(rgb24tobgr24)(const uint8_t *src, uint8_t *dst, long src_size)
{
unsigned i;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
x86_reg mmx_size= 23 - src_size;
__asm__ volatile (
"test %%"REG_a", %%"REG_a" \n\t"
"movq "MANGLE(mask24r)", %%mm5 \n\t"
"movq "MANGLE(mask24g)", %%mm6 \n\t"
"movq "MANGLE(mask24b)", %%mm7 \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1, %%"REG_a") \n\t"
"movq (%1, %%"REG_a"), %%mm0 \n\t" // BGR BGR BG
src-= src_size;
dst-= src_size;
#endif
- for (i=0; i<src_size; i+=3)
- {
+ for (i=0; i<src_size; i+=3) {
register uint8_t x;
x = src[i + 2];
dst[i + 1] = src[i + 1];
{
long y;
const x86_reg chromWidth= width>>1;
- for (y=0; y<height; y++)
- {
-#if HAVE_MMX
-//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
+ for (y=0; y<height; y++) {
+#if COMPILE_TEMPLATE_MMX
+ //FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1, %%"REG_a", 2) \n\t"
PREFETCH" 32(%2, %%"REG_a") \n\t"
const uint32_t *yc = (uint32_t *) ysrc;
const uint32_t *yc2 = (uint32_t *) (ysrc + lumStride);
const uint16_t *uc = (uint16_t*) usrc, *vc = (uint16_t*) vsrc;
- for (i = 0; i < chromWidth; i += 8){
+ for (i = 0; i < chromWidth; i += 8) {
uint64_t y1, y2, yuv1, yuv2;
uint64_t u, v;
/* Prefetch */
int i;
uint64_t *ldst = (uint64_t *) dst;
const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc;
- for (i = 0; i < chromWidth; i += 2){
+ for (i = 0; i < chromWidth; i += 2) {
uint64_t k, l;
k = yc[0] + (uc[0] << 8) +
(yc[1] << 16) + (vc[0] << 24);
#else
int i, *idst = (int32_t *) dst;
const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc;
- for (i = 0; i < chromWidth; i++){
+ for (i = 0; i < chromWidth; i++) {
#if HAVE_BIGENDIAN
*idst++ = (yc[0] << 24)+ (uc[0] << 16) +
(yc[1] << 8) + (vc[0] << 0);
}
#endif
#endif
- if ((y&(vertLumPerChroma-1)) == vertLumPerChroma-1)
- {
+ if ((y&(vertLumPerChroma-1)) == vertLumPerChroma-1) {
usrc += chromStride;
vsrc += chromStride;
}
ysrc += lumStride;
dst += dstStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
{
long y;
const x86_reg chromWidth= width>>1;
- for (y=0; y<height; y++)
- {
-#if HAVE_MMX
-//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
+ for (y=0; y<height; y++) {
+#if COMPILE_TEMPLATE_MMX
+ //FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 32(%1, %%"REG_a", 2) \n\t"
PREFETCH" 32(%2, %%"REG_a") \n\t"
int i;
uint64_t *ldst = (uint64_t *) dst;
const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc;
- for (i = 0; i < chromWidth; i += 2){
+ for (i = 0; i < chromWidth; i += 2) {
uint64_t k, l;
k = uc[0] + (yc[0] << 8) +
(vc[0] << 16) + (yc[1] << 24);
#else
int i, *idst = (int32_t *) dst;
const uint8_t *yc = ysrc, *uc = usrc, *vc = vsrc;
- for (i = 0; i < chromWidth; i++){
+ for (i = 0; i < chromWidth; i++) {
#if HAVE_BIGENDIAN
*idst++ = (uc[0] << 24)+ (yc[0] << 16) +
(vc[0] << 8) + (yc[1] << 0);
}
#endif
#endif
- if ((y&(vertLumPerChroma-1)) == vertLumPerChroma-1)
- {
+ if ((y&(vertLumPerChroma-1)) == vertLumPerChroma-1) {
usrc += chromStride;
vsrc += chromStride;
}
ysrc += lumStride;
dst += dstStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
{
long y;
const x86_reg chromWidth= width>>1;
- for (y=0; y<height; y+=2)
- {
-#if HAVE_MMX
+ for (y=0; y<height; y+=2) {
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
"pcmpeqw %%mm7, %%mm7 \n\t"
"psrlw $8, %%mm7 \n\t" // FF,00,FF,00...
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
"movq (%0, %%"REG_a", 4), %%mm0 \n\t" // YUYV YUYV(0)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
"movq (%0, %%"REG_a", 4), %%mm0 \n\t" // YUYV YUYV(0)
);
#else
long i;
- for (i=0; i<chromWidth; i++)
- {
+ for (i=0; i<chromWidth; i++) {
ydst[2*i+0] = src[4*i+0];
udst[i] = src[4*i+1];
ydst[2*i+1] = src[4*i+2];
ydst += lumStride;
src += srcStride;
- for (i=0; i<chromWidth; i++)
- {
+ for (i=0; i<chromWidth; i++) {
ydst[2*i+0] = src[4*i+0];
ydst[2*i+1] = src[4*i+2];
}
ydst += lumStride;
src += srcStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
#endif
}
-static inline void RENAME(yvu9toyv12)(const uint8_t *ysrc, const uint8_t *usrc, const uint8_t *vsrc,
- uint8_t *ydst, uint8_t *udst, uint8_t *vdst,
- long width, long height, long lumStride, long chromStride)
-{
- /* Y Plane */
- memcpy(ydst, ysrc, width*height);
-
- /* XXX: implement upscaling for U,V */
-}
-
static inline void RENAME(planar2x)(const uint8_t *src, uint8_t *dst, long srcWidth, long srcHeight, long srcStride, long dstStride)
{
long x,y;
dst[0]= src[0];
// first line
- for (x=0; x<srcWidth-1; x++){
+ for (x=0; x<srcWidth-1; x++) {
dst[2*x+1]= (3*src[x] + src[x+1])>>2;
dst[2*x+2]= ( src[x] + 3*src[x+1])>>2;
}
dst+= dstStride;
- for (y=1; y<srcHeight; y++){
-#if HAVE_MMX2 || HAVE_AMD3DNOW
+ for (y=1; y<srcHeight; y++) {
+#if COMPILE_TEMPLATE_MMX2 || COMPILE_TEMPLATE_AMD3DNOW
const x86_reg mmxSize= srcWidth&~15;
__asm__ volatile(
"mov %4, %%"REG_a" \n\t"
+ "movq "MANGLE(mmx_ff)", %%mm0 \n\t"
+ "movq (%0, %%"REG_a"), %%mm4 \n\t"
+ "movq %%mm4, %%mm2 \n\t"
+ "psllq $8, %%mm4 \n\t"
+ "pand %%mm0, %%mm2 \n\t"
+ "por %%mm2, %%mm4 \n\t"
+ "movq (%1, %%"REG_a"), %%mm5 \n\t"
+ "movq %%mm5, %%mm3 \n\t"
+ "psllq $8, %%mm5 \n\t"
+ "pand %%mm0, %%mm3 \n\t"
+ "por %%mm3, %%mm5 \n\t"
"1: \n\t"
"movq (%0, %%"REG_a"), %%mm0 \n\t"
"movq (%1, %%"REG_a"), %%mm1 \n\t"
"movq 1(%0, %%"REG_a"), %%mm2 \n\t"
"movq 1(%1, %%"REG_a"), %%mm3 \n\t"
- "movq -1(%0, %%"REG_a"), %%mm4 \n\t"
- "movq -1(%1, %%"REG_a"), %%mm5 \n\t"
PAVGB" %%mm0, %%mm5 \n\t"
PAVGB" %%mm0, %%mm3 \n\t"
PAVGB" %%mm0, %%mm5 \n\t"
"movq %%mm6, 8(%3, %%"REG_a", 2) \n\t"
#endif
"add $8, %%"REG_a" \n\t"
+ "movq -1(%0, %%"REG_a"), %%mm4 \n\t"
+ "movq -1(%1, %%"REG_a"), %%mm5 \n\t"
" js 1b \n\t"
:: "r" (src + mmxSize ), "r" (src + srcStride + mmxSize ),
- "r" (dst + mmxSize*2), "r" (dst + dstStride + mmxSize*2),
- "g" (-mmxSize)
+ "r" (dst + mmxSize*2), "r" (dst + dstStride + mmxSize*2),
+ "g" (-mmxSize)
: "%"REG_a
-
);
#else
const x86_reg mmxSize=1;
-#endif
+
dst[0 ]= (3*src[0] + src[srcStride])>>2;
dst[dstStride]= ( src[0] + 3*src[srcStride])>>2;
+#endif
- for (x=mmxSize-1; x<srcWidth-1; x++){
+ for (x=mmxSize-1; x<srcWidth-1; x++) {
dst[2*x +1]= (3*src[x+0] + src[x+srcStride+1])>>2;
dst[2*x+dstStride+2]= ( src[x+0] + 3*src[x+srcStride+1])>>2;
dst[2*x+dstStride+1]= ( src[x+1] + 3*src[x+srcStride ])>>2;
#if 1
dst[0]= src[0];
- for (x=0; x<srcWidth-1; x++){
+ for (x=0; x<srcWidth-1; x++) {
dst[2*x+1]= (3*src[x] + src[x+1])>>2;
dst[2*x+2]= ( src[x] + 3*src[x+1])>>2;
}
dst[2*srcWidth-1]= src[srcWidth-1];
#else
- for (x=0; x<srcWidth; x++){
+ for (x=0; x<srcWidth; x++) {
dst[2*x+0]=
dst[2*x+1]= src[x];
}
#endif
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
{
long y;
const x86_reg chromWidth= width>>1;
- for (y=0; y<height; y+=2)
- {
-#if HAVE_MMX
+ for (y=0; y<height; y+=2) {
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
"pcmpeqw %%mm7, %%mm7 \n\t"
"psrlw $8, %%mm7 \n\t" // FF,00,FF,00...
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
"movq (%0, %%"REG_a", 4), %%mm0 \n\t" // UYVY UYVY(0)
__asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
"movq (%0, %%"REG_a", 4), %%mm0 \n\t" // YUYV YUYV(0)
);
#else
long i;
- for (i=0; i<chromWidth; i++)
- {
+ for (i=0; i<chromWidth; i++) {
udst[i] = src[4*i+0];
ydst[2*i+0] = src[4*i+1];
vdst[i] = src[4*i+2];
ydst += lumStride;
src += srcStride;
- for (i=0; i<chromWidth; i++)
- {
+ for (i=0; i<chromWidth; i++) {
ydst[2*i+0] = src[4*i+1];
ydst[2*i+1] = src[4*i+3];
}
ydst += lumStride;
src += srcStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(EMMS" \n\t"
SFENCE" \n\t"
:::"memory");
{
long y;
const x86_reg chromWidth= width>>1;
-#if HAVE_MMX
- for (y=0; y<height-2; y+=2)
- {
+#if COMPILE_TEMPLATE_MMX
+ for (y=0; y<height-2; y+=2) {
long i;
- for (i=0; i<2; i++)
- {
+ for (i=0; i<2; i++) {
__asm__ volatile(
"mov %2, %%"REG_a" \n\t"
"movq "MANGLE(ff_bgr2YCoeff)", %%mm6 \n\t"
"movq "MANGLE(ff_w1111)", %%mm5 \n\t"
"pxor %%mm7, %%mm7 \n\t"
"lea (%%"REG_a", %%"REG_a", 2), %%"REG_d" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_d") \n\t"
"movd (%0, %%"REG_d"), %%mm0 \n\t"
"pxor %%mm7, %%mm7 \n\t"
"lea (%%"REG_a", %%"REG_a", 2), %%"REG_d" \n\t"
"add %%"REG_d", %%"REG_d" \n\t"
- ASMALIGN(4)
+ ".p2align 4 \n\t"
"1: \n\t"
PREFETCH" 64(%0, %%"REG_d") \n\t"
PREFETCH" 64(%1, %%"REG_d") \n\t"
-#if HAVE_MMX2 || HAVE_AMD3DNOW
+#if COMPILE_TEMPLATE_MMX2 || COMPILE_TEMPLATE_AMD3DNOW
"movq (%0, %%"REG_d"), %%mm0 \n\t"
"movq (%1, %%"REG_d"), %%mm1 \n\t"
"movq 6(%0, %%"REG_d"), %%mm2 \n\t"
"packssdw %%mm1, %%mm0 \n\t" // V1 V0 U1 U0
"psraw $7, %%mm0 \n\t"
-#if HAVE_MMX2 || HAVE_AMD3DNOW
+#if COMPILE_TEMPLATE_MMX2 || COMPILE_TEMPLATE_AMD3DNOW
"movq 12(%0, %%"REG_d"), %%mm4 \n\t"
"movq 12(%1, %%"REG_d"), %%mm1 \n\t"
"movq 18(%0, %%"REG_d"), %%mm2 \n\t"
#else
y=0;
#endif
- for (; y<height; y+=2)
- {
+ for (; y<height; y+=2) {
long i;
- for (i=0; i<chromWidth; i++)
- {
+ for (i=0; i<chromWidth; i++) {
unsigned int b = src[6*i+0];
unsigned int g = src[6*i+1];
unsigned int r = src[6*i+2];
ydst += lumStride;
src += srcStride;
- for (i=0; i<chromWidth; i++)
- {
+ if(y+1 == height)
+ break;
+
+ for (i=0; i<chromWidth; i++) {
unsigned int b = src[6*i+0];
unsigned int g = src[6*i+1];
unsigned int r = src[6*i+2];
}
}
-static void RENAME(interleaveBytes)(uint8_t *src1, uint8_t *src2, uint8_t *dest,
+static void RENAME(interleaveBytes)(const uint8_t *src1, const uint8_t *src2, uint8_t *dest,
long width, long height, long src1Stride,
- long src2Stride, long dstStride){
+ long src2Stride, long dstStride)
+{
long h;
- for (h=0; h < height; h++)
- {
+ for (h=0; h < height; h++) {
long w;
-#if HAVE_MMX
-#if HAVE_SSE2
+#if COMPILE_TEMPLATE_MMX
+#if COMPILE_TEMPLATE_SSE2
__asm__(
"xor %%"REG_a", %%"REG_a" \n\t"
"1: \n\t"
: "memory", "%"REG_a
);
#endif
- for (w= (width&(~15)); w < width; w++)
- {
+ for (w= (width&(~15)); w < width; w++) {
dest[2*w+0] = src1[w];
dest[2*w+1] = src2[w];
}
#else
- for (w=0; w < width; w++)
- {
+ for (w=0; w < width; w++) {
dest[2*w+0] = src1[w];
dest[2*w+1] = src2[w];
}
#endif
dest += dstStride;
- src1 += src1Stride;
- src2 += src2Stride;
+ src1 += src1Stride;
+ src2 += src2Stride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
x86_reg y;
long x,w,h;
w=width/2; h=height/2;
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__ volatile(
PREFETCH" %0 \n\t"
PREFETCH" %1 \n\t"
::"m"(*(src1+srcStride1)),"m"(*(src2+srcStride2)):"memory");
#endif
- for (y=0;y<h;y++){
+ for (y=0;y<h;y++) {
const uint8_t* s1=src1+srcStride1*(y>>1);
uint8_t* d=dst1+dstStride1*y;
x=0;
-#if HAVE_MMX
- for (;x<w-31;x+=32)
- {
+#if COMPILE_TEMPLATE_MMX
+ for (;x<w-31;x+=32) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
#endif
for (;x<w;x++) d[2*x]=d[2*x+1]=s1[x];
}
- for (y=0;y<h;y++){
+ for (y=0;y<h;y++) {
const uint8_t* s2=src2+srcStride2*(y>>1);
uint8_t* d=dst2+dstStride2*y;
x=0;
-#if HAVE_MMX
- for (;x<w-31;x+=32)
- {
+#if COMPILE_TEMPLATE_MMX
+ for (;x<w-31;x+=32) {
__asm__ volatile(
PREFETCH" 32%1 \n\t"
"movq %1, %%mm0 \n\t"
#endif
for (;x<w;x++) d[2*x]=d[2*x+1]=s2[x];
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
x86_reg x;
long y,w,h;
w=width/2; h=height;
- for (y=0;y<h;y++){
+ for (y=0;y<h;y++) {
const uint8_t* yp=src1+srcStride1*y;
const uint8_t* up=src2+srcStride2*(y>>2);
const uint8_t* vp=src3+srcStride3*(y>>2);
uint8_t* d=dst+dstStride*y;
x=0;
-#if HAVE_MMX
- for (;x<w-7;x+=8)
- {
+#if COMPILE_TEMPLATE_MMX
+ for (;x<w-7;x+=8) {
__asm__ volatile(
PREFETCH" 32(%1, %0) \n\t"
PREFETCH" 32(%2, %0) \n\t"
:"memory");
}
#endif
- for (; x<w; x++)
- {
+ for (; x<w; x++) {
const long x2 = x<<2;
d[8*x+0] = yp[x2];
d[8*x+1] = up[x];
d[8*x+7] = vp[x];
}
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
src += 2*count;
count= - count;
-#if HAVE_MMX
- if(count <= -16){
+#if COMPILE_TEMPLATE_MMX
+ if(count <= -16) {
count += 15;
__asm__ volatile(
"pcmpeqw %%mm7, %%mm7 \n\t"
count -= 15;
}
#endif
- while(count<0){
+ while(count<0) {
dst[count]= src[2*count];
count++;
}
dst1+= count;
src += 4*count;
count= - count;
-#if HAVE_MMX
- if(count <= -8){
+#if COMPILE_TEMPLATE_MMX
+ if(count <= -8) {
count += 7;
__asm__ volatile(
"pcmpeqw %%mm7, %%mm7 \n\t"
count -= 7;
}
#endif
- while(count<0){
+ while(count<0) {
dst0[count]= src[4*count+0];
dst1[count]= src[4*count+2];
count++;
src1 += 4*count;
count= - count;
#ifdef PAVGB
- if(count <= -8){
+ if(count <= -8) {
count += 7;
__asm__ volatile(
"pcmpeqw %%mm7, %%mm7 \n\t"
count -= 7;
}
#endif
- while(count<0){
+ while(count<0) {
dst0[count]= (src0[4*count+0]+src1[4*count+0])>>1;
dst1[count]= (src0[4*count+2]+src1[4*count+2])>>1;
count++;
dst1+= count;
src += 4*count;
count= - count;
-#if HAVE_MMX
- if(count <= -8){
+#if COMPILE_TEMPLATE_MMX
+ if(count <= -8) {
count += 7;
__asm__ volatile(
"pcmpeqw %%mm7, %%mm7 \n\t"
}
#endif
src++;
- while(count<0){
+ while(count<0) {
dst0[count]= src[4*count+0];
dst1[count]= src[4*count+2];
count++;
src1 += 4*count;
count= - count;
#ifdef PAVGB
- if(count <= -8){
+ if(count <= -8) {
count += 7;
__asm__ volatile(
"pcmpeqw %%mm7, %%mm7 \n\t"
#endif
src0++;
src1++;
- while(count<0){
+ while(count<0) {
dst0[count]= (src0[4*count+0]+src1[4*count+0])>>1;
dst1[count]= (src0[4*count+2]+src1[4*count+2])>>1;
count++;
long y;
const long chromWidth= -((-width)>>1);
- for (y=0; y<height; y++){
+ for (y=0; y<height; y++) {
RENAME(extract_even)(src, ydst, width);
- if(y&1){
+ if(y&1) {
RENAME(extract_odd2avg)(src-srcStride, src, udst, vdst, chromWidth);
udst+= chromStride;
vdst+= chromStride;
src += srcStride;
ydst+= lumStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
long y;
const long chromWidth= -((-width)>>1);
- for (y=0; y<height; y++){
+ for (y=0; y<height; y++) {
RENAME(extract_even)(src, ydst, width);
RENAME(extract_odd2)(src, udst, vdst, chromWidth);
udst+= chromStride;
vdst+= chromStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
long y;
const long chromWidth= -((-width)>>1);
- for (y=0; y<height; y++){
+ for (y=0; y<height; y++) {
RENAME(extract_even)(src+1, ydst, width);
- if(y&1){
+ if(y&1) {
RENAME(extract_even2avg)(src-srcStride, src, udst, vdst, chromWidth);
udst+= chromStride;
vdst+= chromStride;
src += srcStride;
ydst+= lumStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
long y;
const long chromWidth= -((-width)>>1);
- for (y=0; y<height; y++){
+ for (y=0; y<height; y++) {
RENAME(extract_even)(src+1, ydst, width);
RENAME(extract_even2)(src, udst, vdst, chromWidth);
udst+= chromStride;
vdst+= chromStride;
}
-#if HAVE_MMX
+#if COMPILE_TEMPLATE_MMX
__asm__(
EMMS" \n\t"
SFENCE" \n\t"
#endif
}
-static inline void RENAME(rgb2rgb_init)(void){
+static inline void RENAME(rgb2rgb_init)(void)
+{
rgb15to16 = RENAME(rgb15to16);
rgb15tobgr24 = RENAME(rgb15tobgr24);
rgb15to32 = RENAME(rgb15to32);
rgb24to15 = RENAME(rgb24to15);
rgb24to16 = RENAME(rgb24to16);
rgb24tobgr24 = RENAME(rgb24tobgr24);
- rgb32tobgr32 = RENAME(rgb32tobgr32);
+ shuffle_bytes_2103 = RENAME(shuffle_bytes_2103);
rgb32tobgr16 = RENAME(rgb32tobgr16);
rgb32tobgr15 = RENAME(rgb32tobgr15);
yv12toyuy2 = RENAME(yv12toyuy2);
yuv422ptoyuy2 = RENAME(yuv422ptoyuy2);
yuv422ptouyvy = RENAME(yuv422ptouyvy);
yuy2toyv12 = RENAME(yuy2toyv12);
-// yvu9toyv12 = RENAME(yvu9toyv12);
planar2x = RENAME(planar2x);
rgb24toyv12 = RENAME(rgb24toyv12);
interleaveBytes = RENAME(interleaveBytes);
projects / ffmpeg / blobdiff