/* Build the opcode handler table */
void m68ki_build_opcode_table(void);
-extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+struct m68ki_cpu_core;
+
+extern void (*m68ki_instruction_jump_table[0x10000])(struct m68ki_cpu_core *state); /* opcode handler jump table */
extern unsigned char m68ki_cycles[][0x10000];
#define NUM_CPU_TYPES 5
-void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
+void (*m68ki_instruction_jump_table[0x10000])(m68ki_cpu_core *state); /* opcode handler jump table */
unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
/* This is used to generate the opcode handler jump table */
typedef struct
{
- void (*opcode_handler)(void); /* handler function */
+ void (*opcode_handler)(m68ki_cpu_core *state); /* handler function */
unsigned int mask; /* mask on opcode */
unsigned int match; /* what to match after masking */
unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
#include <stdio.h>
#include "m68kcpu.h"
-extern void m68040_fpu_op0(void);
-extern void m68040_fpu_op1(void);
-extern void m68851_mmu_ops();
-extern void m68881_ftrap();
+extern void m68040_fpu_op0(m68ki_cpu_core *state);
+extern void m68040_fpu_op1(m68ki_cpu_core *state);
+extern void m68851_mmu_ops(m68ki_cpu_core *state);
+extern void m68881_ftrap(m68ki_cpu_core *state);
/* ======================================================================== */
/* ========================= INSTRUCTION HANDLERS ========================= */
// printf("FPU 040fpu0 HAS_FPU=%d\n",!!HAS_FPU);
if(HAS_FPU)
{
- m68040_fpu_op0();
+ void m68040_fpu_op0(m68ki_cpu_core *state);
return;
}
m68ki_exception_1111();
// printf("FPU 040fpu1 HAS_FPU=%d\n",!!HAS_FPU);
if(HAS_FPU)
{
- m68040_fpu_op1();
+ void m68040_fpu_op1(m68ki_cpu_core *state);
return;
}
m68ki_exception_1111();
M68KMAKE_OP(abcd, 8, mm, ax7)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
M68KMAKE_OP(abcd, 8, mm, ay7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
M68KMAKE_OP(abcd, 8, mm, axy7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
M68KMAKE_OP(abcd, 8, mm, .)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
M68KMAKE_OP(addi, 8, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint dst = MASK_OUT_ABOVE_8(*r_dst);
uint res = src + dst;
M68KMAKE_OP(addi, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint dst = m68ki_read_8(ea);
uint res = src + dst;
M68KMAKE_OP(addi, 16, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint dst = MASK_OUT_ABOVE_16(*r_dst);
uint res = src + dst;
M68KMAKE_OP(addi, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint dst = m68ki_read_16(ea);
uint res = src + dst;
M68KMAKE_OP(addi, 32, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint dst = *r_dst;
uint res = src + dst;
M68KMAKE_OP(addi, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint dst = m68ki_read_32(ea);
uint res = src + dst;
M68KMAKE_OP(addx, 8, mm, ax7)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(addx, 8, mm, ay7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(addx, 8, mm, axy7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(addx, 8, mm, .)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(addx, 16, mm, .)
{
- uint src = OPER_AY_PD_16();
+ uint src = OPER_AY_PD_16(state);
uint ea = EA_AX_PD_16();
uint dst = m68ki_read_16(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(addx, 32, mm, .)
{
- uint src = OPER_AY_PD_32();
+ uint src = OPER_AY_PD_32(state);
uint ea = EA_AX_PD_32();
uint dst = m68ki_read_32(ea);
uint res = src + dst + XFLAG_AS_1();
M68KMAKE_OP(andi, 8, ., d)
{
- FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
+ FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8(state) | 0xffffff00));
FLAG_N = NFLAG_8(FLAG_Z);
FLAG_C = CFLAG_CLEAR;
M68KMAKE_OP(andi, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint res = src & m68ki_read_8(ea);
M68KMAKE_OP(andi, 16, ., d)
{
- FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
+ FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16(state) | 0xffff0000));
FLAG_N = NFLAG_16(FLAG_Z);
FLAG_C = CFLAG_CLEAR;
M68KMAKE_OP(andi, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint res = src & m68ki_read_16(ea);
M68KMAKE_OP(andi, 32, ., d)
{
- FLAG_Z = DY &= (OPER_I_32());
+ FLAG_Z = DY &= (OPER_I_32(state));
FLAG_N = NFLAG_32(FLAG_Z);
FLAG_C = CFLAG_CLEAR;
M68KMAKE_OP(andi, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint res = src & m68ki_read_32(ea);
M68KMAKE_OP(andi, 16, toc, .)
{
- m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8());
+ m68ki_set_ccr(m68ki_get_ccr() & OPER_I_8(state));
}
{
if(FLAG_S)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr(m68ki_get_sr() & src);
+ m68ki_set_sr(state, m68ki_get_sr() & src);
return;
}
m68ki_exception_privilege_violation();
{
if(M68KMAKE_CC)
{
- uint offset = OPER_I_16();
+ uint offset = OPER_I_16(state);
REG_PC -= 2;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(offset);
{
if(M68KMAKE_CC)
{
- uint offset = OPER_I_32();
+ uint offset = OPER_I_32(state);
REG_PC -= 4;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32(offset);
M68KMAKE_OP(bchg, 32, s, d)
{
uint* r_dst = &DY;
- uint mask = 1 << (OPER_I_8() & 0x1f);
+ uint mask = 1 << (OPER_I_8(state) & 0x1f);
FLAG_Z = *r_dst & mask;
*r_dst ^= mask;
M68KMAKE_OP(bchg, 8, s, .)
{
- uint mask = 1 << (OPER_I_8() & 7);
+ uint mask = 1 << (OPER_I_8(state) & 7);
uint ea = M68KMAKE_GET_EA_AY_8;
uint src = m68ki_read_8(ea);
M68KMAKE_OP(bclr, 32, s, d)
{
uint* r_dst = &DY;
- uint mask = 1 << (OPER_I_8() & 0x1f);
+ uint mask = 1 << (OPER_I_8(state) & 0x1f);
FLAG_Z = *r_dst & mask;
*r_dst &= ~mask;
M68KMAKE_OP(bclr, 8, s, .)
{
- uint mask = 1 << (OPER_I_8() & 7);
+ uint mask = 1 << (OPER_I_8(state) & 7);
uint ea = M68KMAKE_GET_EA_AY_8;
uint src = m68ki_read_8(ea);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint* data = &DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint mask_base;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint* data = &DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint mask_base;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint64 data = DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint data;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint64 data = DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint data;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint64 data = DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
sint local_offset;
uint width = word2;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint* data = &DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint insert_base = REG_D[(word2>>12)&7];
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint* data = &DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint mask_base;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint offset = (word2>>6)&31;
uint width = word2;
uint* data = &DY;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint offset = (word2>>6)&31;
uint width = word2;
uint mask_base;
M68KMAKE_OP(bra, 16, ., .)
{
- uint offset = OPER_I_16();
+ uint offset = OPER_I_16(state);
REG_PC -= 2;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(offset);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint offset = OPER_I_32();
+ uint offset = OPER_I_32(state);
REG_PC -= 4;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32(offset);
M68KMAKE_OP(bset, 32, s, d)
{
uint* r_dst = &DY;
- uint mask = 1 << (OPER_I_8() & 0x1f);
+ uint mask = 1 << (OPER_I_8(state) & 0x1f);
FLAG_Z = *r_dst & mask;
*r_dst |= mask;
M68KMAKE_OP(bset, 8, s, .)
{
- uint mask = 1 << (OPER_I_8() & 7);
+ uint mask = 1 << (OPER_I_8(state) & 7);
uint ea = M68KMAKE_GET_EA_AY_8;
uint src = m68ki_read_8(ea);
M68KMAKE_OP(bsr, 16, ., .)
{
- uint offset = OPER_I_16();
+ uint offset = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_push_32(REG_PC);
REG_PC -= 2;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint offset = OPER_I_32();
+ uint offset = OPER_I_32(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_push_32(REG_PC);
REG_PC -= 4;
M68KMAKE_OP(btst, 32, s, d)
{
- FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
+ FLAG_Z = DY & (1 << (OPER_I_8(state) & 0x1f));
}
M68KMAKE_OP(btst, 8, s, .)
{
- uint bit = OPER_I_8() & 7;
+ uint bit = OPER_I_8(state) & 7;
FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
}
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint dest = m68ki_read_8(ea);
uint* compare = ®_D[word2 & 7];
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint dest = m68ki_read_16(ea);
uint* compare = ®_D[word2 & 7];
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint dest = m68ki_read_32(ea);
uint* compare = ®_D[word2 & 7];
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_32();
+ uint word2 = OPER_I_32(state);
uint* compare1 = ®_D[(word2 >> 16) & 7];
uint ea1 = REG_DA[(word2 >> 28) & 15];
uint dest1 = m68ki_read_16(ea1);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_32();
+ uint word2 = OPER_I_32(state);
uint* compare1 = ®_D[(word2 >> 16) & 7];
uint ea1 = REG_DA[(word2 >> 28) & 15];
uint dest1 = m68ki_read_32(ea1);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xff;
return;
}
-
+
m68ki_exception_illegal();
}
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xff;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xff;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xffff;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xffff;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
sint compare = REG_DA[(word2 >> 12) & 15];
if(!BIT_F(word2))
compare &= 0xffff;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint32 word2 = OPER_I_16();
+ uint32 word2 = OPER_I_16(state);
sint64 compare = REG_DA[(word2 >> 12) & 15];
uint32 ea = EA_PCDI_32();
sint64 lower_bound = m68ki_read_pcrel_32(ea);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint32 word2 = OPER_I_16();
+ uint32 word2 = OPER_I_16(state);
sint64 compare = REG_DA[(word2 >> 12) & 15];
uint32 ea = EA_PCIX_32();
sint64 lower_bound = m68ki_read_32(ea);
M68KMAKE_OP(chk2cmp2, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
- {
- uint32 word2 = OPER_I_16();
+ {
+ uint32 word2 = OPER_I_16(state);
sint64 compare = REG_DA[(word2 >> 12) & 15];
uint32 ea = M68KMAKE_GET_EA_AY_32;
sint64 lower_bound = m68ki_read_32(ea);
M68KMAKE_OP(cmpi, 8, ., d)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint dst = MASK_OUT_ABOVE_8(DY);
uint res = dst - src;
M68KMAKE_OP(cmpi, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint dst = M68KMAKE_GET_OPER_AY_8;
uint res = dst - src;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_8();
- uint dst = OPER_PCDI_8();
+ uint src = OPER_I_8(state);
+ uint dst = OPER_PCDI_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_8();
- uint dst = OPER_PCIX_8();
+ uint src = OPER_I_8(state);
+ uint dst = OPER_PCIX_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
M68KMAKE_OP(cmpi, 16, ., d)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint dst = MASK_OUT_ABOVE_16(DY);
uint res = dst - src;
M68KMAKE_OP(cmpi, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint dst = M68KMAKE_GET_OPER_AY_16;
uint res = dst - src;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_16();
- uint dst = OPER_PCDI_16();
+ uint src = OPER_I_16(state);
+ uint dst = OPER_PCDI_16(state);
uint res = dst - src;
FLAG_N = NFLAG_16(res);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_16();
- uint dst = OPER_PCIX_16();
+ uint src = OPER_I_16(state);
+ uint dst = OPER_PCIX_16(state);
uint res = dst - src;
FLAG_N = NFLAG_16(res);
M68KMAKE_OP(cmpi, 32, ., d)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint dst = DY;
uint res = dst - src;
M68KMAKE_OP(cmpi, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint dst = M68KMAKE_GET_OPER_AY_32;
uint res = dst - src;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_32();
- uint dst = OPER_PCDI_32();
+ uint src = OPER_I_32(state);
+ uint dst = OPER_PCDI_32(state);
uint res = dst - src;
FLAG_N = NFLAG_32(res);
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_I_32();
- uint dst = OPER_PCIX_32();
+ uint src = OPER_I_32(state);
+ uint dst = OPER_PCIX_32(state);
uint res = dst - src;
FLAG_N = NFLAG_32(res);
M68KMAKE_OP(cmpm, 8, ., ax7)
{
- uint src = OPER_AY_PI_8();
- uint dst = OPER_A7_PI_8();
+ uint src = OPER_AY_PI_8(state);
+ uint dst = OPER_A7_PI_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
M68KMAKE_OP(cmpm, 8, ., ay7)
{
- uint src = OPER_A7_PI_8();
- uint dst = OPER_AX_PI_8();
+ uint src = OPER_A7_PI_8(state);
+ uint dst = OPER_AX_PI_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
M68KMAKE_OP(cmpm, 8, ., axy7)
{
- uint src = OPER_A7_PI_8();
- uint dst = OPER_A7_PI_8();
+ uint src = OPER_A7_PI_8(state);
+ uint dst = OPER_A7_PI_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
M68KMAKE_OP(cmpm, 8, ., .)
{
- uint src = OPER_AY_PI_8();
- uint dst = OPER_AX_PI_8();
+ uint src = OPER_AY_PI_8(state);
+ uint dst = OPER_AX_PI_8(state);
uint res = dst - src;
FLAG_N = NFLAG_8(res);
M68KMAKE_OP(cmpm, 16, ., .)
{
- uint src = OPER_AY_PI_16();
- uint dst = OPER_AX_PI_16();
+ uint src = OPER_AY_PI_16(state);
+ uint dst = OPER_AX_PI_16(state);
uint res = dst - src;
FLAG_N = NFLAG_16(res);
M68KMAKE_OP(cmpm, 32, ., .)
{
- uint src = OPER_AY_PI_32();
- uint dst = OPER_AX_PI_32();
+ uint src = OPER_AY_PI_32(state);
+ uint dst = OPER_AX_PI_32(state);
uint res = dst - src;
FLAG_N = NFLAG_32(res);
m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
m68ki_disassemble_quick(ADDRESS_68K(REG_PC - 2),CPU_TYPE)));
// JFF: unsupported, but at least if the trap doesn't occur, app should still work, so at least PC increase is correct
- REG_PC += 4;
+ REG_PC += 4;
return;
}
m68ki_exception_1111();
{
if(HAS_FPU)
{
- m68881_ftrap();
+ m68881_ftrap(state);
} else {
m68ki_exception_1111();
}
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- uint offset = OPER_I_16();
+ uint offset = OPER_I_16(state);
REG_PC -= 2;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(offset);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- uint offset = OPER_I_16();
+ uint offset = OPER_I_16(state);
REG_PC -= 2;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(offset);
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint64 divisor = DY;
uint64 dividend = 0;
uint64 quotient = 0;
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint divisor = DY;
uint dividend_hi = REG_D[word2 & 7];
uint dividend_lo = REG_D[(word2 >> 12) & 7];
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint64 divisor = M68KMAKE_GET_OPER_AY_32;
uint64 dividend = 0;
uint64 quotient = 0;
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint divisor = M68KMAKE_GET_OPER_AY_32;
uint dividend_hi = REG_D[word2 & 7];
uint dividend_lo = REG_D[(word2 >> 12) & 7];
M68KMAKE_OP(eori, 8, ., d)
{
- uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
+ uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8(state));
FLAG_N = NFLAG_8(res);
FLAG_Z = res;
M68KMAKE_OP(eori, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint res = src ^ m68ki_read_8(ea);
M68KMAKE_OP(eori, 16, ., d)
{
- uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
+ uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16(state));
FLAG_N = NFLAG_16(res);
FLAG_Z = res;
M68KMAKE_OP(eori, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint res = src ^ m68ki_read_16(ea);
M68KMAKE_OP(eori, 32, ., d)
{
- uint res = DY ^= OPER_I_32();
+ uint res = DY ^= OPER_I_32(state);
FLAG_N = NFLAG_32(res);
FLAG_Z = res;
M68KMAKE_OP(eori, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint res = src ^ m68ki_read_32(ea);
M68KMAKE_OP(eori, 16, toc, .)
{
- m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8());
+ m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_8(state));
}
{
if(FLAG_S)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr(m68ki_get_sr() ^ src);
+ m68ki_set_sr(state, m68ki_get_sr() ^ src);
return;
}
m68ki_exception_privilege_violation();
{
REG_A[7] -= 4;
m68ki_write_32(REG_A[7], REG_A[7]);
- REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state)));
}
m68ki_push_32(*r_dst);
*r_dst = REG_A[7];
- REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state)));
}
{
REG_A[7] -= 4;
m68ki_write_32(REG_A[7], REG_A[7]);
- REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32(state));
return;
}
m68ki_exception_illegal();
m68ki_push_32(*r_dst);
*r_dst = REG_A[7];
- REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32(state));
return;
}
m68ki_exception_illegal();
{
if(FLAG_S)
{
- m68ki_set_sr(DY);
+ m68ki_set_sr(state, DY);
return;
}
m68ki_exception_privilege_violation();
{
uint new_sr = M68KMAKE_GET_OPER_AY_16;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
return;
}
m68ki_exception_privilege_violation();
{
if(FLAG_S)
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
{
if(FLAG_S)
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
}
if (REG_CACR & (M68K_CACR_CI | M68K_CACR_CEI)) {
- m68ki_ic_clear();
+ m68ki_ic_clear(state);
}
return;
}
M68KMAKE_OP(movem, 16, re, pd)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = AY;
uint count = 0;
M68KMAKE_OP(movem, 16, re, .)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint count = 0;
M68KMAKE_OP(movem, 32, re, pd)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = AY;
uint count = 0;
M68KMAKE_OP(movem, 32, re, .)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint count = 0;
M68KMAKE_OP(movem, 16, er, pi)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = AY;
uint count = 0;
M68KMAKE_OP(movem, 16, er, pcdi)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = EA_PCDI_16();
uint count = 0;
M68KMAKE_OP(movem, 16, er, pcix)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = EA_PCIX_16();
uint count = 0;
M68KMAKE_OP(movem, 16, er, .)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint count = 0;
M68KMAKE_OP(movem, 32, er, pi)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = AY;
uint count = 0;
M68KMAKE_OP(movem, 32, er, pcdi)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = EA_PCDI_32();
uint count = 0;
M68KMAKE_OP(movem, 32, er, pcix)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = EA_PCIX_32();
uint count = 0;
M68KMAKE_OP(movem, 32, er, .)
{
uint i = 0;
- uint register_list = OPER_I_16();
+ uint register_list = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint count = 0;
{
if(FLAG_S)
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_8;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
{
if(FLAG_S)
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
{
if(FLAG_S)
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_32;
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
M68KMAKE_OP(move16, 32, ., .)
{
- uint16 w2 = OPER_I_16();
+ uint16 w2 = OPER_I_16(state);
int ax = REG_IR & 7;
int ay = (w2 >> 12) & 7;
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint64 src = DY;
uint64 dst = REG_D[(word2 >> 12) & 7];
uint64 res;
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint src = DY;
uint dst = REG_D[(word2 >> 12) & 7];
uint neg = GET_MSB_32(src ^ dst);
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint64 src = M68KMAKE_GET_OPER_AY_32;
uint64 dst = REG_D[(word2 >> 12) & 7];
uint64 res;
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint word2 = OPER_I_16();
+ uint word2 = OPER_I_16(state);
uint src = M68KMAKE_GET_OPER_AY_32;
uint dst = REG_D[(word2 >> 12) & 7];
uint neg = GET_MSB_32(src ^ dst);
M68KMAKE_OP(ori, 8, ., d)
{
- uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
+ uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8(state)));
FLAG_N = NFLAG_8(res);
FLAG_Z = res;
M68KMAKE_OP(ori, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
M68KMAKE_OP(ori, 16, ., d)
{
- uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
+ uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16(state));
FLAG_N = NFLAG_16(res);
FLAG_Z = res;
M68KMAKE_OP(ori, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
M68KMAKE_OP(ori, 32, ., d)
{
- uint res = DY |= OPER_I_32();
+ uint res = DY |= OPER_I_32(state);
FLAG_N = NFLAG_32(res);
FLAG_Z = res;
M68KMAKE_OP(ori, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint res = src | m68ki_read_32(ea);
M68KMAKE_OP(ori, 16, toc, .)
{
- m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8());
+ m68ki_set_ccr(m68ki_get_ccr() | OPER_I_8(state));
}
{
if(FLAG_S)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
- m68ki_set_sr(m68ki_get_sr() | src);
+ m68ki_set_sr(state, m68ki_get_sr() | src);
return;
}
m68ki_exception_privilege_violation();
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
/* Note: DX and DY are reversed in Motorola's docs */
- uint src = DY + OPER_I_16();
+ uint src = DY + OPER_I_16(state);
uint* r_dst = &DX;
*r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
uint ea_src = EA_AY_PD_8();
uint src = m68ki_read_8(ea_src);
ea_src = EA_AY_PD_8();
- src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
+ src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16(state);
m68ki_write_8(EA_A7_PD_8(), ((src >> 8) & 0x000f) | ((src<<4) & 0x00f0));
return;
uint ea_src = EA_A7_PD_8();
uint src = m68ki_read_8(ea_src);
ea_src = EA_A7_PD_8();
- src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16();
+ src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state);
m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
return;
uint ea_src = EA_A7_PD_8();
uint src = m68ki_read_8(ea_src);
ea_src = EA_A7_PD_8();
- src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16();
+ src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state);
m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
return;
uint ea_src = EA_AY_PD_8();
uint src = m68ki_read_8(ea_src);
ea_src = EA_AY_PD_8();
- src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16();
+ src = (src | (m68ki_read_8(ea_src) << 8)) + OPER_I_16(state);
m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
return;
{
if ((CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) && (HAS_PMMU))
{
- m68851_mmu_ops();
+ void m68851_mmu_ops(m68ki_cpu_core *state);
}
else
{
uint new_pc = m68ki_pull_32();
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
- REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
+ REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16(state)));
m68ki_jump(new_pc);
return;
}
new_sr = m68ki_pull_16();
new_pc = m68ki_pull_32();
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
new_pc = m68ki_pull_32();
m68ki_fake_pull_16(); /* format word */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
new_pc = m68ki_pull_32();
m68ki_fake_pull_16(); /* format word */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
m68ki_fake_pull_16(); /* special status */
new_pc = m68ki_pull_32();
m68ki_fake_pull_16(); /* format word */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
new_sr = m68ki_pull_16();
m68ki_fake_pull_32(); /* program counter */
m68ki_fake_pull_16(); /* format word */
- m68ki_set_sr_noint(new_sr);
+ m68ki_set_sr_noint(state, new_sr);
goto rte_loop;
case 2: /* Trap */
new_sr = m68ki_pull_16();
m68ki_fake_pull_16(); /* format word */
m68ki_fake_pull_32(); /* address */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
m68ki_fake_pull_32(); /* $34: pd2 */
m68ki_fake_pull_32(); /* $38: pd3 */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
m68ki_fake_pull_32(); /* $1c: internal registers */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
m68ki_fake_pull_32(); /* $58: */
m68ki_jump(new_pc);
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
CPU_INSTR_MODE = INSTRUCTION_YES;
CPU_RUN_MODE = RUN_MODE_NORMAL;
return;
M68KMAKE_OP(sbcd, 8, mm, ax7)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
M68KMAKE_OP(sbcd, 8, mm, ay7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
M68KMAKE_OP(sbcd, 8, mm, axy7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
M68KMAKE_OP(sbcd, 8, mm, .)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
{
if(FLAG_S)
{
- uint new_sr = OPER_I_16();
+ uint new_sr = OPER_I_16(state);
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
CPU_STOPPED |= STOP_LEVEL_STOP;
- m68ki_set_sr(new_sr);
+ m68ki_set_sr(state, new_sr);
if(m68ki_remaining_cycles >= CYC_INSTRUCTION[REG_IR])
m68ki_remaining_cycles = CYC_INSTRUCTION[REG_IR];
else
M68KMAKE_OP(subi, 8, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint dst = MASK_OUT_ABOVE_8(*r_dst);
uint res = dst - src;
M68KMAKE_OP(subi, 8, ., .)
{
- uint src = OPER_I_8();
+ uint src = OPER_I_8(state);
uint ea = M68KMAKE_GET_EA_AY_8;
uint dst = m68ki_read_8(ea);
uint res = dst - src;
M68KMAKE_OP(subi, 16, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint dst = MASK_OUT_ABOVE_16(*r_dst);
uint res = dst - src;
M68KMAKE_OP(subi, 16, ., .)
{
- uint src = OPER_I_16();
+ uint src = OPER_I_16(state);
uint ea = M68KMAKE_GET_EA_AY_16;
uint dst = m68ki_read_16(ea);
uint res = dst - src;
M68KMAKE_OP(subi, 32, ., d)
{
uint* r_dst = &DY;
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint dst = *r_dst;
uint res = dst - src;
M68KMAKE_OP(subi, 32, ., .)
{
- uint src = OPER_I_32();
+ uint src = OPER_I_32(state);
uint ea = M68KMAKE_GET_EA_AY_32;
uint dst = m68ki_read_32(ea);
uint res = dst - src;
M68KMAKE_OP(subx, 8, mm, ax7)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = dst - src - XFLAG_AS_1();
M68KMAKE_OP(subx, 8, mm, ay7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = dst - src - XFLAG_AS_1();
M68KMAKE_OP(subx, 8, mm, axy7)
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea = EA_A7_PD_8();
uint dst = m68ki_read_8(ea);
uint res = dst - src - XFLAG_AS_1();
M68KMAKE_OP(subx, 8, mm, .)
{
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea = EA_AX_PD_8();
uint dst = m68ki_read_8(ea);
uint res = dst - src - XFLAG_AS_1();
M68KMAKE_OP(subx, 16, mm, .)
{
- uint src = OPER_AY_PD_16();
+ uint src = OPER_AY_PD_16(state);
uint ea = EA_AX_PD_16();
uint dst = m68ki_read_16(ea);
uint res = dst - src - XFLAG_AS_1();
M68KMAKE_OP(subx, 32, mm, .)
{
- uint src = OPER_AY_PD_32();
+ uint src = OPER_AY_PD_32(state);
uint ea = EA_AX_PD_32();
uint dst = m68ki_read_32(ea);
uint res = dst - src - XFLAG_AS_1();
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCDI_8();
+ uint res = OPER_PCDI_8(state);
FLAG_N = NFLAG_8(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCIX_8();
+ uint res = OPER_PCIX_8(state);
FLAG_N = NFLAG_8(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_I_8();
+ uint res = OPER_I_8(state);
FLAG_N = NFLAG_8(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCDI_16();
+ uint res = OPER_PCDI_16(state);
FLAG_N = NFLAG_16(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCIX_16();
+ uint res = OPER_PCIX_16(state);
FLAG_N = NFLAG_16(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_I_16();
+ uint res = OPER_I_16(state);
FLAG_N = NFLAG_16(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCDI_32();
+ uint res = OPER_PCDI_32(state);
FLAG_N = NFLAG_32(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_PCIX_32();
+ uint res = OPER_PCIX_32(state);
FLAG_N = NFLAG_32(res);
FLAG_Z = res;
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint res = OPER_I_32();
+ uint res = OPER_I_32(state);
FLAG_N = NFLAG_32(res);
FLAG_Z = res;
uint src = DY;
uint* r_dst = &DX;
- *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
+ *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state)) & 0xffff);
return;
}
m68ki_exception_illegal();
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
/* Note: AX and AY are reversed in Motorola's docs */
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea_dst;
- src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state);
ea_dst = EA_A7_PD_8();
m68ki_write_8(ea_dst, src & 0xff);
ea_dst = EA_A7_PD_8();
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
/* Note: AX and AY are reversed in Motorola's docs */
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea_dst;
- src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state);
ea_dst = EA_AX_PD_8();
m68ki_write_8(ea_dst, src & 0xff);
ea_dst = EA_AX_PD_8();
{
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
- uint src = OPER_A7_PD_8();
+ uint src = OPER_A7_PD_8(state);
uint ea_dst;
- src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state);
ea_dst = EA_A7_PD_8();
m68ki_write_8(ea_dst, src & 0xff);
ea_dst = EA_A7_PD_8();
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
{
/* Note: AX and AY are reversed in Motorola's docs */
- uint src = OPER_AY_PD_8();
+ uint src = OPER_AY_PD_8(state);
uint ea_dst;
- src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
+ src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(state);
ea_dst = EA_AX_PD_8();
m68ki_write_8(ea_dst, src & 0xff);
ea_dst = EA_AX_PD_8();
projects / pistorm / blobdiff