introducing CPU state parameter 5 - now switched most register state over

[pistorm] / m68kmmu.h

diff --git a/m68kmmu.h b/m68kmmu.h
index d3bd403374d662ece538781bce41a61ff7079121..89b94aae102299371f600d374a59102a63d65b99 100644 (file)
--- a/m68kmmu.h
+++ b/m68kmmu.h
@@ -207,12 +207,12 @@ void pmmu_atc_flush(m68ki_cpu_core *state)
        m68ki_cpu.mmu_atc_rr = 0;
 }
 
-int fc_from_modes(uint16 modes);
+int fc_from_modes(m68ki_cpu_core *state, uint16 modes);
 
 void pmmu_atc_flush_fc_ea(m68ki_cpu_core *state, uint16 modes)
 {
        unsigned int fcmask = (modes >> 5) & 7;
-       unsigned int fc = fc_from_modes(modes) & fcmask;
+       unsigned int fc = fc_from_modes(state, modes) & fcmask;
        unsigned int ps = (m68ki_cpu.mmu_tc >> 20) & 0xf;
        unsigned int mode = (modes >> 10) & 7;
        uint32 ea;
@@ -900,7 +900,7 @@ uint32 pmmu_translate_addr(m68ki_cpu_core *state, uint32 addr_in, uint16 rw)
        return addr_out;
 }
 
-int fc_from_modes(uint16 modes)
+int fc_from_modes(m68ki_cpu_core *state, uint16 modes)
 {
        if ((modes & 0x1f) == 0)
        {
@@ -946,7 +946,7 @@ int fc_from_modes(uint16 modes)
 void m68851_pload(m68ki_cpu_core *state, uint32 ea, uint16 modes)
 {
        uint32 ltmp = DECODE_EA_32(state, ea);
-       int fc = fc_from_modes(modes);
+       int fc = fc_from_modes(state, modes);
        uint16 rw = !!(modes & 0x200);
 
        MMULOG(("%s: PLOAD%c addr=%08x, fc=%d\n", __func__, rw ? 'R' : 'W', ltmp, fc));
@@ -966,7 +966,7 @@ void m68851_pload(m68ki_cpu_core *state, uint32 ea, uint16 modes)
        else
        {
                MMULOG(("PLOAD with MMU disabled on MC68851\n"));
-               m68ki_exception_trap(57);
+               m68ki_exception_trap(state, 57);
                return;
        }
 }
@@ -978,7 +978,7 @@ void m68851_ptest(m68ki_cpu_core *state, uint32 ea, uint16 modes)
 
        int level = (modes >> 10) & 7;
        uint16 rw = !!(modes & 0x200);
-       int fc = fc_from_modes(modes);
+       int fc = fc_from_modes(state, modes);
 
        MMULOG(("PMMU: PTEST%c (%04X) pc=%08x sp=%08x va=%08x fc=%x level=%x a=%d, areg=%d\n",
                        rw ? 'R' : 'W', modes, m68ki_cpu.ppc, REG_A[7], v_addr, fc, level,
@@ -1095,7 +1095,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
                                {
                                        logerror("MMU: TC invalid!\n");
                                        m68ki_cpu.mmu_tc &= ~0x80000000;
-                                       m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+                                       m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
                                } else {
                                        m68ki_cpu.pmmu_enabled = 1;
                                }
@@ -1121,7 +1121,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
                        // SRP type 0 is not allowed
                        if ((m68ki_cpu.mmu_srp_limit & 3) == 0)
                        {
-                               m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+                               m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
                                return;
                        }
 
@@ -1139,7 +1139,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
                        // CRP type 0 is not allowed
                        if ((m68ki_cpu.mmu_crp_limit & 3) == 0)
                        {
-                               m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
+                               m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
                                return;
                        }