extern volatile uint16_t srdata;
extern uint8_t realtime_graphics_debug;
uint8_t realtime_disassembly;
+uint32_t do_disasm = 0;
char disasm_buf[4096];
int irq;
int gayleirq;
+// Configurable emulator options
+unsigned int cpu_type = M68K_CPU_TYPE_68000;
+unsigned int loop_cycles = 300;
+struct emulator_config *cfg = NULL;
+char keyboard_file[256] = "/dev/input/event1";
+
void *iplThread(void *args) {
printf("IPL thread running\n");
return args;
}
+void stop_cpu_emulation(uint8_t disasm_cur) {
+ m68k_end_timeslice();
+ if (disasm_cur) {
+ m68k_disassemble(disasm_buf, m68k_get_reg(NULL, M68K_REG_PC), cpu_type);
+ printf("REGA: 0:$%.8X 1:$%.8X 2:$%.8X 3:$%.8X 4:$%.8X 5:$%.8X 6:$%.8X 7:$%.8X\n", m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1), m68k_get_reg(NULL, M68K_REG_A2), m68k_get_reg(NULL, M68K_REG_A3), \
+ m68k_get_reg(NULL, M68K_REG_A4), m68k_get_reg(NULL, M68K_REG_A5), m68k_get_reg(NULL, M68K_REG_A6), m68k_get_reg(NULL, M68K_REG_A7));
+ printf("REGD: 0:$%.8X 1:$%.8X 2:$%.8X 3:$%.8X 4:$%.8X 5:$%.8X 6:$%.8X 7:$%.8X\n", m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2), m68k_get_reg(NULL, M68K_REG_D3), \
+ m68k_get_reg(NULL, M68K_REG_D4), m68k_get_reg(NULL, M68K_REG_D5), m68k_get_reg(NULL, M68K_REG_D6), m68k_get_reg(NULL, M68K_REG_D7));
+ printf("%.8X (%.8X)]] %s\n", m68k_get_reg(NULL, M68K_REG_PC), (m68k_get_reg(NULL, M68K_REG_PC) & 0xFFFFFF), disasm_buf);
+ realtime_disassembly = 1;
+ }
-// Configurable emulator options
-unsigned int cpu_type = M68K_CPU_TYPE_68000;
-unsigned int loop_cycles = 300;
-struct emulator_config *cfg = NULL;
-char keyboard_file[256] = "/dev/input/event1";
+ cpu_emulation_running = 0;
+ do_disasm = 0;
+}
//unsigned char g_kick[524288];
//unsigned char g_ram[FASTSIZE + 1]; /* RAM */
get_mouse_status(&mouse_dx, &mouse_dy, &mouse_buttons);
}
- if (cpu_emulation_running)
- m68k_execute(loop_cycles);
-
-disasm_run:;
- if (realtime_disassembly) {
- m68k_execute(1);
+ if (realtime_disassembly && (do_disasm || cpu_emulation_running)) {
m68k_disassemble(disasm_buf, m68k_get_reg(NULL, M68K_REG_PC), cpu_type);
- /*printf("REGA: 0:$%.8X 1:$%.8X 2:$%.8X 3:$%.8X 4:$%.8X 5:$%.8X 6:$%.8X 7:$%.8X\n", m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1), m68k_get_reg(NULL, M68K_REG_A2), m68k_get_reg(NULL, M68K_REG_A3), \
+ printf("REGA: 0:$%.8X 1:$%.8X 2:$%.8X 3:$%.8X 4:$%.8X 5:$%.8X 6:$%.8X 7:$%.8X\n", m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1), m68k_get_reg(NULL, M68K_REG_A2), m68k_get_reg(NULL, M68K_REG_A3), \
m68k_get_reg(NULL, M68K_REG_A4), m68k_get_reg(NULL, M68K_REG_A5), m68k_get_reg(NULL, M68K_REG_A6), m68k_get_reg(NULL, M68K_REG_A7));
printf("REGD: 0:$%.8X 1:$%.8X 2:$%.8X 3:$%.8X 4:$%.8X 5:$%.8X 6:$%.8X 7:$%.8X\n", m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2), m68k_get_reg(NULL, M68K_REG_D3), \
- m68k_get_reg(NULL, M68K_REG_D4), m68k_get_reg(NULL, M68K_REG_D5), m68k_get_reg(NULL, M68K_REG_D6), m68k_get_reg(NULL, M68K_REG_D7));*/
+ m68k_get_reg(NULL, M68K_REG_D4), m68k_get_reg(NULL, M68K_REG_D5), m68k_get_reg(NULL, M68K_REG_D6), m68k_get_reg(NULL, M68K_REG_D7));
printf("%.8X (%.8X)]] %s\n", m68k_get_reg(NULL, M68K_REG_PC), (m68k_get_reg(NULL, M68K_REG_PC) & 0xFFFFFF), disasm_buf);
+ if (do_disasm)
+ do_disasm--;
+ m68k_execute(1);
}
-
+ else {
+ if (cpu_emulation_running)
+ m68k_execute(loop_cycles);
+ }
+
if (irq) {
unsigned int status = read_reg();
m68k_set_irq((status & 0xe000) >> 13);
}
if (c == 'd') {
realtime_disassembly ^= 1;
+ do_disasm = 1;
printf("Real time disassembly is now %s\n", realtime_disassembly ? "on" : "off");
}
+ if (c == 's' && realtime_disassembly) {
+ do_disasm = 1;
+ }
+ if (c == 'S' && realtime_disassembly) {
+ do_disasm = 128;
+ }
}
}
- if (realtime_disassembly)
- goto disasm_run;
-
//gpio_handle_irq();
//GPIO_HANDLE_IRQ;
}
usleep(100000);
write_reg(0x02);
// printf("Status Reg%x\n",read_reg());
+ if (cfg->platform->handle_reset)
+ cfg->platform->handle_reset(cfg);
ovl = 1;
m68k_write_memory_8(0xbfe201, 0x0001); // AMIGA OVL
void m68k_add_ram_range(uint32_t addr, uint32_t upper, unsigned char *ptr)
{
+ if ((addr == 0 && upper == 0) || upper < addr)
+ return;
+
+ for (int i = 0; i < write_ranges; i++) {
+ if (write_addr[i] == addr) {
+ uint8_t changed = 0;
+ if (write_upper[i] != upper) {
+ write_upper[i] = upper;
+ changed = 1;
+ }
+ if (write_data[i] != ptr) {
+ write_data[i] = ptr;
+ changed = 1;
+ }
+ if (changed) {
+ printf("[MUSASHI] Adjusted mapped write range %d: %.8X-%.8X (%p)\n", write_ranges, addr, upper, ptr);
+ }
+ return;
+ }
+ }
+
if (read_ranges + 1 < 8) {
read_addr[read_ranges] = addr;
read_upper[read_ranges] = upper;
void m68k_add_rom_range(uint32_t addr, uint32_t upper, unsigned char *ptr)
{
+ if ((addr == 0 && upper == 0) || upper < addr)
+ return;
+
+ for (int i = 0; i < read_ranges; i++) {
+ if (read_addr[i] == addr) {
+ uint8_t changed = 0;
+ if (read_upper[i] != upper) {
+ read_upper[i] = upper;
+ changed = 1;
+ }
+ if (read_data[i] != ptr) {
+ read_data[i] = ptr;
+ changed = 1;
+ }
+ if (changed) {
+ printf("[MUSASHI] Adjusted mapped read range %d: %.8X-%.8X (%p)\n", read_ranges, addr, upper, ptr);
+ }
+ return;
+ }
+ }
+
if (read_ranges + 1 < 8) {
read_addr[read_ranges] = addr;
read_upper[read_ranges] = upper;
0x0, 0x0, // 0c/0e, reserved
0x0, 0x7, 0xD, 0xB, // 10/12/14/16, mfg id
0x0, 0x0, 0x0, 0x0, 0x0, 0x4, 0x2, 0x1, // 18/.../26, serial
- 0x0, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
+ 0x4, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
};
static unsigned char ac_a314_rom[] = {
//printf("Read byte %d from Z2 autoconf for PIC %d (%.2X).\n", address/2, ac_z2_current_pic, val);
}
val <<= 4;
- if (address != 0 && address != 2 && address != 40 && address != 42)
+ if (address != 0 && address != 2 && address != 0x40 && address != 0x42)
val ^= 0xff;
return (unsigned int)val;
}
if (done) {
- cfg->map_offset[index] = ac_base[ac_z2_current_pic];
- cfg->map_high[index] = cfg->map_offset[index] + cfg->map_size[index];
switch (ac_z2_type[ac_z2_current_pic]) {
case ACTYPE_MAPFAST_Z2:
+ cfg->map_offset[index] = ac_base[ac_z2_current_pic];
+ cfg->map_high[index] = cfg->map_offset[index] + cfg->map_size[index];
printf("Address of Z2 autoconf RAM assigned to $%.8x\n", ac_base[ac_z2_current_pic]);
m68k_add_ram_range(cfg->map_offset[index], cfg->map_high[index], cfg->map_data[index]);
printf("Z2 PIC %d at $%.8lX-%.8lX, Size: %d MB\n", ac_z2_current_pic, cfg->map_offset[index], cfg->map_high[index], cfg->map_size[index] / SIZE_MEGA);
break;
case ACTYPE_PSICSI:
- printf("PiSCSI Z2 device assigned to $%.8x\n", ac_base[ac_z2_current_pic]);
- m68k_add_rom_range(piscsi_base + (16 * SIZE_KILO), piscsi_base + (32 * SIZE_KILO), piscsi_rom_ptr);
+ printf("PiSCSI Z2 device assigned to $%.8x\n", piscsi_base);
+ //m68k_add_rom_range(piscsi_base + (16 * SIZE_KILO), piscsi_base + (32 * SIZE_KILO), piscsi_rom_ptr);
break;
default:
break;
int handle_register_write_amiga(unsigned int addr, unsigned int value, unsigned char type);
int init_rtg_data();
+extern int ac_z2_current_pic;
extern int ac_z2_done;
extern int ac_z2_pic_count;
extern int ac_z2_type[AC_PIC_LIMIT];
extern int ac_z2_index[AC_PIC_LIMIT];
+extern int ac_z3_current_pic;
extern int ac_z3_pic_count;
extern int ac_z3_done;
extern int ac_z3_type[AC_PIC_LIMIT];
static uint8_t rtg_enabled = 0, piscsi_enabled = 0, pinet_enabled = 0;
+extern uint32_t piscsi_base;
+extern uint8_t piscsi_diag_read = 0;
+
+extern void stop_cpu_emulation(uint8_t disasm_cur);
+
inline int custom_read_amiga(struct emulator_config *cfg, unsigned int addr, unsigned int *val, unsigned char type) {
if (!ac_z2_done && addr >= AC_Z2_BASE && addr < AC_Z2_BASE + AC_SIZE) {
if (ac_z2_pic_count == 0) {
}
}
+ if (addr >= piscsi_base && addr < piscsi_base + (64 * SIZE_KILO)) {
+ printf("[Amiga-Custom] %s read from PISCSI base @$%.8X.\n", op_type_names[type], addr);
+ stop_cpu_emulation(1);
+ *val = handle_piscsi_read(addr, type);
+ return 1;
+ }
+
return -1;
}
}
}
+ if (addr >= piscsi_base && addr < piscsi_base + (64 * SIZE_KILO)) {
+ printf("[Amiga-Custom] %s write to PISCSI base @$%.8x: %.8X\n", op_type_names[type], addr, val);
+ handle_piscsi_write(addr, val, type);
+ return 1;
+ }
+
return -1;
}
else
cfg->custom_low = min(cfg->custom_low, PISCSI_OFFSET);
cfg->custom_high = max(cfg->custom_high, PISCSI_UPPER);
+ if (piscsi_base != 0) {
+ cfg->custom_low = min(cfg->custom_low, piscsi_base);
+ }
}
if (pinet_enabled) {
if (cfg->custom_low == 0)
void handle_reset_amiga(struct emulator_config *cfg) {
ac_z3_done = 0;
ac_z2_done = 0;
+ ac_z2_current_pic = 0;
+ ac_z3_current_pic = 0;
+ piscsi_diag_read = 0;
adjust_ranges_amiga(cfg);
}
#include <stdlib.h>
#define BOOTLDR_SIZE 0x400
+#define DIAG_TOTAL_SIZE 0x4000
char *rombuf, *zerobuf, *devicebuf;
fwrite(zerobuf, pad_size, 1, out);
fwrite(devicebuf, device_size, 1, out);
+ free(zerobuf);
+ zerobuf = malloc(DIAG_TOTAL_SIZE - (rom_size + pad_size + device_size));
+ memset(zerobuf, 0x00, DIAG_TOTAL_SIZE - (rom_size + pad_size + device_size));
+ fwrite(zerobuf, DIAG_TOTAL_SIZE - (rom_size + pad_size + device_size), 1, out);
+
printf("piscsi.rom successfully created.\n");
free(rombuf);
PISCSI_CMD_ADDR2 = 0x14,
PISCSI_CMD_ADDR3 = 0x18,
PISCSI_CMD_ADDR4 = 0x1C,
- PISCSI_CMD_ROM = 0x8000,
+ PISCSI_CMD_ROM = 0x4000,
};
\ No newline at end of file
}
}
+uint8_t piscsi_diag_area[] = {
+ 0x90,
+ 0x00,
+ 0x00, 0x40,
+ 0x2C, 0x00,
+ 0x2C, 0x00,
+ 0x00, 0x00,
+ 0x00, 0x00,
+ 0x00, 0x00,
+};
+
+uint8_t fastata_diag_area[] = {
+ 0x90,
+ 0x00,
+ 0x00, 0x10,
+ 0x9e, 0x08,
+ 0x00, 0x00,
+ 0x00, 0x00,
+ 0x00, 0x02,
+ 0x00, 0x00,
+};
+
+uint8_t piscsi_diag_read;
+
+#define PIB 0x00
+
uint32_t handle_piscsi_read(uint32_t addr, uint8_t type) {
if (type) {}
+ uint8_t *diag_area = piscsi_diag_area;
if ((addr & 0xFFFF) >= PISCSI_CMD_ROM) {
uint32_t romoffs = (addr & 0xFFFF) - PISCSI_CMD_ROM;
- if (romoffs < piscsi_rom_size) {
- printf("[PISCSI] %s read from Boot ROM @$%.4X (%.8X)\n", op_type_names[type], romoffs, addr);
+ if (romoffs < 14 && !piscsi_diag_read) {
+ printf("[PISCSI] %s read from DiagArea @$%.4X: ", op_type_names[type], romoffs);
+ uint32_t v = 0;
+ switch (type) {
+ case OP_TYPE_BYTE:
+ v = diag_area[romoffs];
+ printf("%.2X\n", v);
+ break;
+ case OP_TYPE_WORD:
+ v = *((uint16_t *)&diag_area[romoffs]);
+ printf("%.4X\n", v);
+ break;
+ case OP_TYPE_LONGWORD:
+ v = (*((uint16_t *)&diag_area[romoffs]) << 16) | *((uint16_t *)&diag_area[romoffs + 2]);
+ //v = *((uint32_t *)&diag_area[romoffs]);
+ printf("%.8X\n", v);
+ break;
+ }
+ if (romoffs == 0x0D)
+ piscsi_diag_read = 1;
+ return v;
+ }
+ if (romoffs < (piscsi_rom_size + PIB)) {
+ printf("[PISCSI] %s read from Boot ROM @$%.4X (%.8X): ", op_type_names[type], romoffs, addr);
uint32_t v = 0;
switch (type) {
case OP_TYPE_BYTE:
- v = piscsi_rom_ptr[romoffs];
+ v = piscsi_rom_ptr[romoffs - PIB];
+ printf("%.2X\n", v);
break;
case OP_TYPE_WORD:
- v = *((uint16_t *)&piscsi_rom_ptr[romoffs]);
+ v = be16toh(*((uint16_t *)&piscsi_rom_ptr[romoffs - PIB]));
+ printf("%.4X\n", v);
break;
case OP_TYPE_LONGWORD:
- v = *((uint32_t *)&piscsi_rom_ptr[romoffs]);
+ //v = (*((uint16_t *)&diag_area[romoffs - 14]) << 16) | *((uint16_t *)&diag_area[romoffs - 12]);
+ v = be32toh(*((uint32_t *)&diag_area[romoffs - PIB]));
+ printf("%.8X\n", v);
break;
}
return v;