snapraid

diff --git a/Makefile b/Makefile
index 21b51c301672bf29505d31df8257b26884494c2a..06a826c1f73f39a62777b70d5ada4ad67c46b174 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -4,7 +4,7 @@ INSTALL=install
 CFLAGS+=-std=gnu89 -O2 -g -MMD -Wall                           \
        -Wno-pointer-sign                                       \
        -fno-strict-aliasing                                    \
-       -I. -Iinclude                                           \
+       -I. -Iinclude -Iraid                                    \
        -D_FILE_OFFSET_BITS=64                                  \
        -D_GNU_SOURCE                                           \
        -D_LGPL_SOURCE                                          \

diff --git a/bcachefs.c b/bcachefs.c
index 304a01bb0f418a963db22b9a801d3e3bbef86ad6..2ade9d81671d76f671f2502e1f5b059dc21ce51f 100644 (file)
--- a/bcachefs.c
+++ b/bcachefs.c
@@ -21,6 +21,8 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 
+#include <raid/raid.h>
+
 #include "cmds.h"
 
 static void usage(void)
@@ -141,6 +143,8 @@ static int data_cmds(int argc, char *argv[])
 
 int main(int argc, char *argv[])
 {
+       raid_init();
+
        full_cmd = argv[0];
 
        setvbuf(stdout, NULL, _IOLBF, 0);

diff --git a/raid/COPYING b/raid/COPYING
new file mode 100644 (file)
index 0000000..a43ea21
--- /dev/null
+++ b/raid/COPYING
@@ -0,0 +1,339 @@
+                   GNU GENERAL PUBLIC LICENSE
+                      Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                          675 Mass Ave, Cambridge, MA 02139, USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                           Preamble
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+  The licenses for most software are designed to take away your
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+License is intended to guarantee your freedom to share and change free
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+General Public License applies to most of the Free Software
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diff --git a/raid/check.c b/raid/check.c
new file mode 100644 (file)
index 0000000..9bed933
--- /dev/null
+++ b/raid/check.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2015 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "combo.h"
+#include "gf.h"
+
+/**
+ * Validate the provided failed blocks.
+ *
+ * This function checks if the specified failed blocks satisfy the redundancy
+ * information using the data from the known valid parity blocks.
+ *
+ * It's similar at raid_check(), just with a different format for arguments.
+ *
+ * The number of failed blocks @nr must be strictly less than the number of
+ * parities @nv, because you need one more parity to validate the recovering.
+ *
+ * No data or parity blocks are modified.
+ *
+ * @nr Number of failed data blocks.
+ * @id[] Vector of @nr indexes of the failed data blocks.
+ *   The indexes start from 0. They must be in order.
+ * @nv Number of valid parity blocks.
+ * @ip[] Vector of @nv indexes of the valid parity blocks.
+ *   The indexes start from 0. They must be in order.
+ * @nd Number of data blocks.
+ * @size Size of the blocks pointed by @v. It must be a multipler of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @ip[@nv - 1] + 1) elements. The starting elements are the
+ *   blocks for data, following with the parity blocks.
+ *   Each block has @size bytes. 
+ * @return 0 if the check is satisfied. -1 otherwise.
+ */
+static int raid_validate(int nr, int *id, int nv, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       const uint8_t *T[RAID_PARITY_MAX][RAID_PARITY_MAX];
+       uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       size_t i;
+       int j, k, l;
+
+       BUG_ON(nr >= nv);
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < nr; ++j)
+               for (k = 0; k < nr; ++k)
+                       G[j * nr + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, nr);
+
+       /* get multiplication tables */
+       for (j = 0; j < nr; ++j)
+               for (k = 0; k < nr; ++k)
+                       T[j][k] = table(V[j * nr + k]);
+
+       /* check all positions */
+       for (i = 0; i < size; ++i) {
+               uint8_t p[RAID_PARITY_MAX];
+
+               /* get parity */
+               for (j = 0; j < nv; ++j)
+                       p[j] = v[nd + ip[j]][i];
+
+               /* compute delta parity, skipping broken disks */
+               for (j = 0, k = 0; j < nd; ++j) {
+                       uint8_t b;
+
+                       /* skip broken disks */
+                       if (k < nr && id[k] == j) {
+                               ++k;
+                               continue;
+                       }
+
+                       b = v[j][i];
+                       for (l = 0; l < nv; ++l)
+                               p[l] ^= gfmul[b][gfgen[ip[l]][j]];
+               }
+
+               /* reconstruct data */
+               for (j = 0; j < nr; ++j) {
+                       uint8_t b = 0;
+                       int idj = id[j];
+
+                       /* recompute the data */
+                       for (k = 0; k < nr; ++k)
+                               b ^= T[j][k][p[k]];
+
+                       /* add the parity contribution of the reconstructed data */
+                       for (l = nr; l < nv; ++l)
+                               p[l] ^= gfmul[b][gfgen[ip[l]][idj]];
+               }
+
+               /* check that the final parity is 0 */
+               for (l = nr; l < nv; ++l)
+                       if (p[l] != 0)
+                               return -1;
+       }
+
+       return 0;
+}
+
+int raid_check(int nr, int *ir, int nd, int np, size_t size, void **v)
+{
+       /* valid parity index */
+       int ip[RAID_PARITY_MAX];
+       int vp;
+       int rd;
+       int i, j;
+
+       /* enforce limit on size */
+       BUG_ON(size % 64 != 0);
+
+       /* enforce limit on number of failures */
+       BUG_ON(nr >= np); /* >= because we check with extra parity */
+       BUG_ON(np > RAID_PARITY_MAX);
+
+       /* enforce order in index vector */
+       BUG_ON(nr >= 2 && ir[0] >= ir[1]);
+       BUG_ON(nr >= 3 && ir[1] >= ir[2]);
+       BUG_ON(nr >= 4 && ir[2] >= ir[3]);
+       BUG_ON(nr >= 5 && ir[3] >= ir[4]);
+       BUG_ON(nr >= 6 && ir[4] >= ir[5]);
+
+       /* enforce limit on index vector */
+       BUG_ON(nr > 0 && ir[nr-1] >= nd + np);
+
+       /* count failed data disk */
+       rd = 0;
+       while (rd < nr && ir[rd] < nd)
+               ++rd;
+
+       /* put valid parities into ip[] */
+       vp = 0;
+       for (i = rd, j = 0; j < np; ++j) {
+               /* if parity is failed */
+               if (i < nr && ir[i] == nd + j) {
+                       /* skip broken parity */
+                       ++i;
+               } else {
+                       /* store valid parity */
+                       ip[vp] = j;
+                       ++vp;
+               }
+       }
+
+       return raid_validate(rd, ir, vp, ip, nd, size, v);
+}
+
+int raid_scan(int *ir, int nd, int np, size_t size, void **v)
+{
+       int r;
+
+       /* check the special case of no failure */
+       if (np != 0 && raid_check(0, 0, nd, np, size, v) == 0)
+               return 0;
+
+       /* for each number of possible failures */
+       for (r = 1; r < np; ++r) {
+               /* try all combinations of r failures on n disks */
+               combination_first(r, nd + np, ir);
+               do {
+                       /* verify if the combination is a valid one */
+                       if (raid_check(r, ir, nd, np, size, v) == 0)
+                               return r;
+               } while (combination_next(r, nd + np, ir));
+       }
+
+       /* no solution found */
+       return -1;
+}
+

diff --git a/raid/combo.h b/raid/combo.h
new file mode 100644 (file)
index 0000000..8efc31a
--- /dev/null
+++ b/raid/combo.h
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_COMBO_H
+#define __RAID_COMBO_H
+
+#include <assert.h>
+
+/**
+ * Get the first permutation with repetition of r of n elements.
+ *
+ * Typical use is with permutation_next() in the form :
+ *
+ * int i[R];
+ * permutation_first(R, N, i);
+ * do {
+ *    code using i[0], i[1], ..., i[R-1]
+ * } while (permutation_next(R, N, i));
+ *
+ * It's equivalent at the code :
+ *
+ * for(i[0]=0;i[0]<N;++i[0])
+ *     for(i[1]=0;i[1]<N;++i[1])
+ *        ...
+ *            for(i[R-2]=0;i[R-2]<N;++i[R-2])
+ *                for(i[R-1]=0;i[R-1]<N;++i[R-1])
+ *                    code using i[0], i[1], ..., i[R-1]
+ */
+static __always_inline void permutation_first(int r, int n, int *c)
+{
+       int i;
+
+       (void)n; /* unused, but kept for clarity */
+       assert(0 < r && r <= n);
+
+       for (i = 0; i < r; ++i)
+               c[i] = 0;
+}
+
+/**
+ * Get the next permutation with repetition of r of n elements.
+ * Return ==0 when finished.
+ */
+static __always_inline int permutation_next(int r, int n, int *c)
+{
+       int i = r - 1; /* present position */
+
+recurse:
+       /* next element at position i */
+       ++c[i];
+
+       /* if the position has reached the max */
+       if (c[i] >= n) {
+
+               /* if we are at the first level, we have finished */
+               if (i == 0)
+                       return 0;
+
+               /* increase the previous position */
+               --i;
+               goto recurse;
+       }
+
+       ++i;
+
+       /* initialize all the next positions, if any */
+       while (i < r) {
+               c[i] = 0;
+               ++i;
+       }
+
+       return 1;
+}
+
+/**
+ * Get the first combination without repetition of r of n elements.
+ *
+ * Typical use is with combination_next() in the form :
+ *
+ * int i[R];
+ * combination_first(R, N, i);
+ * do {
+ *    code using i[0], i[1], ..., i[R-1]
+ * } while (combination_next(R, N, i));
+ *
+ * It's equivalent at the code :
+ *
+ * for(i[0]=0;i[0]<N-(R-1);++i[0])
+ *     for(i[1]=i[0]+1;i[1]<N-(R-2);++i[1])
+ *        ...
+ *            for(i[R-2]=i[R-3]+1;i[R-2]<N-1;++i[R-2])
+ *                for(i[R-1]=i[R-2]+1;i[R-1]<N;++i[R-1])
+ *                    code using i[0], i[1], ..., i[R-1]
+ */
+static __always_inline void combination_first(int r, int n, int *c)
+{
+       int i;
+
+       (void)n; /* unused, but kept for clarity */
+       assert(0 < r && r <= n);
+
+       for (i = 0; i < r; ++i)
+               c[i] = i;
+}
+
+/**
+ * Get the next combination without repetition of r of n elements.
+ * Return ==0 when finished.
+ */
+static __always_inline int combination_next(int r, int n, int *c)
+{
+       int i = r - 1; /* present position */
+       int h = n; /* high limit for this position */
+
+recurse:
+       /* next element at position i */
+       ++c[i];
+
+       /* if the position has reached the max */
+       if (c[i] >= h) {
+
+               /* if we are at the first level, we have finished */
+               if (i == 0)
+                       return 0;
+
+               /* increase the previous position */
+               --i;
+               --h;
+               goto recurse;
+       }
+
+       ++i;
+
+       /* initialize all the next positions, if any */
+       while (i < r) {
+               /* each position start at the next value of the previous one */
+               c[i] = c[i - 1] + 1;
+               ++i;
+       }
+
+       return 1;
+}
+#endif
+

diff --git a/raid/cpu.h b/raid/cpu.h
new file mode 100644 (file)
index 0000000..ed909bb
--- /dev/null
+++ b/raid/cpu.h
@@ -0,0 +1,331 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_CPU_H
+#define __RAID_CPU_H
+
+#ifdef CONFIG_X86
+
+static inline void raid_cpuid(uint32_t func_eax, uint32_t sub_ecx, uint32_t *reg)
+{
+       asm volatile (
+#if defined(__i386__) && defined(__PIC__)
+               /* allow compilation in PIC mode saving ebx */
+               "xchgl %%ebx, %1\n"
+               "cpuid\n"
+               "xchgl %%ebx, %1\n"
+               : "=a" (reg[0]), "=r" (reg[1]), "=c" (reg[2]), "=d" (reg[3])
+               : "0" (func_eax), "2" (sub_ecx)
+#else
+               "cpuid\n"
+               : "=a" (reg[0]), "=b" (reg[1]), "=c" (reg[2]), "=d" (reg[3])
+               : "0" (func_eax), "2" (sub_ecx)
+#endif
+       );
+}
+
+static inline void raid_xgetbv(uint32_t* reg)
+{
+       /* get the value of the Extended Control Register ecx=0 */
+       asm volatile (
+               /* uses a direct encoding of the XGETBV instruction as only recent */
+               /* assemblers support it. */
+               /* the next line is equivalent at: "xgetbv\n" */
+               ".byte 0x0f, 0x01, 0xd0\n"
+               : "=a" (reg[0]), "=d" (reg[3])
+               : "c" (0)
+       );
+}
+
+#define CPU_VENDOR_MAX 13
+
+static inline void raid_cpu_info(char *vendor, unsigned *family, unsigned *model)
+{
+       uint32_t reg[4];
+       unsigned f, ef, m, em;
+
+       raid_cpuid(0, 0, reg);
+
+       ((uint32_t*)vendor)[0] = reg[1];
+       ((uint32_t*)vendor)[1] = reg[3];
+       ((uint32_t*)vendor)[2] = reg[2];
+       vendor[12] = 0;
+
+       raid_cpuid(1, 0, reg);
+
+       f = (reg[0] >> 8) & 0xF;
+       ef = (reg[0] >> 20) & 0xFF;
+       m = (reg[0] >> 4) & 0xF;
+       em = (reg[0] >> 16) & 0xF;
+
+       if (strcmp(vendor, "AuthenticAMD") == 0) {
+               if (f < 15) {
+                       *family = f;
+                       *model = m;
+               } else {
+                       *family = f + ef;
+                       *model = m + (em << 4);
+               }
+       } else {
+               *family = f + ef;
+               *model = m + (em << 4);
+       }
+}
+
+static inline int raid_cpu_match_sse(uint32_t cpuid_1_ecx, uint32_t cpuid_1_edx)
+{
+       uint32_t reg[4];
+
+       raid_cpuid(1, 0, reg);
+       if ((reg[2] & cpuid_1_ecx) != cpuid_1_ecx)
+               return 0;
+       if ((reg[3] & cpuid_1_edx) != cpuid_1_edx)
+               return 0;
+
+       return 1;
+}
+
+static inline int raid_cpu_match_avx(uint32_t cpuid_1_ecx, uint32_t cpuid_7_ebx, uint32_t xcr0)
+{
+       uint32_t reg[4];
+
+       raid_cpuid(1, 0, reg);
+       if ((reg[2] & cpuid_1_ecx) != cpuid_1_ecx)
+               return 0;
+
+       raid_xgetbv(reg);
+       if ((reg[0] & xcr0) != xcr0)
+               return 0;
+
+       raid_cpuid(7, 0, reg);
+       if ((reg[1] & cpuid_7_ebx) != cpuid_7_ebx)
+               return 0;
+
+       return 1;
+}
+
+static inline int raid_cpu_has_sse2(void)
+{
+       /*
+        * Intel® 64 and IA-32 Architectures Software Developer's Manual
+        * 325462-048US September 2013
+        *
+        * 11.6.2 Checking for SSE/SSE2 Support
+        * Before an application attempts to use the SSE and/or SSE2 extensions, it should check
+        * that they are present on the processor:
+        * 1. Check that the processor supports the CPUID instruction. Bit 21 of the EFLAGS
+        * register can be used to check processor's support the CPUID instruction.
+        * 2. Check that the processor supports the SSE and/or SSE2 extensions (true if
+        * CPUID.01H:EDX.SSE[bit 25] = 1 and/or CPUID.01H:EDX.SSE2[bit 26] = 1).
+        */
+       return raid_cpu_match_sse(
+               0,
+               1 << 26); /* SSE2 */
+}
+
+static inline int raid_cpu_has_ssse3(void)
+{
+       /*
+        * Intel® 64 and IA-32 Architectures Software Developer's Manual
+        * 325462-048US September 2013
+        *
+        * 12.7.2 Checking for SSSE3 Support
+        * Before an application attempts to use the SSSE3 extensions, the application should
+        * follow the steps illustrated in Section 11.6.2, "Checking for SSE/SSE2 Support."
+        * Next, use the additional step provided below:
+        * Check that the processor supports SSSE3 (if CPUID.01H:ECX.SSSE3[bit 9] = 1).
+        */
+       return raid_cpu_match_sse(
+               1 << 9, /* SSSE3 */
+               1 << 26); /* SSE2 */
+}
+
+static inline int raid_cpu_has_crc32(void)
+{
+       /*
+        * Intel® 64 and IA-32 Architectures Software Developer's Manual
+        * 325462-048US September 2013
+        *
+        * 12.12.3 Checking for SSE4.2 Support
+        * ...
+        * Before an application attempts to use the CRC32 instruction, it must check
+        * that the processor supports SSE4.2 (if CPUID.01H:ECX.SSE4_2[bit 20] = 1).
+        */
+       return raid_cpu_match_sse(
+               1 << 20, /* CRC32 */
+               0);
+}
+
+static inline int raid_cpu_has_avx2(void)
+{
+       /*
+        * Intel Architecture Instruction Set Extensions Programming Reference
+        * 319433-022 October 2014
+        *
+        * 14.3 Detection of AVX instructions
+        * 1) Detect CPUID.1:ECX.OSXSAVE[bit 27] = 1 (XGETBV enabled for application use1)
+        * 2) Issue XGETBV and verify that XCR0[2:1] = `11b' (XMM state and YMM state are enabled by OS).
+        * 3) detect CPUID.1:ECX.AVX[bit 28] = 1 (AVX instructions supported).
+        * (Step 3 can be done in any order relative to 1 and 2)
+        *
+        * 14.7.1 Detection of AVX2
+        * Hardware support for AVX2 is indicated by CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]=1.
+        * Application Software must identify that hardware supports AVX, after that it must
+        * also detect support for AVX2 by checking CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5].
+        */
+       return raid_cpu_match_avx(
+               (1 << 27) | (1 << 28), /* OSXSAVE and AVX */
+               1 << 5, /* AVX2 */
+               3 << 1); /* OS saves XMM and YMM registers */
+}
+
+static inline int raid_cpu_has_avx512bw(void)
+{
+       /*
+        * Intel Architecture Instruction Set Extensions Programming Reference
+        * 319433-022 October 2014
+        *
+        * 2.2 Detection of 512-bit Instruction Groups of Intel AVX-512 Family
+        * 1) Detect CPUID.1:ECX.OSXSAVE[bit 27] = 1 (XGETBV enabled for application use)
+        * 2) Execute XGETBV and verify that XCR0[7:5] = `111b' (OPMASK state, upper 256-bit of
+        * ZMM0-ZMM15 and ZMM16-ZMM31 state are enabled by OS) and that XCR0[2:1] = `11b'
+        * (XMM state and YMM state are enabled by OS).
+        * 3) Verify both CPUID.0x7.0:EBX.AVX512F[bit 16] = 1, CPUID.0x7.0:EBX.AVX512BW[bit 30] = 1.
+        */
+
+       /* note that intentionally we don't check for AVX and AVX2 */
+       /* because the documentation doesn't require that */
+       return raid_cpu_match_avx(
+               1 << 27, /* XSAVE/XGETBV */
+               (1 << 16) | (1 << 30), /* AVX512F and AVX512BW */
+               (3 << 1) | (7 << 5)); /* OS saves XMM, YMM and ZMM registers */
+}
+
+/**
+ * Check if it's an Intel Atom CPU.
+ */
+static inline int raid_cpu_is_atom(unsigned family, unsigned model)
+{
+       if (family != 6)
+               return 0;
+
+       /*
+        * x86 Architecture CPUID
+        * http://www.sandpile.org/x86/cpuid.htm
+        *
+        * Intel Atom
+        * 1C (28) Atom (45 nm) with 512 KB on-die L2
+        * 26 (38) Atom (45 nm) with 512 KB on-die L2
+        * 36 (54) Atom (32 nm) with 512 KB on-die L2
+        * 27 (39) Atom (32 nm) with 512 KB on-die L2
+        * 35 (53) Atom (?? nm) with ??? KB on-die L2
+        * 4A (74) Atom 2C (22 nm) 1 MB L2 + PowerVR (TGR)
+        * 5A (90) Atom 4C (22 nm) 2 MB L2 + PowerVR (ANN)
+        * 37 (55) Atom 4C (22 nm) 2 MB L2 + Intel Gen7 (BYT)
+        * 4C (76) Atom 4C (14 nm) 2 MB L2 + Intel Gen8 (BSW)
+        * 5D (93) Atom 4C (28 nm TSMC) 1 MB L2 + Mali (SoFIA)
+        * 4D (77) Atom 8C (22 nm) 4 MB L2 (AVN)
+        * ?? Atom ?C (14 nm) ? MB L2 (DVN)
+        */
+       return model == 28 || model == 38 || model == 54
+               || model == 39 || model == 53 || model == 74
+               || model == 90 || model == 55 || model == 76
+               || model == 93 || model == 77;
+}
+
+/**
+ * Check if the processor has a slow MULT implementation.
+ * If yes, it's better to use a hash not based on multiplication.
+ */
+static inline int raid_cpu_has_slowmult(void)
+{
+       char vendor[CPU_VENDOR_MAX];
+       unsigned family;
+       unsigned model;
+
+       /*
+        * In some cases Murmur3 based on MUL instruction,
+        * is a LOT slower than Spooky2 based on SHIFTs.
+        */
+       raid_cpu_info(vendor, &family, &model);
+
+       if (strcmp(vendor, "GenuineIntel") == 0) {
+               /*
+                * Intel Atom (Model 28)
+                * murmur3:378 MB/s, spooky2:3413 MB/s (x86)
+                *
+                * Intel Atom (Model 77)
+                * murmur3:1311 MB/s, spooky2:4056 MB/s (x64)
+                */
+               if (raid_cpu_is_atom(family, model))
+                       return 1;
+       }
+
+       return 0;
+}
+
+/**
+ * Check if the processor has a slow extended set of SSE registers.
+ * If yes, it's better to limit the unroll to the firsrt 8 registers.
+ */
+static inline int raid_cpu_has_slowextendedreg(void)
+{
+       char vendor[CPU_VENDOR_MAX];
+       unsigned family;
+       unsigned model;
+
+       /*
+        * In some cases the PAR2 implementation using 16 SSE registers
+        * is a LITTLE slower than the one using only the first 8 registers.
+        * This doesn't happen for PARZ.
+        */
+       raid_cpu_info(vendor, &family, &model);
+
+       if (strcmp(vendor, "AuthenticAMD") == 0) {
+               /*
+                * AMD Bulldozer
+                * par2_sse2:4922 MB/s, par2_sse2e:4465 MB/s
+                */
+               if (family == 21)
+                       return 1;
+       }
+
+       if (strcmp(vendor, "GenuineIntel") == 0) {
+               /*
+                * Intel Atom (Model 77)
+                * par2_sse2:5686 MB/s, par2_sse2e:5250 MB/s
+                * parz_sse2:3100 MB/s, parz_sse2e:3400 MB/s
+                * par3_sse3:1921 MB/s, par3_sse3e:1813 MB/s
+                * par4_sse3:1175 MB/s, par4_sse3e:1113 MB/s
+                * par5_sse3:876 MB/s, par5_sse3e:675 MB/s
+                * par6_sse3:705 MB/s, par6_sse3e:529 MB/s
+                *
+                * Intel Atom (Model 77) "Avoton C2750"
+                * par2_sse2:5661 MB/s, par2_sse2e:5382 MB/s
+                * parz_sse2:3110 MB/s, parz_sse2e:3450 MB/s
+                * par3_sse3:1769 MB/s, par3_sse3e:1856 MB/s
+                * par4_sse3:1221 MB/s, par4_sse3e:1141 MB/s
+                * par5_sse3:910 MB/s, par5_sse3e:675 MB/s
+                * par6_sse3:720 MB/s, par6_sse3e:534 MB/s
+                */
+               if (raid_cpu_is_atom(family, model))
+                       return 1;
+       }
+
+       return 0;
+}
+#endif
+
+#endif
+

diff --git a/raid/gf.h b/raid/gf.h
new file mode 100644 (file)
index 0000000..1702c28
--- /dev/null
+++ b/raid/gf.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_GF_H
+#define __RAID_GF_H
+
+/*
+ * Galois field operations.
+ *
+ * Basic range checks are implemented using BUG_ON().
+ */
+
+/*
+ * GF a*b.
+ */
+static __always_inline uint8_t mul(uint8_t a, uint8_t b)
+{
+       return gfmul[a][b];
+}
+
+/*
+ * GF 1/a.
+ * Not defined for a == 0.
+ */
+static __always_inline uint8_t inv(uint8_t v)
+{
+       BUG_ON(v == 0); /* division by zero */
+
+       return gfinv[v];
+}
+
+/*
+ * GF 2^a.
+ */
+static __always_inline uint8_t pow2(int v)
+{
+       BUG_ON(v < 0 || v > 254); /* invalid exponent */
+
+       return gfexp[v];
+}
+
+/*
+ * Gets the multiplication table for a specified value.
+ */
+static __always_inline const uint8_t *table(uint8_t v)
+{
+       return gfmul[v];
+}
+
+/*
+ * Gets the generator matrix coefficient for parity 'p' and disk 'd'.
+ */
+static __always_inline uint8_t A(int p, int d)
+{
+       return gfgen[p][d];
+}
+
+/*
+ * Dereference as uint8_t
+ */
+#define v_8(p) (*(uint8_t *)&(p))
+
+/*
+ * Dereference as uint32_t
+ */
+#define v_32(p) (*(uint32_t *)&(p))
+
+/*
+ * Dereference as uint64_t
+ */
+#define v_64(p) (*(uint64_t *)&(p))
+
+/*
+ * Multiply each byte of a uint32 by 2 in the GF(2^8).
+ */
+static __always_inline uint32_t x2_32(uint32_t v)
+{
+       uint32_t mask = v & 0x80808080U;
+
+       mask = (mask << 1) - (mask >> 7);
+       v = (v << 1) & 0xfefefefeU;
+       v ^= mask & 0x1d1d1d1dU;
+       return v;
+}
+
+/*
+ * Multiply each byte of a uint64 by 2 in the GF(2^8).
+ */
+static __always_inline uint64_t x2_64(uint64_t v)
+{
+       uint64_t mask = v & 0x8080808080808080ULL;
+
+       mask = (mask << 1) - (mask >> 7);
+       v = (v << 1) & 0xfefefefefefefefeULL;
+       v ^= mask & 0x1d1d1d1d1d1d1d1dULL;
+       return v;
+}
+
+/*
+ * Divide each byte of a uint32 by 2 in the GF(2^8).
+ */
+static __always_inline uint32_t d2_32(uint32_t v)
+{
+       uint32_t mask = v & 0x01010101U;
+
+       mask = (mask << 8) - mask;
+       v = (v >> 1) & 0x7f7f7f7fU;
+       v ^= mask & 0x8e8e8e8eU;
+       return v;
+}
+
+/*
+ * Divide each byte of a uint64 by 2 in the GF(2^8).
+ */
+static __always_inline uint64_t d2_64(uint64_t v)
+{
+       uint64_t mask = v & 0x0101010101010101ULL;
+
+       mask = (mask << 8) - mask;
+       v = (v >> 1) & 0x7f7f7f7f7f7f7f7fULL;
+       v ^= mask & 0x8e8e8e8e8e8e8e8eULL;
+       return v;
+}
+
+#endif
+

diff --git a/raid/helper.c b/raid/helper.c
new file mode 100644 (file)
index 0000000..f66093f
--- /dev/null
+++ b/raid/helper.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+
+#define RAID_SWAP(a, b) \
+       do { \
+               if (v[a] > v[b]) { \
+                       int t = v[a]; \
+                       v[a] = v[b]; \
+                       v[b] = t; \
+               } \
+       } while (0)
+
+void raid_sort(int n, int *v)
+{
+       /* sorting networks generated with Batcher's Merge-Exchange */
+       switch (n) {
+       case 2:
+               RAID_SWAP(0, 1);
+               break;
+       case 3:
+               RAID_SWAP(0, 2);
+               RAID_SWAP(0, 1);
+               RAID_SWAP(1, 2);
+               break;
+       case 4:
+               RAID_SWAP(0, 2);
+               RAID_SWAP(1, 3);
+               RAID_SWAP(0, 1);
+               RAID_SWAP(2, 3);
+               RAID_SWAP(1, 2);
+               break;
+       case 5:
+               RAID_SWAP(0, 4);
+               RAID_SWAP(0, 2);
+               RAID_SWAP(1, 3);
+               RAID_SWAP(2, 4);
+               RAID_SWAP(0, 1);
+               RAID_SWAP(2, 3);
+               RAID_SWAP(1, 4);
+               RAID_SWAP(1, 2);
+               RAID_SWAP(3, 4);
+               break;
+       case 6:
+               RAID_SWAP(0, 4);
+               RAID_SWAP(1, 5);
+               RAID_SWAP(0, 2);
+               RAID_SWAP(1, 3);
+               RAID_SWAP(2, 4);
+               RAID_SWAP(3, 5);
+               RAID_SWAP(0, 1);
+               RAID_SWAP(2, 3);
+               RAID_SWAP(4, 5);
+               RAID_SWAP(1, 4);
+               RAID_SWAP(1, 2);
+               RAID_SWAP(3, 4);
+               break;
+       }
+}
+
+void raid_insert(int n, int *v, int i)
+{
+       /* we don't use binary search because this is intended */
+       /* for very small vectors and we want to optimize the case */
+       /* of elements inserted already in order */
+
+       /* insert at the end */
+       v[n] = i;
+
+       /* swap until in the correct position */
+       while (n > 0 && v[n - 1] > v[n]) {
+               /* swap */
+               int t = v[n - 1];
+
+               v[n - 1] = v[n];
+               v[n] = t;
+
+               /* previous position */
+               --n;
+       }
+}
+

diff --git a/raid/helper.h b/raid/helper.h
new file mode 100644 (file)
index 0000000..bf68288
--- /dev/null
+++ b/raid/helper.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_HELPER_H
+#define __RAID_HELPER_H
+
+/**
+ * Inserts an integer in a sorted vector.
+ *
+ * This function can be used to insert indexes in order, ready to be used for
+ * calling raid_rec().
+ *
+ * @n Number of integers currently in the vector.
+ * @v Vector of integers already sorted.
+ *   It must have extra space for the new elemet at the end.
+ * @i Value to insert.
+ */
+void raid_insert(int n, int *v, int i);
+
+/**
+ * Sorts a small vector of integers.
+ *
+ * If you have indexes not in order, you can use this function to sort them
+ * before calling raid_rec().
+ *
+ * @n Number of integers. No more than RAID_PARITY_MAX.
+ * @v Vector of integers.
+ */
+void raid_sort(int n, int *v);
+
+#endif
+

diff --git a/raid/int.c b/raid/int.c
new file mode 100644 (file)
index 0000000..e16332a
--- /dev/null
+++ b/raid/int.c
@@ -0,0 +1,556 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "gf.h"
+
+/*
+ * GEN1 (RAID5 with xor) 32bit C implementation
+ */
+void raid_gen1_int32(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       int d, l;
+       size_t i;
+
+       uint32_t p0;
+       uint32_t p1;
+
+       l = nd - 1;
+       p = v[nd];
+
+       for (i = 0; i < size; i += 8) {
+               p0 = v_32(v[l][i]);
+               p1 = v_32(v[l][i + 4]);
+               for (d = l - 1; d >= 0; --d) {
+                       p0 ^= v_32(v[d][i]);
+                       p1 ^= v_32(v[d][i + 4]);
+               }
+               v_32(p[i]) = p0;
+               v_32(p[i + 4]) = p1;
+       }
+}
+
+/*
+ * GEN1 (RAID5 with xor) 64bit C implementation
+ */
+void raid_gen1_int64(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       int d, l;
+       size_t i;
+
+       uint64_t p0;
+       uint64_t p1;
+
+       l = nd - 1;
+       p = v[nd];
+
+       for (i = 0; i < size; i += 16) {
+               p0 = v_64(v[l][i]);
+               p1 = v_64(v[l][i + 8]);
+               for (d = l - 1; d >= 0; --d) {
+                       p0 ^= v_64(v[d][i]);
+                       p1 ^= v_64(v[d][i + 8]);
+               }
+               v_64(p[i]) = p0;
+               v_64(p[i + 8]) = p1;
+       }
+}
+
+/*
+ * GEN2 (RAID6 with powers of 2) 32bit C implementation
+ */
+void raid_gen2_int32(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       int d, l;
+       size_t i;
+
+       uint32_t d0, q0, p0;
+       uint32_t d1, q1, p1;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+
+       for (i = 0; i < size; i += 8) {
+               q0 = p0 = v_32(v[l][i]);
+               q1 = p1 = v_32(v[l][i + 4]);
+               for (d = l - 1; d >= 0; --d) {
+                       d0 = v_32(v[d][i]);
+                       d1 = v_32(v[d][i + 4]);
+
+                       p0 ^= d0;
+                       p1 ^= d1;
+
+                       q0 = x2_32(q0);
+                       q1 = x2_32(q1);
+
+                       q0 ^= d0;
+                       q1 ^= d1;
+               }
+               v_32(p[i]) = p0;
+               v_32(p[i + 4]) = p1;
+               v_32(q[i]) = q0;
+               v_32(q[i + 4]) = q1;
+       }
+}
+
+/*
+ * GEN2 (RAID6 with powers of 2) 64bit C implementation
+ */
+void raid_gen2_int64(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       int d, l;
+       size_t i;
+
+       uint64_t d0, q0, p0;
+       uint64_t d1, q1, p1;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+
+       for (i = 0; i < size; i += 16) {
+               q0 = p0 = v_64(v[l][i]);
+               q1 = p1 = v_64(v[l][i + 8]);
+               for (d = l - 1; d >= 0; --d) {
+                       d0 = v_64(v[d][i]);
+                       d1 = v_64(v[d][i + 8]);
+
+                       p0 ^= d0;
+                       p1 ^= d1;
+
+                       q0 = x2_64(q0);
+                       q1 = x2_64(q1);
+
+                       q0 ^= d0;
+                       q1 ^= d1;
+               }
+               v_64(p[i]) = p0;
+               v_64(p[i + 8]) = p1;
+               v_64(q[i]) = q0;
+               v_64(q[i + 8]) = q1;
+       }
+}
+
+/*
+ * GEN3 (triple parity with Cauchy matrix) 8bit C implementation
+ *
+ * Note that instead of a generic multiplication table, likely resulting
+ * in multiple cache misses, a precomputed table could be used.
+ * But this is only a kind of reference function, and we are not really
+ * interested in speed.
+ */
+void raid_gen3_int8(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       uint8_t d0, r0, q0, p0;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       for (i = 0; i < size; i += 1) {
+               p0 = q0 = r0 = 0;
+               for (d = l; d > 0; --d) {
+                       d0 = v_8(v[d][i]);
+
+                       p0 ^= d0;
+                       q0 ^= gfmul[d0][gfgen[1][d]];
+                       r0 ^= gfmul[d0][gfgen[2][d]];
+               }
+
+               /* first disk with all coefficients at 1 */
+               d0 = v_8(v[0][i]);
+
+               p0 ^= d0;
+               q0 ^= d0;
+               r0 ^= d0;
+
+               v_8(p[i]) = p0;
+               v_8(q[i]) = q0;
+               v_8(r[i]) = r0;
+       }
+}
+
+/*
+ * GEN4 (quad parity with Cauchy matrix) 8bit C implementation
+ *
+ * Note that instead of a generic multiplication table, likely resulting
+ * in multiple cache misses, a precomputed table could be used.
+ * But this is only a kind of reference function, and we are not really
+ * interested in speed.
+ */
+void raid_gen4_int8(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       int d, l;
+       size_t i;
+
+       uint8_t d0, s0, r0, q0, p0;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+
+       for (i = 0; i < size; i += 1) {
+               p0 = q0 = r0 = s0 = 0;
+               for (d = l; d > 0; --d) {
+                       d0 = v_8(v[d][i]);
+
+                       p0 ^= d0;
+                       q0 ^= gfmul[d0][gfgen[1][d]];
+                       r0 ^= gfmul[d0][gfgen[2][d]];
+                       s0 ^= gfmul[d0][gfgen[3][d]];
+               }
+
+               /* first disk with all coefficients at 1 */
+               d0 = v_8(v[0][i]);
+
+               p0 ^= d0;
+               q0 ^= d0;
+               r0 ^= d0;
+               s0 ^= d0;
+
+               v_8(p[i]) = p0;
+               v_8(q[i]) = q0;
+               v_8(r[i]) = r0;
+               v_8(s[i]) = s0;
+       }
+}
+
+/*
+ * GEN5 (penta parity with Cauchy matrix) 8bit C implementation
+ *
+ * Note that instead of a generic multiplication table, likely resulting
+ * in multiple cache misses, a precomputed table could be used.
+ * But this is only a kind of reference function, and we are not really
+ * interested in speed.
+ */
+void raid_gen5_int8(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       int d, l;
+       size_t i;
+
+       uint8_t d0, t0, s0, r0, q0, p0;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+
+       for (i = 0; i < size; i += 1) {
+               p0 = q0 = r0 = s0 = t0 = 0;
+               for (d = l; d > 0; --d) {
+                       d0 = v_8(v[d][i]);
+
+                       p0 ^= d0;
+                       q0 ^= gfmul[d0][gfgen[1][d]];
+                       r0 ^= gfmul[d0][gfgen[2][d]];
+                       s0 ^= gfmul[d0][gfgen[3][d]];
+                       t0 ^= gfmul[d0][gfgen[4][d]];
+               }
+
+               /* first disk with all coefficients at 1 */
+               d0 = v_8(v[0][i]);
+
+               p0 ^= d0;
+               q0 ^= d0;
+               r0 ^= d0;
+               s0 ^= d0;
+               t0 ^= d0;
+
+               v_8(p[i]) = p0;
+               v_8(q[i]) = q0;
+               v_8(r[i]) = r0;
+               v_8(s[i]) = s0;
+               v_8(t[i]) = t0;
+       }
+}
+
+/*
+ * GEN6 (hexa parity with Cauchy matrix) 8bit C implementation
+ *
+ * Note that instead of a generic multiplication table, likely resulting
+ * in multiple cache misses, a precomputed table could be used.
+ * But this is only a kind of reference function, and we are not really
+ * interested in speed.
+ */
+void raid_gen6_int8(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       uint8_t *u;
+       int d, l;
+       size_t i;
+
+       uint8_t d0, u0, t0, s0, r0, q0, p0;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+       u = v[nd + 5];
+
+       for (i = 0; i < size; i += 1) {
+               p0 = q0 = r0 = s0 = t0 = u0 = 0;
+               for (d = l; d > 0; --d) {
+                       d0 = v_8(v[d][i]);
+
+                       p0 ^= d0;
+                       q0 ^= gfmul[d0][gfgen[1][d]];
+                       r0 ^= gfmul[d0][gfgen[2][d]];
+                       s0 ^= gfmul[d0][gfgen[3][d]];
+                       t0 ^= gfmul[d0][gfgen[4][d]];
+                       u0 ^= gfmul[d0][gfgen[5][d]];
+               }
+
+               /* first disk with all coefficients at 1 */
+               d0 = v_8(v[0][i]);
+
+               p0 ^= d0;
+               q0 ^= d0;
+               r0 ^= d0;
+               s0 ^= d0;
+               t0 ^= d0;
+               u0 ^= d0;
+
+               v_8(p[i]) = p0;
+               v_8(q[i]) = q0;
+               v_8(r[i]) = r0;
+               v_8(s[i]) = s0;
+               v_8(t[i]) = t0;
+               v_8(u[i]) = u0;
+       }
+}
+
+/*
+ * Recover failure of one data block at index id[0] using parity at index
+ * ip[0] for any RAID level.
+ *
+ * Starting from the equation:
+ *
+ * Pd = A[ip[0],id[0]] * Dx
+ *
+ * and solving we get:
+ *
+ * Dx = A[ip[0],id[0]]^-1 * Pd
+ */
+void raid_rec1_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *pa;
+       const uint8_t *T;
+       uint8_t G;
+       uint8_t V;
+       size_t i;
+
+       (void)nr; /* unused, it's always 1 */
+
+       /* if it's RAID5 uses the faster function */
+       if (ip[0] == 0) {
+               raid_rec1of1(id, nd, size, vv);
+               return;
+       }
+
+       /* setup the coefficients matrix */
+       G = A(ip[0], id[0]);
+
+       /* invert it to solve the system of linear equations */
+       V = inv(G);
+
+       /* get multiplication tables */
+       T = table(V);
+
+       /* compute delta parity */
+       raid_delta_gen(1, id, ip, nd, size, vv);
+
+       p = v[nd + ip[0]];
+       pa = v[id[0]];
+
+       for (i = 0; i < size; ++i) {
+               /* delta */
+               uint8_t Pd = p[i] ^ pa[i];
+
+               /* reconstruct */
+               pa[i] = T[Pd];
+       }
+}
+
+/*
+ * Recover failure of two data blocks at indexes id[0],id[1] using parity at
+ * indexes ip[0],ip[1] for any RAID level.
+ *
+ * Starting from the equations:
+ *
+ * Pd = A[ip[0],id[0]] * Dx + A[ip[0],id[1]] * Dy
+ * Qd = A[ip[1],id[0]] * Dx + A[ip[1],id[1]] * Dy
+ *
+ * we solve inverting the coefficients matrix.
+ */
+void raid_rec2_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *pa;
+       uint8_t *q;
+       uint8_t *qa;
+       const int N = 2;
+       const uint8_t *T[N][N];
+       uint8_t G[N * N];
+       uint8_t V[N * N];
+       size_t i;
+       int j, k;
+
+       (void)nr; /* unused, it's always 2 */
+
+       /* if it's RAID6 recovering with P and Q uses the faster function */
+       if (ip[0] == 0 && ip[1] == 1) {
+               raid_rec2of2_int8(id, ip, nd, size, vv);
+               return;
+       }
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       G[j * N + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, N);
+
+       /* get multiplication tables */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       T[j][k] = table(V[j * N + k]);
+
+       /* compute delta parity */
+       raid_delta_gen(2, id, ip, nd, size, vv);
+
+       p = v[nd + ip[0]];
+       q = v[nd + ip[1]];
+       pa = v[id[0]];
+       qa = v[id[1]];
+
+       for (i = 0; i < size; ++i) {
+               /* delta */
+               uint8_t Pd = p[i] ^ pa[i];
+               uint8_t Qd = q[i] ^ qa[i];
+
+               /* reconstruct */
+               pa[i] = T[0][0][Pd] ^ T[0][1][Qd];
+               qa[i] = T[1][0][Pd] ^ T[1][1][Qd];
+       }
+}
+
+/*
+ * Recover failure of N data blocks at indexes id[N] using parity at indexes
+ * ip[N] for any RAID level.
+ *
+ * Starting from the N equations, with 0<=i<N :
+ *
+ * PD[i] = sum(A[ip[i],id[j]] * D[i]) 0<=j<N
+ *
+ * we solve inverting the coefficients matrix.
+ *
+ * Note that referring at previous equations you have:
+ * PD[0] = Pd, PD[1] = Qd, PD[2] = Rd, ...
+ * D[0] = Dx, D[1] = Dy, D[2] = Dz, ...
+ */
+void raid_recX_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p[RAID_PARITY_MAX];
+       uint8_t *pa[RAID_PARITY_MAX];
+       const uint8_t *T[RAID_PARITY_MAX][RAID_PARITY_MAX];
+       uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       size_t i;
+       int j, k;
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < nr; ++j)
+               for (k = 0; k < nr; ++k)
+                       G[j * nr + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, nr);
+
+       /* get multiplication tables */
+       for (j = 0; j < nr; ++j)
+               for (k = 0; k < nr; ++k)
+                       T[j][k] = table(V[j * nr + k]);
+
+       /* compute delta parity */
+       raid_delta_gen(nr, id, ip, nd, size, vv);
+
+       for (j = 0; j < nr; ++j) {
+               p[j] = v[nd + ip[j]];
+               pa[j] = v[id[j]];
+       }
+
+       for (i = 0; i < size; ++i) {
+               uint8_t PD[RAID_PARITY_MAX];
+
+               /* delta */
+               for (j = 0; j < nr; ++j)
+                       PD[j] = p[j][i] ^ pa[j][i];
+
+               /* reconstruct */
+               for (j = 0; j < nr; ++j) {
+                       uint8_t b = 0;
+
+                       for (k = 0; k < nr; ++k)
+                               b ^= T[j][k][PD[k]];
+                       pa[j][i] = b;
+               }
+       }
+}
+

diff --git a/raid/internal.h b/raid/internal.h
new file mode 100644 (file)
index 0000000..4465cb9
--- /dev/null
+++ b/raid/internal.h
@@ -0,0 +1,274 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_INTERNAL_H
+#define __RAID_INTERNAL_H
+
+/*
+ * Supported instruction sets.
+ *
+ * It may happen that the assembler is too old to support
+ * all instructions, even if the architecture supports them.
+ * These defines allow to exclude from the build the not supported ones.
+ *
+ * If in your project you use a predefined assembler, you can define them
+ * using fixed values, instead of using the HAVE_* defines.
+ */
+#if HAVE_CONFIG_H
+
+/* Includes the project configuration for HAVE_* defines */
+#include "config.h"
+
+/* If the compiler supports assembly */
+#if HAVE_ASSEMBLY
+/* Autodetect from the compiler */
+#if defined(__i386__)
+#define CONFIG_X86 1
+#define CONFIG_X86_32 1
+#endif
+#if defined(__x86_64__)
+#define CONFIG_X86 1
+#define CONFIG_X86_64 1
+#endif
+#endif
+
+/* Enables SSE2, SSSE3, AVX2 only if the assembler supports it */
+#if HAVE_SSE2
+#define CONFIG_SSE2 1
+#endif
+#if HAVE_SSSE3
+#define CONFIG_SSSE3 1
+#endif
+#if HAVE_AVX2
+#define CONFIG_AVX2 1
+#endif
+
+#else /* if HAVE_CONFIG_H is not defined */
+
+/* Assume that assembly is always supported */
+#if defined(__i386__)
+#define CONFIG_X86 1
+#define CONFIG_X86_32 1
+#endif
+
+#if defined(__x86_64__)
+#define CONFIG_X86 1
+#define CONFIG_X86_64 1
+#endif
+
+/* Assumes that the assembler supports everything */
+#ifdef CONFIG_X86
+#define CONFIG_SSE2 1
+#define CONFIG_SSSE3 1
+#define CONFIG_AVX2 1
+#endif
+#endif
+
+/*
+ * Includes anything required for compatibility.
+ */
+#include <assert.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+/*
+ * Inverse assert.
+ */
+#define BUG_ON(a) assert(!(a))
+
+/*
+ * Forced inline.
+ */
+#ifndef __always_inline
+#define __always_inline inline __attribute__((always_inline))
+#endif
+
+/*
+ * Forced alignment.
+ */
+#ifndef __aligned
+#define __aligned(a) __attribute__((aligned(a)))
+#endif
+
+/*
+ * Align a pointer at the specified size.
+ */
+static __always_inline void *__align_ptr(void *ptr, uintptr_t size)
+{
+       uintptr_t offset = (uintptr_t)ptr;
+
+       offset = (offset + size - 1U) & ~(size - 1U);
+
+       return (void *)offset;
+}
+
+/*
+ * Includes the main interface headers.
+ */
+#include "raid.h"
+#include "helper.h"
+
+/*
+ * Internal functions.
+ *
+ * These are intended to provide access for testing.
+ */
+int raid_selftest(void);
+void raid_gen_ref(int nd, int np, size_t size, void **vv);
+void raid_invert(uint8_t *M, uint8_t *V, int n);
+void raid_delta_gen(int nr, int *id, int *ip, int nd, size_t size, void **v);
+void raid_rec1of1(int *id, int nd, size_t size, void **v);
+void raid_rec2of2_int8(int *id, int *ip, int nd, size_t size, void **vv);
+void raid_gen1_int32(int nd, size_t size, void **vv);
+void raid_gen1_int64(int nd, size_t size, void **vv);
+void raid_gen1_sse2(int nd, size_t size, void **vv);
+void raid_gen1_avx2(int nd, size_t size, void **vv);
+void raid_gen2_int32(int nd, size_t size, void **vv);
+void raid_gen2_int64(int nd, size_t size, void **vv);
+void raid_gen2_sse2(int nd, size_t size, void **vv);
+void raid_gen2_avx2(int nd, size_t size, void **vv);
+void raid_gen2_sse2ext(int nd, size_t size, void **vv);
+void raid_genz_int32(int nd, size_t size, void **vv);
+void raid_genz_int64(int nd, size_t size, void **vv);
+void raid_genz_sse2(int nd, size_t size, void **vv);
+void raid_genz_sse2ext(int nd, size_t size, void **vv);
+void raid_genz_avx2ext(int nd, size_t size, void **vv);
+void raid_gen3_int8(int nd, size_t size, void **vv);
+void raid_gen3_ssse3(int nd, size_t size, void **vv);
+void raid_gen3_ssse3ext(int nd, size_t size, void **vv);
+void raid_gen3_avx2ext(int nd, size_t size, void **vv);
+void raid_gen4_int8(int nd, size_t size, void **vv);
+void raid_gen4_ssse3(int nd, size_t size, void **vv);
+void raid_gen4_ssse3ext(int nd, size_t size, void **vv);
+void raid_gen4_avx2ext(int nd, size_t size, void **vv);
+void raid_gen5_int8(int nd, size_t size, void **vv);
+void raid_gen5_ssse3(int nd, size_t size, void **vv);
+void raid_gen5_ssse3ext(int nd, size_t size, void **vv);
+void raid_gen5_avx2ext(int nd, size_t size, void **vv);
+void raid_gen6_int8(int nd, size_t size, void **vv);
+void raid_gen6_ssse3(int nd, size_t size, void **vv);
+void raid_gen6_ssse3ext(int nd, size_t size, void **vv);
+void raid_gen6_avx2ext(int nd, size_t size, void **vv);
+void raid_rec1_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_rec2_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_recX_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
+
+/*
+ * Internal naming.
+ *
+ * These are intented to provide access for testing.
+ */
+const char *raid_gen1_tag(void);
+const char *raid_gen2_tag(void);
+const char *raid_genz_tag(void);
+const char *raid_gen3_tag(void);
+const char *raid_gen4_tag(void);
+const char *raid_gen5_tag(void);
+const char *raid_gen6_tag(void);
+const char *raid_rec1_tag(void);
+const char *raid_rec2_tag(void);
+const char *raid_recX_tag(void);
+
+/*
+ * Internal forwarders.
+ */
+extern void (*raid_gen3_ptr)(int nd, size_t size, void **vv);
+extern void (*raid_genz_ptr)(int nd, size_t size, void **vv);
+extern void (*raid_gen_ptr[RAID_PARITY_MAX])(
+       int nd, size_t size, void **vv);
+extern void (*raid_rec_ptr[RAID_PARITY_MAX])(
+       int nr, int *id, int *ip, int nd, size_t size, void **vv);
+
+/*
+ * Tables.
+ */
+extern const uint8_t raid_gfmul[256][256] __aligned(256);
+extern const uint8_t raid_gfexp[256] __aligned(256);
+extern const uint8_t raid_gfinv[256] __aligned(256);
+extern const uint8_t raid_gfvandermonde[3][256] __aligned(256);
+extern const uint8_t raid_gfcauchy[6][256] __aligned(256);
+extern const uint8_t raid_gfcauchypshufb[251][4][2][16] __aligned(256);
+extern const uint8_t raid_gfmulpshufb[256][2][16] __aligned(256);
+extern const uint8_t (*raid_gfgen)[256];
+#define gfmul raid_gfmul
+#define gfexp raid_gfexp
+#define gfinv raid_gfinv
+#define gfvandermonde raid_gfvandermonde
+#define gfcauchy raid_gfcauchy
+#define gfgenpshufb raid_gfcauchypshufb
+#define gfmulpshufb raid_gfmulpshufb
+#define gfgen raid_gfgen
+
+/*
+ * Assembler blocks.
+ */
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSE2
+static __always_inline void raid_sse_begin(void)
+{
+}
+
+static __always_inline void raid_sse_end(void)
+{
+       /* SSE and AVX code uses non-temporal writes, like MOVNTDQ, */
+       /* that use a weak memory model. To ensure that other processors */
+       /* see correctly the data written, we use a store-store memory */
+       /* barrier at the end of the asm code */
+       asm volatile ("sfence" : : : "memory");
+
+       /* clobbers registers used in the asm code */
+       /* this is required because in the Windows ABI, */
+       /* registers xmm6-xmm15 should be kept by the callee. */
+       /* this clobber list force the compiler to save any */
+       /* register that needs to be saved */
+       /* we check for __SSE2_ because we require that the */
+       /* compiler supports SSE2 registers in the clobber list */
+#ifdef __SSE2__
+       asm volatile ("" : : : "%xmm0", "%xmm1", "%xmm2", "%xmm3");
+       asm volatile ("" : : : "%xmm4", "%xmm5", "%xmm6", "%xmm7");
+#ifdef CONFIG_X86_64
+       asm volatile ("" : : : "%xmm8", "%xmm9", "%xmm10", "%xmm11");
+       asm volatile ("" : : : "%xmm12", "%xmm13", "%xmm14", "%xmm15");
+#endif
+#endif
+}
+#endif
+
+#ifdef CONFIG_AVX2
+static __always_inline void raid_avx_begin(void)
+{
+       raid_sse_begin();
+}
+
+static __always_inline void raid_avx_end(void)
+{
+       raid_sse_end();
+
+       /* reset the upper part of the ymm registers */
+       /* to avoid the 70 clocks penality on the next */
+       /* xmm register use */
+       asm volatile ("vzeroupper" : : : "memory");
+}
+#endif
+#endif /* CONFIG_X86 */
+
+#endif
+

diff --git a/raid/intz.c b/raid/intz.c
new file mode 100644 (file)
index 0000000..80c2014
--- /dev/null
+++ b/raid/intz.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "gf.h"
+
+/*
+ * GENz (triple parity with powers of 2^-1) 32bit C implementation
+ */
+void raid_genz_int32(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t**)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       uint32_t d0, r0, q0, p0;
+       uint32_t d1, r1, q1, p1;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       for (i = 0; i < size; i += 8) {
+               r0 = q0 = p0 = v_32(v[l][i]);
+               r1 = q1 = p1 = v_32(v[l][i + 4]);
+               for (d = l - 1; d >= 0; --d) {
+                       d0 = v_32(v[d][i]);
+                       d1 = v_32(v[d][i + 4]);
+
+                       p0 ^= d0;
+                       p1 ^= d1;
+
+                       q0 = x2_32(q0);
+                       q1 = x2_32(q1);
+
+                       q0 ^= d0;
+                       q1 ^= d1;
+
+                       r0 = d2_32(r0);
+                       r1 = d2_32(r1);
+
+                       r0 ^= d0;
+                       r1 ^= d1;
+               }
+               v_32(p[i]) = p0;
+               v_32(p[i + 4]) = p1;
+               v_32(q[i]) = q0;
+               v_32(q[i + 4]) = q1;
+               v_32(r[i]) = r0;
+               v_32(r[i + 4]) = r1;
+       }
+}
+
+/*
+ * GENz (triple parity with powers of 2^-1) 64bit C implementation
+ */
+void raid_genz_int64(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t**)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       uint64_t d0, r0, q0, p0;
+       uint64_t d1, r1, q1, p1;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       for (i = 0; i < size; i += 16) {
+               r0 = q0 = p0 = v_64(v[l][i]);
+               r1 = q1 = p1 = v_64(v[l][i + 8]);
+               for (d = l - 1; d >= 0; --d) {
+                       d0 = v_64(v[d][i]);
+                       d1 = v_64(v[d][i + 8]);
+
+                       p0 ^= d0;
+                       p1 ^= d1;
+
+                       q0 = x2_64(q0);
+                       q1 = x2_64(q1);
+
+                       q0 ^= d0;
+                       q1 ^= d1;
+
+                       r0 = d2_64(r0);
+                       r1 = d2_64(r1);
+
+                       r0 ^= d0;
+                       r1 ^= d1;
+               }
+               v_64(p[i]) = p0;
+               v_64(p[i + 8]) = p1;
+               v_64(q[i]) = q0;
+               v_64(q[i + 8]) = q1;
+               v_64(r[i]) = r0;
+               v_64(r[i + 8]) = r1;
+       }
+}
+

diff --git a/raid/memory.c b/raid/memory.c
new file mode 100644 (file)
index 0000000..02a5a92
--- /dev/null
+++ b/raid/memory.c
@@ -0,0 +1,154 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "memory.h"
+
+void *raid_malloc_align(size_t size, size_t align_size, void **freeptr)
+{
+       unsigned char *ptr;
+       uintptr_t offset;
+
+       ptr = malloc(size + align_size);
+       if (!ptr) {
+               /* LCOV_EXCL_START */
+               return 0;
+               /* LCOV_EXCL_STOP */
+       }
+
+       *freeptr = ptr;
+
+       offset = ((uintptr_t)ptr) % align_size;
+
+       if (offset != 0)
+               ptr += align_size - offset;
+
+       return ptr;
+}
+
+void *raid_malloc(size_t size, void **freeptr)
+{
+    return raid_malloc_align(size, RAID_MALLOC_ALIGN, freeptr);
+}
+
+void **raid_malloc_vector_align(int nd, int n, size_t size, size_t align_size, size_t displacement_size, void **freeptr)
+{
+       void **v;
+       unsigned char *va;
+       int i;
+
+       BUG_ON(n <= 0 || nd < 0);
+
+       v = malloc(n * sizeof(void *));
+       if (!v) {
+               /* LCOV_EXCL_START */
+               return 0;
+               /* LCOV_EXCL_STOP */
+       }
+
+       va = raid_malloc_align(n * (size + displacement_size), align_size, freeptr);
+       if (!va) {
+               /* LCOV_EXCL_START */
+               free(v);
+               return 0;
+               /* LCOV_EXCL_STOP */
+       }
+
+       for (i = 0; i < n; ++i) {
+               v[i] = va;
+               va += size + displacement_size;
+       }
+
+       /* reverse order of the data blocks */
+       /* because they are usually accessed from the last one */
+       for (i = 0; i < nd / 2; ++i) {
+               void *ptr = v[i];
+
+               v[i] = v[nd - 1 - i];
+               v[nd - 1 - i] = ptr;
+       }
+
+       return v;
+}
+
+void **raid_malloc_vector(int nd, int n, size_t size, void **freeptr)
+{
+    return raid_malloc_vector_align(nd, n, size, RAID_MALLOC_ALIGN, RAID_MALLOC_DISPLACEMENT, freeptr);
+}
+
+void raid_mrand_vector(unsigned seed, int n, size_t size, void **vv)
+{
+       unsigned char **v = (unsigned char **)vv;
+       int i;
+       size_t j;
+
+       for (i = 0; i < n; ++i)
+               for (j = 0; j < size; ++j) {
+                       /* basic C99/C11 linear congruential generator */
+                       seed = seed * 1103515245U + 12345U;
+
+                       v[i][j] = seed >> 16;
+               }
+}
+
+int raid_mtest_vector(int n, size_t size, void **vv)
+{
+       unsigned char **v = (unsigned char **)vv;
+       int i;
+       size_t j;
+       unsigned k;
+       unsigned char d;
+       unsigned char p;
+
+       /* fill with 0 */
+       d = 0;
+       for (i = 0; i < n; ++i)
+               for (j = 0; j < size; ++j)
+                       v[i][j] = d;
+
+       /* test with all the byte patterns */
+       for (k = 1; k < 256; ++k) {
+               p = d;
+               d = k;
+
+               /* forward fill */
+               for (i = 0; i < n; ++i) {
+                       for (j = 0; j < size; ++j) {
+                               if (v[i][j] != p) {
+                                       /* LCOV_EXCL_START */
+                                       return -1;
+                                       /* LCOV_EXCL_STOP */
+                               }
+                               v[i][j] = d;
+                       }
+               }
+
+               p = d;
+               d = ~p;
+               /* backward fill with complement */
+               for (i = 0; i < n; ++i) {
+                       for (j = size; j > 0; --j) {
+                               if (v[i][j - 1] != p) {
+                                       /* LCOV_EXCL_START */
+                                       return -1;
+                                       /* LCOV_EXCL_STOP */
+                               }
+                               v[i][j - 1] = d;
+                       }
+               }
+       }
+
+       return 0;
+}
+

diff --git a/raid/memory.h b/raid/memory.h
new file mode 100644 (file)
index 0000000..de00614
--- /dev/null
+++ b/raid/memory.h
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_MEMORY_H
+#define __RAID_MEMORY_H
+
+/**
+ * Memory alignment provided by raid_malloc().
+ *
+ * It should guarantee good cache performance everywhere.
+ */
+#define RAID_MALLOC_ALIGN 256
+
+/**
+ * Memory displacement to avoid cache address sharing on contiguous blocks,
+ * used by raid_malloc_vector().
+ *
+ * When allocating a sequence of blocks with a size of power of 2,
+ * there is the risk that the addresses of each block are mapped into the
+ * same cache line and prefetching predictor, resulting in a lot of cache
+ * sharing if you access all the blocks in parallel, from the start to the
+ * end.
+ *
+ * To avoid this effect, it's better if all the blocks are allocated
+ * with a fixed displacement trying to reduce the cache addresses sharing.
+ *
+ * The selected displacement was chosen empirically with some speed tests
+ * with 8/12/16/20/24 data buffers of 256 KB.
+ *
+ * These are the results in MB/s with no displacement:
+ *
+ *            sse2
+ *    gen1   15368 [MB/s]
+ *    gen2    6814 [MB/s]
+ *    genz    3033 [MB/s]
+ *
+ * These are the results with displacement resulting in improvments
+ * in the order of 20% or more:
+ *
+ *            sse2
+ *    gen1   21936 [MB/s]
+ *    gen2   11902 [MB/s]
+ *    genz    5838 [MB/s]
+ *
+ */
+#define RAID_MALLOC_DISPLACEMENT (7*256)
+
+/**
+ * Aligned malloc.
+ * Use an alignment suitable for the raid functions.
+ */
+void *raid_malloc(size_t size, void **freeptr);
+
+/**
+ * Arbitrary aligned malloc.
+ */
+void *raid_malloc_align(size_t size, size_t align_size, void **freeptr);
+
+/**
+ * Aligned vector allocation.
+ * Use an alignment suitable for the raid functions.
+ * Returns a vector of @n pointers, each one pointing to a block of
+ * the specified @size.
+ * The first @nd elements are reversed in order.
+ */
+void **raid_malloc_vector(int nd, int n, size_t size, void **freeptr);
+
+/**
+ * Arbitrary aligned vector allocation.
+ */
+void **raid_malloc_vector_align(int nd, int n, size_t size, size_t align_size, size_t displacement_size, void **freeptr);
+
+/**
+ * Fills the memory vector with pseudo-random data based on the specified seed.
+ */
+void raid_mrand_vector(unsigned seed, int n, size_t size, void **vv);
+
+/**
+ * Tests the memory vector for RAM problems.
+ * If a problem is found, it crashes.
+ */
+int raid_mtest_vector(int n, size_t size, void **vv);
+
+#endif
+

diff --git a/raid/module.c b/raid/module.c
new file mode 100644 (file)
index 0000000..b688d22
--- /dev/null
+++ b/raid/module.c
@@ -0,0 +1,473 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "memory.h"
+#include "cpu.h"
+
+/*
+ * Initializes and selects the best algorithm.
+ */
+void raid_init(void)
+{
+       raid_gen3_ptr = raid_gen3_int8;
+       raid_gen_ptr[3] = raid_gen4_int8;
+       raid_gen_ptr[4] = raid_gen5_int8;
+       raid_gen_ptr[5] = raid_gen6_int8;
+
+       if (sizeof(void *) == 4) {
+               raid_gen_ptr[0] = raid_gen1_int32;
+               raid_gen_ptr[1] = raid_gen2_int32;
+               raid_genz_ptr = raid_genz_int32;
+       } else {
+               raid_gen_ptr[0] = raid_gen1_int64;
+               raid_gen_ptr[1] = raid_gen2_int64;
+               raid_genz_ptr = raid_genz_int64;
+       }
+
+       raid_rec_ptr[0] = raid_rec1_int8;
+       raid_rec_ptr[1] = raid_rec2_int8;
+       raid_rec_ptr[2] = raid_recX_int8;
+       raid_rec_ptr[3] = raid_recX_int8;
+       raid_rec_ptr[4] = raid_recX_int8;
+       raid_rec_ptr[5] = raid_recX_int8;
+
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSE2
+       if (raid_cpu_has_sse2()) {
+               raid_gen_ptr[0] = raid_gen1_sse2;
+#ifdef CONFIG_X86_64
+               if (raid_cpu_has_slowextendedreg()) {
+                       raid_gen_ptr[1] = raid_gen2_sse2;
+               } else {
+                       raid_gen_ptr[1] = raid_gen2_sse2ext;
+               }
+               /* note that raid_cpu_has_slowextendedreg() doesn't affect parz */
+               raid_genz_ptr = raid_genz_sse2ext;
+#else
+               raid_gen_ptr[1] = raid_gen2_sse2;
+               raid_genz_ptr = raid_genz_sse2;
+#endif
+       }
+#endif
+
+#ifdef CONFIG_SSSE3
+       if (raid_cpu_has_ssse3()) {
+#ifdef CONFIG_X86_64
+               if (raid_cpu_has_slowextendedreg()) {
+                       raid_gen3_ptr = raid_gen3_ssse3;
+                       raid_gen_ptr[3] = raid_gen4_ssse3;
+                       raid_gen_ptr[4] = raid_gen5_ssse3;
+                       raid_gen_ptr[5] = raid_gen6_ssse3;
+               } else {
+                       raid_gen3_ptr = raid_gen3_ssse3ext;
+                       raid_gen_ptr[3] = raid_gen4_ssse3ext;
+                       raid_gen_ptr[4] = raid_gen5_ssse3ext;
+                       raid_gen_ptr[5] = raid_gen6_ssse3ext;
+               }
+#else
+               raid_gen3_ptr = raid_gen3_ssse3;
+               raid_gen_ptr[3] = raid_gen4_ssse3;
+               raid_gen_ptr[4] = raid_gen5_ssse3;
+               raid_gen_ptr[5] = raid_gen6_ssse3;
+#endif
+               raid_rec_ptr[0] = raid_rec1_ssse3;
+               raid_rec_ptr[1] = raid_rec2_ssse3;
+               raid_rec_ptr[2] = raid_recX_ssse3;
+               raid_rec_ptr[3] = raid_recX_ssse3;
+               raid_rec_ptr[4] = raid_recX_ssse3;
+               raid_rec_ptr[5] = raid_recX_ssse3;
+       }
+#endif
+
+#ifdef CONFIG_AVX2
+       if (raid_cpu_has_avx2()) {
+               raid_gen_ptr[0] = raid_gen1_avx2;
+               raid_gen_ptr[1] = raid_gen2_avx2;
+#ifdef CONFIG_X86_64
+               raid_gen3_ptr = raid_gen3_avx2ext;
+               raid_genz_ptr = raid_genz_avx2ext;
+               raid_gen_ptr[3] = raid_gen4_avx2ext;
+               raid_gen_ptr[4] = raid_gen5_avx2ext;
+               raid_gen_ptr[5] = raid_gen6_avx2ext;
+#endif
+               raid_rec_ptr[0] = raid_rec1_avx2;
+               raid_rec_ptr[1] = raid_rec2_avx2;
+               raid_rec_ptr[2] = raid_recX_avx2;
+               raid_rec_ptr[3] = raid_recX_avx2;
+               raid_rec_ptr[4] = raid_recX_avx2;
+               raid_rec_ptr[5] = raid_recX_avx2;
+       }
+#endif
+#endif /* CONFIG_X86 */
+
+       /* set the default mode */
+       raid_mode(RAID_MODE_CAUCHY);
+}
+
+/*
+ * Reference parity computation.
+ */
+void raid_gen_ref(int nd, int np, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       size_t i;
+
+       for (i = 0; i < size; ++i) {
+               uint8_t p[RAID_PARITY_MAX];
+               int j, d;
+
+               for (j = 0; j < np; ++j)
+                       p[j] = 0;
+
+               for (d = 0; d < nd; ++d) {
+                       uint8_t b = v[d][i];
+
+                       for (j = 0; j < np; ++j)
+                               p[j] ^= gfmul[b][gfgen[j][d]];
+               }
+
+               for (j = 0; j < np; ++j)
+                       v[nd + j][i] = p[j];
+       }
+}
+
+/*
+ * Size of the blocks to test.
+ */
+#define TEST_SIZE 4096
+
+/*
+ * Number of data blocks to test.
+ */
+#define TEST_COUNT (65536 / TEST_SIZE)
+
+/*
+ * Parity generation test.
+ */
+static int raid_test_par(int nd, int np, size_t size, void **v, void **ref)
+{
+       int i;
+       void *t[TEST_COUNT + RAID_PARITY_MAX];
+
+       /* setup data */
+       for (i = 0; i < nd; ++i)
+               t[i] = ref[i];
+
+       /* setup parity */
+       for (i = 0; i < np; ++i)
+               t[nd + i] = v[nd + i];
+
+       raid_gen(nd, np, size, t);
+
+       /* compare parity */
+       for (i = 0; i < np; ++i) {
+               if (memcmp(t[nd + i], ref[nd + i], size) != 0) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       return 0;
+}
+
+/*
+ * Recovering test.
+ */
+static int raid_test_rec(int nr, int *ir, int nd, int np, size_t size, void **v, void **ref)
+{
+       int i, j;
+       void *t[TEST_COUNT + RAID_PARITY_MAX];
+
+       /* setup data and parity vector */
+       for (i = 0, j = 0; i < nd + np; ++i) {
+               if (j < nr && ir[j] == i) {
+                       /* this block has to be recovered */
+                       t[i] = v[i];
+                       ++j;
+               } else {
+                       /* this block is used for recovering */
+                       t[i] = ref[i];
+               }
+       }
+
+       raid_rec(nr, ir, nd, np, size, t);
+
+       /* compare all data and parity */
+       for (i = 0; i < nd + np; ++i) {
+               if (t[i] != ref[i]
+                       && memcmp(t[i], ref[i], size) != 0) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       return 0;
+}
+
+/*
+ * Recovering test for data.
+ */
+static int raid_test_data(int nr, int *id, int *ip, int nd, int np, size_t size, void **v, void **ref)
+{
+       int i, j;
+       void *t[TEST_COUNT + RAID_PARITY_MAX];
+
+       /* setup data vector */
+       for (i = 0, j = 0; i < nd; ++i) {
+               if (j < nr && id[j] == i) {
+                       /* this block has to be recovered */
+                       t[i] = v[i];
+                       ++j;
+               } else {
+                       /* this block is left unchanged */
+                       t[i] = ref[i];
+               }
+       }
+
+       /* setup parity vector */
+       for (i = 0, j = 0; i < np; ++i) {
+               if (j < nr && ip[j] == i) {
+                       /* this block is used for recovering */
+                       t[nd + i] = ref[nd + i];
+                       ++j;
+               } else {
+                       /* this block should not be read or written */
+                       t[nd + i] = 0;
+               }
+       }
+
+       raid_data(nr, id, ip, nd, size, t);
+
+       /* compare all data and parity */
+       for (i = 0; i < nd; ++i) {
+               if (t[i] != ref[i]
+                       && t[i] != 0
+                       && memcmp(t[i], ref[i], size) != 0) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       return 0;
+}
+
+/*
+ * Scan test.
+ */
+static int raid_test_scan(int nr, int *ir, int nd, int np, size_t size, void **v, void **ref)
+{
+       int i, j, ret;
+       void *t[TEST_COUNT + RAID_PARITY_MAX];
+       int is[RAID_PARITY_MAX];
+
+       /* setup data and parity vector */
+       for (i = 0, j = 0; i < nd + np; ++i) {
+               if (j < nr && ir[j] == i) {
+                       /* this block is bad */
+                       t[i] = v[i];
+                       ++j;
+               } else {
+                       /* this block is used for recovering */
+                       t[i] = ref[i];
+               }
+       }
+
+       ret = raid_scan(is, nd, np, size, t);
+
+       /* compare identified bad blocks */
+       if (ret != nr)
+               return -1;
+       for (i = 0; i < nr; ++i) {
+               if (ir[i] != is[i]) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       return 0;
+}
+
+/*
+ * Basic functionality self test.
+ */
+int raid_selftest(void)
+{
+       const int nd = TEST_COUNT;
+       const size_t size = TEST_SIZE;
+       const int nv = nd + RAID_PARITY_MAX * 2 + 1;
+       void *v_alloc;
+       void **v;
+       void *ref[nd + RAID_PARITY_MAX];
+       int ir[RAID_PARITY_MAX];
+       int ip[RAID_PARITY_MAX];
+       int i, np;
+       int ret = 0;
+
+       /* ensure to have enough space for data */
+       BUG_ON(nd * size > 65536);
+
+       v = raid_malloc_vector(nd, nv, size, &v_alloc);
+       if (!v) {
+               /* LCOV_EXCL_START */
+               return -1;
+               /* LCOV_EXCL_STOP */
+       }
+
+       memset(v[nv - 1], 0, size);
+       raid_zero(v[nv - 1]);
+
+       /* use the multiplication table as data */
+       for (i = 0; i < nd; ++i)
+               ref[i] = ((uint8_t *)gfmul) + size * i;
+
+       /* setup reference parity */
+       for (i = 0; i < RAID_PARITY_MAX; ++i)
+               ref[nd + i] = v[nd + RAID_PARITY_MAX + i];
+
+       /* compute reference parity */
+       raid_gen_ref(nd, RAID_PARITY_MAX, size, ref);
+
+       /* test for each parity level */
+       for (np = 1; np <= RAID_PARITY_MAX; ++np) {
+               /* test parity generation */
+               ret = raid_test_par(nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               /* test recovering with broken ending data disks */
+               for (i = 0; i < np; ++i) {
+                       /* bad data */
+                       ir[i] = nd - np + i;
+
+                       /* good parity */
+                       ip[i] = i;
+               }
+
+               ret = raid_test_rec(np, ir, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               ret = raid_test_data(np, ir, ip, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               /* test recovering with broken leading data and broken leading parity */
+               for (i = 0; i < np / 2; ++i) {
+                       /* bad data */
+                       ir[i] = i;
+
+                       /* good parity */
+                       ip[i] = (np + 1) / 2 + i;
+               }
+
+               /* bad parity */
+               for (i = 0; i < (np + 1) / 2; ++i)
+                       ir[np / 2 + i] = nd + i;
+
+               ret = raid_test_rec(np, ir, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               ret = raid_test_data(np / 2, ir, ip, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               /* test recovering with broken leading data and broken ending parity */
+               for (i = 0; i < np / 2; ++i) {
+                       /* bad data */
+                       ir[i] = i;
+
+                       /* good parity */
+                       ip[i] = i;
+               }
+
+               /* bad parity */
+               for (i = 0; i < (np + 1) / 2; ++i)
+                       ir[np / 2 + i] = nd + np - (np + 1) / 2 + i;
+
+               ret = raid_test_rec(np, ir, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               ret = raid_test_data(np / 2, ir, ip, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+
+               /* scan test with broken data and parity */
+               for (i = 0; i < np / 2; ++i) {
+                       /* bad data */
+                       ir[i] = i;
+               }
+               for (i = 0; i < (np - 1) / 2; ++i) {
+                       /* bad parity */
+                       ir[np / 2 + i] = nd + i;
+               }
+               for (i = 0; i < np - 1; ++i) {
+                       /* make blocks bad */
+                       /* we cannot fill them with 0, because the original */
+                       /* data may be already filled with 0 */
+                       memset(v[ir[i]], 0x55, size);
+               }
+
+               ret = raid_test_scan(np - 1, ir, nd, np, size, v, ref);
+               if (ret != 0) {
+                       /* LCOV_EXCL_START */
+                       goto bail;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       /* scan test with no parity */
+       ret = raid_test_scan(0, 0, nd, 0, size, v, ref);
+       if (ret != -1) {
+               /* LCOV_EXCL_START */
+               goto bail;
+               /* LCOV_EXCL_STOP */
+       }
+
+       ret = 0;
+
+bail:
+       free(v);
+       free(v_alloc);
+
+       return ret;
+}
+

diff --git a/raid/raid.c b/raid/raid.c
new file mode 100644 (file)
index 0000000..3052675
--- /dev/null
+++ b/raid/raid.c
@@ -0,0 +1,586 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "gf.h"
+
+/*
+ * This is a RAID implementation working in the Galois Field GF(2^8) with
+ * the primitive polynomial x^8 + x^4 + x^3 + x^2 + 1 (285 decimal), and
+ * supporting up to six parity levels.
+ *
+ * For RAID5 and RAID6 it works as as described in the H. Peter Anvin's
+ * paper "The mathematics of RAID-6" [1]. Please refer to this paper for a
+ * complete explanation.
+ *
+ * To support triple parity, it was first evaluated and then dropped, an
+ * extension of the same approach, with additional parity coefficients set
+ * as powers of 2^-1, with equations:
+ *
+ * P = sum(Di)
+ * Q = sum(2^i * Di)
+ * R = sum(2^-i * Di) with 0<=i<N
+ *
+ * This approach works well for triple parity and it's very efficient,
+ * because we can implement very fast parallel multiplications and
+ * divisions by 2 in GF(2^8).
+ *
+ * It's also similar at the approach used by ZFS RAIDZ3, with the
+ * difference that ZFS uses powers of 4 instead of 2^-1.
+ *
+ * Unfortunately it doesn't work beyond triple parity, because whatever
+ * value we choose to generate the power coefficients to compute other
+ * parities, the resulting equations are not solvable for some
+ * combinations of missing disks.
+ *
+ * This is expected, because the Vandermonde matrix used to compute the
+ * parity has no guarantee to have all submatrices not singular
+ * [2, Chap 11, Problem 7] and this is a requirement to have
+ * a MDS (Maximum Distance Separable) code [2, Chap 11, Theorem 8].
+ *
+ * To overcome this limitation, we use a Cauchy matrix [3][4] to compute
+ * the parity. A Cauchy matrix has the property to have all the square
+ * submatrices not singular, resulting in always solvable equations,
+ * for any combination of missing disks.
+ *
+ * The problem of this approach is that it requires the use of
+ * generic multiplications, and not only by 2 or 2^-1, potentially
+ * affecting badly the performance.
+ *
+ * Hopefully there is a method to implement parallel multiplications
+ * using SSSE3 or AVX2 instructions [1][5]. Method competitive with the
+ * computation of triple parity using power coefficients.
+ *
+ * Another important property of the Cauchy matrix is that we can setup
+ * the first two rows with coeffients equal at the RAID5 and RAID6 approach
+ * decribed, resulting in a compatible extension, and requiring SSSE3
+ * or AVX2 instructions only if triple parity or beyond is used.
+ *
+ * The matrix is also adjusted, multipling each row by a constant factor
+ * to make the first column of all 1, to optimize the computation for
+ * the first disk.
+ *
+ * This results in the matrix A[row,col] defined as:
+ *
+ * 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01...
+ * 01 02 04 08 10 20 40 80 1d 3a 74 e8 cd 87 13 26 4c 98 2d 5a b4 75...
+ * 01 f5 d2 c4 9a 71 f1 7f fc 87 c1 c6 19 2f 40 55 3d ba 53 04 9c 61...
+ * 01 bb a6 d7 c7 07 ce 82 4a 2f a5 9b b6 60 f1 ad e7 f4 06 d2 df 2e...
+ * 01 97 7f 9c 7c 18 bd a2 58 1a da 74 70 a3 e5 47 29 07 f5 80 23 e9...
+ * 01 2b 3f cf 73 2c d6 ed cb 74 15 78 8a c1 17 c9 89 68 21 ab 76 3b...
+ *
+ * This matrix supports 6 level of parity, one for each row, for up to 251
+ * data disks, one for each column, with all the 377,342,351,231 square
+ * submatrices not singular, verified also with brute-force.
+ *
+ * This matrix can be extended to support any number of parities, just
+ * adding additional rows, and removing one column for each new row.
+ * (see mktables.c for more details in how the matrix is generated)
+ *
+ * In details, parity is computed as:
+ *
+ * P = sum(Di)
+ * Q = sum(2^i *  Di)
+ * R = sum(A[2,i] * Di)
+ * S = sum(A[3,i] * Di)
+ * T = sum(A[4,i] * Di)
+ * U = sum(A[5,i] * Di) with 0<=i<N
+ *
+ * To recover from a failure of six disks at indexes x,y,z,h,v,w,
+ * with 0<=x<y<z<h<v<w<N, we compute the parity of the available N-6
+ * disks as:
+ *
+ * Pa = sum(Di)
+ * Qa = sum(2^i * Di)
+ * Ra = sum(A[2,i] * Di)
+ * Sa = sum(A[3,i] * Di)
+ * Ta = sum(A[4,i] * Di)
+ * Ua = sum(A[5,i] * Di) with 0<=i<N,i!=x,i!=y,i!=z,i!=h,i!=v,i!=w.
+ *
+ * And if we define:
+ *
+ * Pd = Pa + P
+ * Qd = Qa + Q
+ * Rd = Ra + R
+ * Sd = Sa + S
+ * Td = Ta + T
+ * Ud = Ua + U
+ *
+ * we can sum these two sets of equations, obtaining:
+ *
+ * Pd =          Dx +          Dy +          Dz +          Dh +          Dv +          Dw
+ * Qd =    2^x * Dx +    2^y * Dy +    2^z * Dz +    2^h * Dh +    2^v * Dv +    2^w * Dw
+ * Rd = A[2,x] * Dx + A[2,y] * Dy + A[2,z] * Dz + A[2,h] * Dh + A[2,v] * Dv + A[2,w] * Dw
+ * Sd = A[3,x] * Dx + A[3,y] * Dy + A[3,z] * Dz + A[3,h] * Dh + A[3,v] * Dv + A[3,w] * Dw
+ * Td = A[4,x] * Dx + A[4,y] * Dy + A[4,z] * Dz + A[4,h] * Dh + A[4,v] * Dv + A[4,w] * Dw
+ * Ud = A[5,x] * Dx + A[5,y] * Dy + A[5,z] * Dz + A[5,h] * Dh + A[5,v] * Dv + A[5,w] * Dw
+ *
+ * A linear system always solvable because the coefficients matrix is
+ * always not singular due the properties of the matrix A[].
+ *
+ * Resulting speed in x64, with 8 data disks, using a stripe of 256 KiB,
+ * for a Core i5-4670K Haswell Quad-Core 3.4GHz is:
+ *
+ *             int8   int32   int64    sse2   ssse3    avx2
+ *   gen1             13339   25438   45438           50588
+ *   gen2              4115    6514   21840           32201
+ *   gen3       814                           10154   18613
+ *   gen4       620                            7569   14229
+ *   gen5       496                            5149   10051
+ *   gen6       413                            4239    8190
+ *
+ * Values are in MiB/s of data processed by a single thread, not counting
+ * generated parity.
+ *
+ * You can replicate these results in your machine using the
+ * "raid/test/speedtest.c" program.
+ *
+ * For comparison, the triple parity computation using the power
+ * coeffients "1,2,2^-1" is only a little faster than the one based on
+ * the Cauchy matrix if SSSE3 or AVX2 is present.
+ *
+ *             int8   int32   int64    sse2   ssse3    avx2
+ *   genz              2337    2874   10920           18944
+ *
+ * In conclusion, the use of power coefficients, and specifically powers
+ * of 1,2,2^-1, is the best option to implement triple parity in CPUs
+ * without SSSE3 and AVX2.
+ * But if a modern CPU with SSSE3 or AVX2 is available, the Cauchy
+ * matrix is the best option because it provides a fast and general
+ * approach working for any number of parities.
+ *
+ * References:
+ * [1] Anvin, "The mathematics of RAID-6", 2004
+ * [2] MacWilliams, Sloane, "The Theory of Error-Correcting Codes", 1977
+ * [3] Blomer, "An XOR-Based Erasure-Resilient Coding Scheme", 1995
+ * [4] Roth, "Introduction to Coding Theory", 2006
+ * [5] Plank, "Screaming Fast Galois Field Arithmetic Using Intel SIMD Instructions", 2013
+ */
+
+/**
+ * Generator matrix currently used.
+ */
+const uint8_t (*raid_gfgen)[256];
+
+void raid_mode(int mode)
+{
+       if (mode == RAID_MODE_VANDERMONDE) {
+               raid_gen_ptr[2] = raid_genz_ptr;
+               raid_gfgen = gfvandermonde;
+       } else {
+               raid_gen_ptr[2] = raid_gen3_ptr;
+               raid_gfgen = gfcauchy;
+       }
+}
+
+/**
+ * Buffer filled with 0 used in recovering.
+ */
+static void *raid_zero_block;
+
+void raid_zero(void *zero)
+{
+       raid_zero_block = zero;
+}
+
+/*
+ * Forwarders for parity computation.
+ *
+ * These functions compute the parity blocks from the provided data.
+ *
+ * The number of parities to compute is implicit in the position in the
+ * forwarder vector. Position at index #i, computes (#i+1) parities.
+ *
+ * All these functions give the guarantee that parities are written
+ * in order. First parity P, then parity Q, and so on.
+ * This allows to specify the same memory buffer for multiple parities
+ * knowning that you'll get the latest written one.
+ * This characteristic is used by the raid_delta_gen() function to
+ * avoid to damage unused parities in recovering.
+ *
+ * @nd Number of data blocks
+ * @size Size of the blocks pointed by @v. It must be a multipler of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + #parities) elements. The starting elements are the blocks
+ *   for data, following with the parity blocks.
+ *   Each block has @size bytes.
+ */
+void (*raid_gen_ptr[RAID_PARITY_MAX])(int nd, size_t size, void **vv);
+void (*raid_gen3_ptr)(int nd, size_t size, void **vv);
+void (*raid_genz_ptr)(int nd, size_t size, void **vv);
+
+void raid_gen(int nd, int np, size_t size, void **v)
+{
+       /* enforce limit on size */
+       BUG_ON(size % 64 != 0);
+
+       /* enforce limit on number of failures */
+       BUG_ON(np < 1);
+       BUG_ON(np > RAID_PARITY_MAX);
+
+       raid_gen_ptr[np - 1](nd, size, v);
+}
+
+/**
+ * Inverts the square matrix M of size nxn into V.
+ *
+ * This is not a general matrix inversion because we assume the matrix M
+ * to have all the square submatrix not singular.
+ * We use Gauss elimination to invert.
+ *
+ * @M Matrix to invert with @n rows and @n columns.
+ * @V Destination matrix where the result is put.
+ * @n Number of rows and columns of the matrix.
+ */
+void raid_invert(uint8_t *M, uint8_t *V, int n)
+{
+       int i, j, k;
+
+       /* set the identity matrix in V */
+       for (i = 0; i < n; ++i)
+               for (j = 0; j < n; ++j)
+                       V[i * n + j] = i == j;
+
+       /* for each element in the diagonal */
+       for (k = 0; k < n; ++k) {
+               uint8_t f;
+
+               /* the diagonal element cannot be 0 because */
+               /* we are inverting matrices with all the square */
+               /* submatrices not singular */
+               BUG_ON(M[k * n + k] == 0);
+
+               /* make the diagonal element to be 1 */
+               f = inv(M[k * n + k]);
+               for (j = 0; j < n; ++j) {
+                       M[k * n + j] = mul(f, M[k * n + j]);
+                       V[k * n + j] = mul(f, V[k * n + j]);
+               }
+
+               /* make all the elements over and under the diagonal */
+               /* to be zero */
+               for (i = 0; i < n; ++i) {
+                       if (i == k)
+                               continue;
+                       f = M[i * n + k];
+                       for (j = 0; j < n; ++j) {
+                               M[i * n + j] ^= mul(f, M[k * n + j]);
+                               V[i * n + j] ^= mul(f, V[k * n + j]);
+                       }
+               }
+       }
+}
+
+/**
+ * Computes the parity without the missing data blocks
+ * and store it in the buffers of such data blocks.
+ *
+ * This is the parity expressed as Pa,Qa,Ra,Sa,Ta,Ua in the equations.
+ */
+void raid_delta_gen(int nr, int *id, int *ip, int nd, size_t size, void **v)
+{
+       void *p[RAID_PARITY_MAX];
+       void *pa[RAID_PARITY_MAX];
+       int i, j;
+       int np;
+       void *latest;
+
+       /* total number of parities we are going to process */
+       /* they are both the used and the unused ones */
+       np = ip[nr - 1] + 1;
+
+       /* latest missing data block */
+       latest = v[id[nr - 1]];
+
+       /* setup pointers for delta computation */
+       for (i = 0, j = 0; i < np; ++i) {
+               /* keep a copy of the original parity vector */
+               p[i] = v[nd + i];
+
+               if (ip[j] == i) {
+                       /*
+                        * Set used parities to point to the missing
+                        * data blocks.
+                        *
+                        * The related data blocks are instead set
+                        * to point to the "zero" buffer.
+                        */
+
+                       /* the latest parity to use ends the for loop and */
+                       /* then it cannot happen to process more of them */
+                       BUG_ON(j >= nr);
+
+                       /* buffer for missing data blocks */
+                       pa[j] = v[id[j]];
+
+                       /* set at zero the missing data blocks */
+                       v[id[j]] = raid_zero_block;
+
+                       /* compute the parity over the missing data blocks */
+                       v[nd + i] = pa[j];
+
+                       /* check for the next used entry */
+                       ++j;
+               } else {
+                       /*
+                        * Unused parities are going to be rewritten with
+                        * not significative data, becase we don't have
+                        * functions able to compute only a subset of
+                        * parities.
+                        *
+                        * To avoid this, we reuse parity buffers,
+                        * assuming that all the parity functions write
+                        * parities in order.
+                        *
+                        * We assign the unused parity block to the same
+                        * block of the latest used parity that we know it
+                        * will be written.
+                        *
+                        * This means that this block will be written
+                        * multiple times and only the latest write will
+                        * contain the correct data.
+                        */
+                       v[nd + i] = latest;
+               }
+       }
+
+       /* all the parities have to be processed */
+       BUG_ON(j != nr);
+
+       /* recompute the parity, note that np may be smaller than the */
+       /* total number of parities available */
+       raid_gen(nd, np, size, v);
+
+       /* restore data buffers as before */
+       for (j = 0; j < nr; ++j)
+               v[id[j]] = pa[j];
+
+       /* restore parity buffers as before */
+       for (i = 0; i < np; ++i)
+               v[nd + i] = p[i];
+}
+
+/**
+ * Recover failure of one data block for PAR1.
+ *
+ * Starting from the equation:
+ *
+ * Pd = Dx
+ *
+ * and solving we get:
+ *
+ * Dx = Pd
+ */
+void raid_rec1of1(int *id, int nd, size_t size, void **v)
+{
+       void *p;
+       void *pa;
+
+       /* for PAR1 we can directly compute the missing block */
+       /* and we don't need to use the zero buffer */
+       p = v[nd];
+       pa = v[id[0]];
+
+       /* use the parity as missing data block */
+       v[id[0]] = p;
+
+       /* compute the parity over the missing data block */
+       v[nd] = pa;
+
+       /* compute */
+       raid_gen(nd, 1, size, v);
+
+       /* restore as before */
+       v[id[0]] = pa;
+       v[nd] = p;
+}
+
+/**
+ * Recover failure of two data blocks for PAR2.
+ *
+ * Starting from the equations:
+ *
+ * Pd = Dx + Dy
+ * Qd = 2^id[0] * Dx + 2^id[1] * Dy
+ *
+ * and solving we get:
+ *
+ *               1                     2^(-id[0])
+ * Dy = ------------------- * Pd + ------------------- * Qd
+ *      2^(id[1]-id[0]) + 1        2^(id[1]-id[0]) + 1
+ *
+ * Dx = Dy + Pd
+ *
+ * with conditions:
+ *
+ * 2^id[0] != 0
+ * 2^(id[1]-id[0]) + 1 != 0
+ *
+ * That are always satisfied for any 0<=id[0]<id[1]<255.
+ */
+void raid_rec2of2_int8(int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       size_t i;
+       uint8_t *p;
+       uint8_t *pa;
+       uint8_t *q;
+       uint8_t *qa;
+       const uint8_t *T[2];
+
+       /* get multiplication tables */
+       T[0] = table(inv(pow2(id[1] - id[0]) ^ 1));
+       T[1] = table(inv(pow2(id[0]) ^ pow2(id[1])));
+
+       /* compute delta parity */
+       raid_delta_gen(2, id, ip, nd, size, vv);
+
+       p = v[nd];
+       q = v[nd + 1];
+       pa = v[id[0]];
+       qa = v[id[1]];
+
+       for (i = 0; i < size; ++i) {
+               /* delta */
+               uint8_t Pd = p[i] ^ pa[i];
+               uint8_t Qd = q[i] ^ qa[i];
+
+               /* reconstruct */
+               uint8_t Dy = T[0][Pd] ^ T[1][Qd];
+               uint8_t Dx = Pd ^ Dy;
+
+               /* set */
+               pa[i] = Dx;
+               qa[i] = Dy;
+       }
+}
+
+/*
+ * Forwarders for data recovery.
+ *
+ * These functions recover data blocks using the specified parity
+ * to recompute the missing data.
+ *
+ * Note that the format of vectors @id/@ip is different than raid_rec().
+ * For example, in the vector @ip the first parity is represented with the
+ * value 0 and not @nd.
+ *
+ * @nr Number of failed data blocks to recover.
+ * @id[] Vector of @nr indexes of the data blocks to recover.
+ *   The indexes start from 0. They must be in order.
+ * @ip[] Vector of @nr indexes of the parity blocks to use in the recovering.
+ *   The indexes start from 0. They must be in order.
+ * @nd Number of data blocks.
+ * @np Number of parity blocks.
+ * @size Size of the blocks pointed by @v. It must be a multipler of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @np) elements. The starting elements are the blocks
+ *   for data, following with the parity blocks.
+ *   Each block has @size bytes.
+ */
+void (*raid_rec_ptr[RAID_PARITY_MAX])(
+       int nr, int *id, int *ip, int nd, size_t size, void **vv);
+
+void raid_rec(int nr, int *ir, int nd, int np, size_t size, void **v)
+{
+       int nrd; /* number of data blocks to recover */
+       int nrp; /* number of parity blocks to recover */
+
+       /* enforce limit on size */
+       BUG_ON(size % 64 != 0);
+
+       /* enforce limit on number of failures */
+       BUG_ON(nr > np);
+       BUG_ON(np > RAID_PARITY_MAX);
+
+       /* enforce order in index vector */
+       BUG_ON(nr >= 2 && ir[0] >= ir[1]);
+       BUG_ON(nr >= 3 && ir[1] >= ir[2]);
+       BUG_ON(nr >= 4 && ir[2] >= ir[3]);
+       BUG_ON(nr >= 5 && ir[3] >= ir[4]);
+       BUG_ON(nr >= 6 && ir[4] >= ir[5]);
+
+       /* enforce limit on index vector */
+       BUG_ON(nr > 0 && ir[nr-1] >= nd + np);
+
+       /* count the number of data blocks to recover */
+       nrd = 0;
+       while (nrd < nr && ir[nrd] < nd)
+               ++nrd;
+
+       /* all the remaining are parity */
+       nrp = nr - nrd;
+
+       /* enforce limit on number of failures */
+       BUG_ON(nrd > nd);
+       BUG_ON(nrp > np);
+
+       /* if failed data is present */
+       if (nrd != 0) {
+               int ip[RAID_PARITY_MAX];
+               int i, j, k;
+
+               /* setup the vector of parities to use */
+               for (i = 0, j = 0, k = 0; i < np; ++i) {
+                       if (j < nrp && ir[nrd + j] == nd + i) {
+                               /* this parity has to be recovered */
+                               ++j;
+                       } else {
+                               /* this parity is used for recovering */
+                               ip[k] = i;
+                               ++k;
+                       }
+               }
+
+               /* recover the nrd data blocks specified in ir[], */
+               /* using the first nrd parity in ip[] for recovering */
+               raid_rec_ptr[nrd - 1](nrd, ir, ip, nd, size, v);
+       }
+
+       /* recompute all the parities up to the last bad one */
+       if (nrp != 0)
+               raid_gen(nd, ir[nr - 1] - nd + 1, size, v);
+}
+
+void raid_data(int nr, int *id, int *ip, int nd, size_t size, void **v)
+{
+       /* enforce limit on size */
+       BUG_ON(size % 64 != 0);
+
+       /* enforce limit on number of failures */
+       BUG_ON(nr > nd);
+       BUG_ON(nr > RAID_PARITY_MAX);
+
+       /* enforce order in index vector for data */
+       BUG_ON(nr >= 2 && id[0] >= id[1]);
+       BUG_ON(nr >= 3 && id[1] >= id[2]);
+       BUG_ON(nr >= 4 && id[2] >= id[3]);
+       BUG_ON(nr >= 5 && id[3] >= id[4]);
+       BUG_ON(nr >= 6 && id[4] >= id[5]);
+
+       /* enforce limit on index vector for data */
+       BUG_ON(nr > 0 && id[nr-1] >= nd);
+
+       /* enforce order in index vector for parity */
+       BUG_ON(nr >= 2 && ip[0] >= ip[1]);
+       BUG_ON(nr >= 3 && ip[1] >= ip[2]);
+       BUG_ON(nr >= 4 && ip[2] >= ip[3]);
+       BUG_ON(nr >= 5 && ip[3] >= ip[4]);
+       BUG_ON(nr >= 6 && ip[4] >= ip[5]);
+
+       /* if failed data is present */
+       if (nr != 0)
+               raid_rec_ptr[nr - 1](nr, id, ip, nd, size, v);
+}
+

diff --git a/raid/raid.h b/raid/raid.h
new file mode 100644 (file)
index 0000000..aeeb39f
--- /dev/null
+++ b/raid/raid.h
@@ -0,0 +1,229 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_H
+#define __RAID_H
+
+/**
+ * RAID mode supporting up to 6 parities.
+ *
+ * It requires SSSE3 to get good performance with triple or more parities.
+ *
+ * This is the default mode set after calling raid_init().
+ */
+#define RAID_MODE_CAUCHY 0
+
+/**
+ * RAID mode supporting up to 3 parities,
+ *
+ * It has a fast triple parity implementation without SSSE3, but it cannot
+ * go beyond triple parity.
+ *
+ * This is mostly intended for low end CPUs like ARM and AMD Athlon.
+ */
+#define RAID_MODE_VANDERMONDE 1
+
+/**
+ * Maximum number of parity disks supported.
+ */
+#define RAID_PARITY_MAX 6
+
+/**
+ * Maximum number of data disks supported.
+ */
+#define RAID_DATA_MAX 251
+
+/**
+ * Initializes the RAID system.
+ *
+ * You must call this function before any other.
+ *
+ * The RAID system is initialized in the RAID_MODE_CAUCHY mode.
+ */
+void raid_init(void);
+
+/**
+ * Runs a basic functionality self test.
+ *
+ * The test is immediate, and it's intended to be run at application
+ * startup to check the integrity of the RAID system.
+ *
+ * It returns 0 on success.
+ */
+int raid_selftest(void);
+
+/**
+ * Sets the mode to use. One of RAID_MODE_*.
+ *
+ * You can change mode at any time, and it will affect next calls to raid_gen(),
+ * raid_rec() and raid_data().
+ *
+ * The two modes are compatible for the first two levels of parity.
+ * The third one is different.
+ */
+void raid_mode(int mode);
+
+/**
+ * Sets the zero buffer to use in recovering.
+ *
+ * Before calling raid_rec() and raid_data() you must provide a memory
+ * buffer filled with zero with the same size of the blocks to recover.
+ *
+ * This buffer is only read and never written.
+ */
+void raid_zero(void *zero);
+
+/**
+ * Computes parity blocks.
+ *
+ * This function computes the specified number of parity blocks of the
+ * provided set of data blocks.
+ *
+ * Each parity block allows to recover one data block.
+ *
+ * @nd Number of data blocks.
+ * @np Number of parities blocks to compute.
+ * @size Size of the blocks pointed by @v. It must be a multiplier of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @np) elements. The starting elements are the blocks for
+ *   data, following with the parity blocks.
+ *   Data blocks are only read and not modified. Parity blocks are written.
+ *   Each block has @size bytes.
+ */
+void raid_gen(int nd, int np, size_t size, void **v);
+
+/**
+ * Recovers failures in data and parity blocks.
+ *
+ * This function recovers all the data and parity blocks marked as bad
+ * in the @ir vector.
+ *
+ * Ensure to have @nr <= @np, otherwise recovering is not possible.
+ *
+ * The parities blocks used for recovering are automatically selected from
+ * the ones NOT present in the @ir vector.
+ *
+ * In case there are more parity blocks than needed, the parities at lower
+ * indexes are used in the recovering, and the others are ignored.
+ *
+ * Note that no internal integrity check is done when recovering. If the
+ * provided parities are correct, the resulting data will be correct.
+ * If parities are wrong, the resulting recovered data will be wrong.
+ * This happens even in the case you have more parities blocks than needed,
+ * and some form of integrity verification would be possible.
+ *
+ * @nr Number of failed data and parity blocks to recover.
+ * @ir[] Vector of @nr indexes of the failed data and parity blocks.
+ *   The indexes start from 0. They must be in order.
+ *   The first parity is represented with value @nd, the second with value
+ *   @nd + 1, just like positions in the @v vector.
+ * @nd Number of data blocks.
+ * @np Number of parity blocks.
+ * @size Size of the blocks pointed by @v. It must be a multiplier of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @np) elements. The starting elements are the blocks
+ *   for data, following with the parity blocks.
+ *   Each block has @size bytes.
+ */
+void raid_rec(int nr, int *ir, int nd, int np, size_t size, void **v);
+
+/**
+ * Recovers failures in data blocks only.
+ *
+ * This function recovers all the data blocks marked as bad in the @id vector.
+ * The parity blocks are not modified.
+ *
+ * @nr Number of failed data blocks to recover.
+ * @id[] Vector of @nr indexes of the data blocks to recover.
+ *   The indexes start from 0. They must be in order.
+ * @ip[] Vector of @nr indexes of the parity blocks to use for recovering.
+ *   The indexes start from 0. They must be in order.
+ * @nd Number of data blocks.
+ * @size Size of the blocks pointed by @v. It must be a multiplier of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @ip[@nr - 1] + 1) elements. The starting elements are the
+ *   blocks for data, following with the parity blocks.
+ *   Each blocks has @size bytes.
+ */
+void raid_data(int nr, int *id, int *ip, int nd, size_t size, void **v);
+
+/**
+ * Check the provided failed blocks combination.
+ *
+ * This function checks if the specified failed blocks combination satisfies
+ * the redundancy information. A combination is assumed matching, if the
+ * remaining valid parity is matching the expected value after recovering.
+ *
+ * The number of failed blocks @nr must be strictly less than the number of
+ * parities @np, because you need one more parity to validate the recovering.
+ *
+ * No data or parity blocks are modified.
+ *
+ * @nr Number of failed data and parity blocks.
+ * @ir[] Vector of @nr indexes of the failed data and parity blocks.
+ *   The indexes start from 0. They must be in order.
+ *   The first parity is represented with value @nd, the second with value
+ *   @nd + 1, just like positions in the @v vector.
+ * @nd Number of data blocks.
+ * @np Number of parity blocks.
+ * @size Size of the blocks pointed by @v. It must be a multiplier of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @np) elements. The starting elements are the blocks
+ *   for data, following with the parity blocks.
+ *   Each block has @size bytes.
+ * @return 0 if the check is satisfied. -1 otherwise.
+ */
+int raid_check(int nr, int *ir, int nd, int np, size_t size, void **v);
+
+/**
+ * Scan for failed blocks.
+ *
+ * This function identifies the failed data and parity blocks using the
+ * available redundancy.
+ *
+ * It uses a brute force method, and then the call can be expansive.
+ * The expected execution time is proportional at the binomial coefficient
+ * @np + @nd choose @np - 1, usually written as:
+ *
+ * ( @np + @nd )
+ * (           )
+ * (  @np - 1  )
+ *
+ * No data or parity blocks are modified.
+ *
+ * The failed block indexes are returned in the @ir vector.
+ * It must have space for at least @np - 1 values.
+ *
+ * The returned @ir vector can then be used in a raid_rec() call to recover
+ * the failed data and parity blocks.
+ *
+ * @ir[] Vector filled with the indexes of the failed data and parity blocks.
+ *   The indexes start from 0 and they are in order.
+ *   The first parity is represented with value @nd, the second with value
+ *   @nd + 1, just like positions in the @v vector.
+ * @nd Number of data blocks.
+ * @np Number of parity blocks.
+ * @size Size of the blocks pointed by @v. It must be a multiplier of 64.
+ * @v Vector of pointers to the blocks of data and parity.
+ *   It has (@nd + @np) elements. The starting elements are the blocks
+ *   for data, following with the parity blocks.
+ *   Each block has @size bytes.
+ * @return Number of block indexes returned in the @ir vector.
+ *   0 if no error is detected.
+ *   -1 if it's not possible to identify the failed disks.
+ */
+int raid_scan(int *ir, int nd, int np, size_t size, void **v);
+
+#endif
+

diff --git a/raid/tables.c b/raid/tables.c
new file mode 100644 (file)
index 0000000..4903502
--- /dev/null
+++ b/raid/tables.c
@@ -0,0 +1,14696 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+
+const uint8_t __aligned(256) raid_gfmul[256][256] =
+{
+       {
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+               0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+       },
+       {
+               0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+               0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+               0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+               0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+               0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+               0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+               0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+               0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+               0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+               0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+               0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
+               0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
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+               0x6d, 0x90, 0x8a, 0x77, 0xbe, 0x43, 0x59, 0xa4,
+               0xbd, 0x40, 0x5a, 0xa7, 0x6e, 0x93, 0x89, 0x74,
+               0x06, 0xfb, 0xe1, 0x1c, 0xd5, 0x28, 0x32, 0xcf,
+               0xb1, 0x4c, 0x56, 0xab, 0x62, 0x9f, 0x85, 0x78,
+               0x0a, 0xf7, 0xed, 0x10, 0xd9, 0x24, 0x3e, 0xc3,
+               0xda, 0x27, 0x3d, 0xc0, 0x09, 0xf4, 0xee, 0x13,
+               0x61, 0x9c, 0x86, 0x7b, 0xb2, 0x4f, 0x55, 0xa8,
+               0x67, 0x9a, 0x80, 0x7d, 0xb4, 0x49, 0x53, 0xae,
+               0xdc, 0x21, 0x3b, 0xc6, 0x0f, 0xf2, 0xe8, 0x15,
+               0x0c, 0xf1, 0xeb, 0x16, 0xdf, 0x22, 0x38, 0xc5,
+               0xb7, 0x4a, 0x50, 0xad, 0x64, 0x99, 0x83, 0x7e,
+               0x7f, 0x82, 0x98, 0x65, 0xac, 0x51, 0x4b, 0xb6,
+               0xc4, 0x39, 0x23, 0xde, 0x17, 0xea, 0xf0, 0x0d,
+               0x14, 0xe9, 0xf3, 0x0e, 0xc7, 0x3a, 0x20, 0xdd,
+               0xaf, 0x52, 0x48, 0xb5, 0x7c, 0x81, 0x9b, 0x66,
+               0xa9, 0x54, 0x4e, 0xb3, 0x7a, 0x87, 0x9d, 0x60,
+               0x12, 0xef, 0xf5, 0x08, 0xc1, 0x3c, 0x26, 0xdb,
+               0xc2, 0x3f, 0x25, 0xd8, 0x11, 0xec, 0xf6, 0x0b,
+               0x79, 0x84, 0x9e, 0x63, 0xaa, 0x57, 0x4d, 0xb0,
+               0xce, 0x33, 0x29, 0xd4, 0x1d, 0xe0, 0xfa, 0x07,
+               0x75, 0x88, 0x92, 0x6f, 0xa6, 0x5b, 0x41, 0xbc,
+               0xa5, 0x58, 0x42, 0xbf, 0x76, 0x8b, 0x91, 0x6c,
+               0x1e, 0xe3, 0xf9, 0x04, 0xcd, 0x30, 0x2a, 0xd7,
+               0x18, 0xe5, 0xff, 0x02, 0xcb, 0x36, 0x2c, 0xd1,
+               0xa3, 0x5e, 0x44, 0xb9, 0x70, 0x8d, 0x97, 0x6a,
+               0x73, 0x8e, 0x94, 0x69, 0xa0, 0x5d, 0x47, 0xba,
+               0xc8, 0x35, 0x2f, 0xd2, 0x1b, 0xe6, 0xfc, 0x01,
+       },
+       {
+               0x00, 0xfe, 0xe1, 0x1f, 0xdf, 0x21, 0x3e, 0xc0,
+               0xa3, 0x5d, 0x42, 0xbc, 0x7c, 0x82, 0x9d, 0x63,
+               0x5b, 0xa5, 0xba, 0x44, 0x84, 0x7a, 0x65, 0x9b,
+               0xf8, 0x06, 0x19, 0xe7, 0x27, 0xd9, 0xc6, 0x38,
+               0xb6, 0x48, 0x57, 0xa9, 0x69, 0x97, 0x88, 0x76,
+               0x15, 0xeb, 0xf4, 0x0a, 0xca, 0x34, 0x2b, 0xd5,
+               0xed, 0x13, 0x0c, 0xf2, 0x32, 0xcc, 0xd3, 0x2d,
+               0x4e, 0xb0, 0xaf, 0x51, 0x91, 0x6f, 0x70, 0x8e,
+               0x71, 0x8f, 0x90, 0x6e, 0xae, 0x50, 0x4f, 0xb1,
+               0xd2, 0x2c, 0x33, 0xcd, 0x0d, 0xf3, 0xec, 0x12,
+               0x2a, 0xd4, 0xcb, 0x35, 0xf5, 0x0b, 0x14, 0xea,
+               0x89, 0x77, 0x68, 0x96, 0x56, 0xa8, 0xb7, 0x49,
+               0xc7, 0x39, 0x26, 0xd8, 0x18, 0xe6, 0xf9, 0x07,
+               0x64, 0x9a, 0x85, 0x7b, 0xbb, 0x45, 0x5a, 0xa4,
+               0x9c, 0x62, 0x7d, 0x83, 0x43, 0xbd, 0xa2, 0x5c,
+               0x3f, 0xc1, 0xde, 0x20, 0xe0, 0x1e, 0x01, 0xff,
+               0xe2, 0x1c, 0x03, 0xfd, 0x3d, 0xc3, 0xdc, 0x22,
+               0x41, 0xbf, 0xa0, 0x5e, 0x9e, 0x60, 0x7f, 0x81,
+               0xb9, 0x47, 0x58, 0xa6, 0x66, 0x98, 0x87, 0x79,
+               0x1a, 0xe4, 0xfb, 0x05, 0xc5, 0x3b, 0x24, 0xda,
+               0x54, 0xaa, 0xb5, 0x4b, 0x8b, 0x75, 0x6a, 0x94,
+               0xf7, 0x09, 0x16, 0xe8, 0x28, 0xd6, 0xc9, 0x37,
+               0x0f, 0xf1, 0xee, 0x10, 0xd0, 0x2e, 0x31, 0xcf,
+               0xac, 0x52, 0x4d, 0xb3, 0x73, 0x8d, 0x92, 0x6c,
+               0x93, 0x6d, 0x72, 0x8c, 0x4c, 0xb2, 0xad, 0x53,
+               0x30, 0xce, 0xd1, 0x2f, 0xef, 0x11, 0x0e, 0xf0,
+               0xc8, 0x36, 0x29, 0xd7, 0x17, 0xe9, 0xf6, 0x08,
+               0x6b, 0x95, 0x8a, 0x74, 0xb4, 0x4a, 0x55, 0xab,
+               0x25, 0xdb, 0xc4, 0x3a, 0xfa, 0x04, 0x1b, 0xe5,
+               0x86, 0x78, 0x67, 0x99, 0x59, 0xa7, 0xb8, 0x46,
+               0x7e, 0x80, 0x9f, 0x61, 0xa1, 0x5f, 0x40, 0xbe,
+               0xdd, 0x23, 0x3c, 0xc2, 0x02, 0xfc, 0xe3, 0x1d,
+       },
+       {
+               0x00, 0xff, 0xe3, 0x1c, 0xdb, 0x24, 0x38, 0xc7,
+               0xab, 0x54, 0x48, 0xb7, 0x70, 0x8f, 0x93, 0x6c,
+               0x4b, 0xb4, 0xa8, 0x57, 0x90, 0x6f, 0x73, 0x8c,
+               0xe0, 0x1f, 0x03, 0xfc, 0x3b, 0xc4, 0xd8, 0x27,
+               0x96, 0x69, 0x75, 0x8a, 0x4d, 0xb2, 0xae, 0x51,
+               0x3d, 0xc2, 0xde, 0x21, 0xe6, 0x19, 0x05, 0xfa,
+               0xdd, 0x22, 0x3e, 0xc1, 0x06, 0xf9, 0xe5, 0x1a,
+               0x76, 0x89, 0x95, 0x6a, 0xad, 0x52, 0x4e, 0xb1,
+               0x31, 0xce, 0xd2, 0x2d, 0xea, 0x15, 0x09, 0xf6,
+               0x9a, 0x65, 0x79, 0x86, 0x41, 0xbe, 0xa2, 0x5d,
+               0x7a, 0x85, 0x99, 0x66, 0xa1, 0x5e, 0x42, 0xbd,
+               0xd1, 0x2e, 0x32, 0xcd, 0x0a, 0xf5, 0xe9, 0x16,
+               0xa7, 0x58, 0x44, 0xbb, 0x7c, 0x83, 0x9f, 0x60,
+               0x0c, 0xf3, 0xef, 0x10, 0xd7, 0x28, 0x34, 0xcb,
+               0xec, 0x13, 0x0f, 0xf0, 0x37, 0xc8, 0xd4, 0x2b,
+               0x47, 0xb8, 0xa4, 0x5b, 0x9c, 0x63, 0x7f, 0x80,
+               0x62, 0x9d, 0x81, 0x7e, 0xb9, 0x46, 0x5a, 0xa5,
+               0xc9, 0x36, 0x2a, 0xd5, 0x12, 0xed, 0xf1, 0x0e,
+               0x29, 0xd6, 0xca, 0x35, 0xf2, 0x0d, 0x11, 0xee,
+               0x82, 0x7d, 0x61, 0x9e, 0x59, 0xa6, 0xba, 0x45,
+               0xf4, 0x0b, 0x17, 0xe8, 0x2f, 0xd0, 0xcc, 0x33,
+               0x5f, 0xa0, 0xbc, 0x43, 0x84, 0x7b, 0x67, 0x98,
+               0xbf, 0x40, 0x5c, 0xa3, 0x64, 0x9b, 0x87, 0x78,
+               0x14, 0xeb, 0xf7, 0x08, 0xcf, 0x30, 0x2c, 0xd3,
+               0x53, 0xac, 0xb0, 0x4f, 0x88, 0x77, 0x6b, 0x94,
+               0xf8, 0x07, 0x1b, 0xe4, 0x23, 0xdc, 0xc0, 0x3f,
+               0x18, 0xe7, 0xfb, 0x04, 0xc3, 0x3c, 0x20, 0xdf,
+               0xb3, 0x4c, 0x50, 0xaf, 0x68, 0x97, 0x8b, 0x74,
+               0xc5, 0x3a, 0x26, 0xd9, 0x1e, 0xe1, 0xfd, 0x02,
+               0x6e, 0x91, 0x8d, 0x72, 0xb5, 0x4a, 0x56, 0xa9,
+               0x8e, 0x71, 0x6d, 0x92, 0x55, 0xaa, 0xb6, 0x49,
+               0x25, 0xda, 0xc6, 0x39, 0xfe, 0x01, 0x1d, 0xe2,
+       },
+};
+
+const uint8_t __aligned(256) raid_gfexp[256] =
+{
+       0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+       0x1d, 0x3a, 0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26,
+       0x4c, 0x98, 0x2d, 0x5a, 0xb4, 0x75, 0xea, 0xc9,
+       0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0,
+       0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
+       0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23,
+       0x46, 0x8c, 0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0,
+       0x5d, 0xba, 0x69, 0xd2, 0xb9, 0x6f, 0xde, 0xa1,
+       0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f, 0x5e, 0xbc,
+       0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
+       0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f,
+       0xfe, 0xe1, 0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2,
+       0xd9, 0xaf, 0x43, 0x86, 0x11, 0x22, 0x44, 0x88,
+       0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd, 0x67, 0xce,
+       0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
+       0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc,
+       0x85, 0x17, 0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9,
+       0x4f, 0x9e, 0x21, 0x42, 0x84, 0x15, 0x2a, 0x54,
+       0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4, 0x55, 0xaa,
+       0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
+       0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e,
+       0xfc, 0xe5, 0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff,
+       0xe3, 0xdb, 0xab, 0x4b, 0x96, 0x31, 0x62, 0xc4,
+       0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57, 0xae, 0x41,
+       0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
+       0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6,
+       0x51, 0xa2, 0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef,
+       0xc3, 0x9b, 0x2b, 0x56, 0xac, 0x45, 0x8a, 0x09,
+       0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a, 0xf4, 0xf5,
+       0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
+       0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83,
+       0x1b, 0x36, 0x6c, 0xd8, 0xad, 0x47, 0x8e, 0x01,
+};
+
+const uint8_t __aligned(256) raid_gfinv[256] =
+{
+       /* note that the first element is not significative */
+       0x00, 0x01, 0x8e, 0xf4, 0x47, 0xa7, 0x7a, 0xba,
+       0xad, 0x9d, 0xdd, 0x98, 0x3d, 0xaa, 0x5d, 0x96,
+       0xd8, 0x72, 0xc0, 0x58, 0xe0, 0x3e, 0x4c, 0x66,
+       0x90, 0xde, 0x55, 0x80, 0xa0, 0x83, 0x4b, 0x2a,
+       0x6c, 0xed, 0x39, 0x51, 0x60, 0x56, 0x2c, 0x8a,
+       0x70, 0xd0, 0x1f, 0x4a, 0x26, 0x8b, 0x33, 0x6e,
+       0x48, 0x89, 0x6f, 0x2e, 0xa4, 0xc3, 0x40, 0x5e,
+       0x50, 0x22, 0xcf, 0xa9, 0xab, 0x0c, 0x15, 0xe1,
+       0x36, 0x5f, 0xf8, 0xd5, 0x92, 0x4e, 0xa6, 0x04,
+       0x30, 0x88, 0x2b, 0x1e, 0x16, 0x67, 0x45, 0x93,
+       0x38, 0x23, 0x68, 0x8c, 0x81, 0x1a, 0x25, 0x61,
+       0x13, 0xc1, 0xcb, 0x63, 0x97, 0x0e, 0x37, 0x41,
+       0x24, 0x57, 0xca, 0x5b, 0xb9, 0xc4, 0x17, 0x4d,
+       0x52, 0x8d, 0xef, 0xb3, 0x20, 0xec, 0x2f, 0x32,
+       0x28, 0xd1, 0x11, 0xd9, 0xe9, 0xfb, 0xda, 0x79,
+       0xdb, 0x77, 0x06, 0xbb, 0x84, 0xcd, 0xfe, 0xfc,
+       0x1b, 0x54, 0xa1, 0x1d, 0x7c, 0xcc, 0xe4, 0xb0,
+       0x49, 0x31, 0x27, 0x2d, 0x53, 0x69, 0x02, 0xf5,
+       0x18, 0xdf, 0x44, 0x4f, 0x9b, 0xbc, 0x0f, 0x5c,
+       0x0b, 0xdc, 0xbd, 0x94, 0xac, 0x09, 0xc7, 0xa2,
+       0x1c, 0x82, 0x9f, 0xc6, 0x34, 0xc2, 0x46, 0x05,
+       0xce, 0x3b, 0x0d, 0x3c, 0x9c, 0x08, 0xbe, 0xb7,
+       0x87, 0xe5, 0xee, 0x6b, 0xeb, 0xf2, 0xbf, 0xaf,
+       0xc5, 0x64, 0x07, 0x7b, 0x95, 0x9a, 0xae, 0xb6,
+       0x12, 0x59, 0xa5, 0x35, 0x65, 0xb8, 0xa3, 0x9e,
+       0xd2, 0xf7, 0x62, 0x5a, 0x85, 0x7d, 0xa8, 0x3a,
+       0x29, 0x71, 0xc8, 0xf6, 0xf9, 0x43, 0xd7, 0xd6,
+       0x10, 0x73, 0x76, 0x78, 0x99, 0x0a, 0x19, 0x91,
+       0x14, 0x3f, 0xe6, 0xf0, 0x86, 0xb1, 0xe2, 0xf1,
+       0xfa, 0x74, 0xf3, 0xb4, 0x6d, 0x21, 0xb2, 0x6a,
+       0xe3, 0xe7, 0xb5, 0xea, 0x03, 0x8f, 0xd3, 0xc9,
+       0x42, 0xd4, 0xe8, 0x75, 0x7f, 0xff, 0x7e, 0xfd,
+};
+
+/**
+ * Power matrix used to generate parity.
+ * This matrix is valid for up to 3 parity with 251 data disks.
+ *
+ * 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
+ * 01 02 04 08 10 20 40 80 1d 3a 74 e8 cd 87 13 26 4c 98 2d 5a b4 75 ea c9 8f 03 06 0c 18 30 60 c0 9d 27 4e 9c 25 4a 94 35 6a d4 b5 77 ee c1 9f 23 46 8c 05 0a 14 28 50 a0 5d ba 69 d2 b9 6f de a1 5f be 61 c2 99 2f 5e bc 65 ca 89 0f 1e 3c 78 f0 fd e7 d3 bb 6b d6 b1 7f fe e1 df a3 5b b6 71 e2 d9 af 43 86 11 22 44 88 0d 1a 34 68 d0 bd 67 ce 81 1f 3e 7c f8 ed c7 93 3b 76 ec c5 97 33 66 cc 85 17 2e 5c b8 6d da a9 4f 9e 21 42 84 15 2a 54 a8 4d 9a 29 52 a4 55 aa 49 92 39 72 e4 d5 b7 73 e6 d1 bf 63 c6 91 3f 7e fc e5 d7 b3 7b f6 f1 ff e3 db ab 4b 96 31 62 c4 95 37 6e dc a5 57 ae 41 82 19 32 64 c8 8d 07 0e 1c 38 70 e0 dd a7 53 a6 51 a2 59 b2 79 f2 f9 ef c3 9b 2b 56 ac 45 8a 09 12 24 48 90 3d 7a f4 f5 f7 f3 fb eb cb 8b 0b 16 2c 58 b0 7d fa e9 cf 83 1b 36 6c
+ * 01 8e 47 ad d8 6c 36 1b 83 cf e9 fa 7d b0 58 2c 16 0b 8b cb eb fb f3 f7 f5 f4 7a 3d 90 48 24 12 09 8a 45 ac 56 2b 9b c3 ef f9 f2 79 b2 59 a2 51 a6 53 a7 dd e0 70 38 1c 0e 07 8d c8 64 32 19 82 41 ae 57 a5 dc 6e 37 95 c4 62 31 96 4b ab db e3 ff f1 f6 7b b3 d7 e5 fc 7e 3f 91 c6 63 bf d1 e6 73 b7 d5 e4 72 39 92 49 aa 55 a4 52 29 9a 4d a8 54 2a 15 84 42 21 9e 4f a9 da 6d b8 5c 2e 17 85 cc 66 33 97 c5 ec 76 3b 93 c7 ed f8 7c 3e 1f 81 ce 67 bd d0 68 34 1a 0d 88 44 22 11 86 43 af d9 e2 71 b6 5b a3 df e1 fe 7f b1 d6 6b bb d3 e7 fd f0 78 3c 1e 0f 89 ca 65 bc 5e 2f 99 c2 61 be 5f a1 de 6f b9 d2 69 ba 5d a0 50 28 14 0a 05 8c 46 23 9f c1 ee 77 b5 d4 6a 35 94 4a 25 9c 4e 27 9d c0 60 30 18 0c 06 03 8f c9 ea 75 b4 5a 2d 98 4c 26 13 87 cd e8 74 3a 1d 80 40 20
+ */
+const uint8_t __aligned(256) raid_gfvandermonde[3][256] =
+{
+       {
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01,
+       },
+       {
+               0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+               0x1d, 0x3a, 0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26,
+               0x4c, 0x98, 0x2d, 0x5a, 0xb4, 0x75, 0xea, 0xc9,
+               0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0,
+               0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
+               0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23,
+               0x46, 0x8c, 0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0,
+               0x5d, 0xba, 0x69, 0xd2, 0xb9, 0x6f, 0xde, 0xa1,
+               0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f, 0x5e, 0xbc,
+               0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
+               0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f,
+               0xfe, 0xe1, 0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2,
+               0xd9, 0xaf, 0x43, 0x86, 0x11, 0x22, 0x44, 0x88,
+               0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd, 0x67, 0xce,
+               0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
+               0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc,
+               0x85, 0x17, 0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9,
+               0x4f, 0x9e, 0x21, 0x42, 0x84, 0x15, 0x2a, 0x54,
+               0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4, 0x55, 0xaa,
+               0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
+               0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e,
+               0xfc, 0xe5, 0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff,
+               0xe3, 0xdb, 0xab, 0x4b, 0x96, 0x31, 0x62, 0xc4,
+               0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57, 0xae, 0x41,
+               0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
+               0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6,
+               0x51, 0xa2, 0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef,
+               0xc3, 0x9b, 0x2b, 0x56, 0xac, 0x45, 0x8a, 0x09,
+               0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a, 0xf4, 0xf5,
+               0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
+               0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83,
+               0x1b, 0x36, 0x6c,
+       },
+       {
+               0x01, 0x8e, 0x47, 0xad, 0xd8, 0x6c, 0x36, 0x1b,
+               0x83, 0xcf, 0xe9, 0xfa, 0x7d, 0xb0, 0x58, 0x2c,
+               0x16, 0x0b, 0x8b, 0xcb, 0xeb, 0xfb, 0xf3, 0xf7,
+               0xf5, 0xf4, 0x7a, 0x3d, 0x90, 0x48, 0x24, 0x12,
+               0x09, 0x8a, 0x45, 0xac, 0x56, 0x2b, 0x9b, 0xc3,
+               0xef, 0xf9, 0xf2, 0x79, 0xb2, 0x59, 0xa2, 0x51,
+               0xa6, 0x53, 0xa7, 0xdd, 0xe0, 0x70, 0x38, 0x1c,
+               0x0e, 0x07, 0x8d, 0xc8, 0x64, 0x32, 0x19, 0x82,
+               0x41, 0xae, 0x57, 0xa5, 0xdc, 0x6e, 0x37, 0x95,
+               0xc4, 0x62, 0x31, 0x96, 0x4b, 0xab, 0xdb, 0xe3,
+               0xff, 0xf1, 0xf6, 0x7b, 0xb3, 0xd7, 0xe5, 0xfc,
+               0x7e, 0x3f, 0x91, 0xc6, 0x63, 0xbf, 0xd1, 0xe6,
+               0x73, 0xb7, 0xd5, 0xe4, 0x72, 0x39, 0x92, 0x49,
+               0xaa, 0x55, 0xa4, 0x52, 0x29, 0x9a, 0x4d, 0xa8,
+               0x54, 0x2a, 0x15, 0x84, 0x42, 0x21, 0x9e, 0x4f,
+               0xa9, 0xda, 0x6d, 0xb8, 0x5c, 0x2e, 0x17, 0x85,
+               0xcc, 0x66, 0x33, 0x97, 0xc5, 0xec, 0x76, 0x3b,
+               0x93, 0xc7, 0xed, 0xf8, 0x7c, 0x3e, 0x1f, 0x81,
+               0xce, 0x67, 0xbd, 0xd0, 0x68, 0x34, 0x1a, 0x0d,
+               0x88, 0x44, 0x22, 0x11, 0x86, 0x43, 0xaf, 0xd9,
+               0xe2, 0x71, 0xb6, 0x5b, 0xa3, 0xdf, 0xe1, 0xfe,
+               0x7f, 0xb1, 0xd6, 0x6b, 0xbb, 0xd3, 0xe7, 0xfd,
+               0xf0, 0x78, 0x3c, 0x1e, 0x0f, 0x89, 0xca, 0x65,
+               0xbc, 0x5e, 0x2f, 0x99, 0xc2, 0x61, 0xbe, 0x5f,
+               0xa1, 0xde, 0x6f, 0xb9, 0xd2, 0x69, 0xba, 0x5d,
+               0xa0, 0x50, 0x28, 0x14, 0x0a, 0x05, 0x8c, 0x46,
+               0x23, 0x9f, 0xc1, 0xee, 0x77, 0xb5, 0xd4, 0x6a,
+               0x35, 0x94, 0x4a, 0x25, 0x9c, 0x4e, 0x27, 0x9d,
+               0xc0, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x03, 0x8f,
+               0xc9, 0xea, 0x75, 0xb4, 0x5a, 0x2d, 0x98, 0x4c,
+               0x26, 0x13, 0x87, 0xcd, 0xe8, 0x74, 0x3a, 0x1d,
+               0x80, 0x40, 0x20,
+       },
+};
+
+/**
+ * Cauchy matrix used to generate parity.
+ * This matrix is valid for up to 6 parity with 251 data disks.
+ *
+ * 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
+ * 01 02 04 08 10 20 40 80 1d 3a 74 e8 cd 87 13 26 4c 98 2d 5a b4 75 ea c9 8f 03 06 0c 18 30 60 c0 9d 27 4e 9c 25 4a 94 35 6a d4 b5 77 ee c1 9f 23 46 8c 05 0a 14 28 50 a0 5d ba 69 d2 b9 6f de a1 5f be 61 c2 99 2f 5e bc 65 ca 89 0f 1e 3c 78 f0 fd e7 d3 bb 6b d6 b1 7f fe e1 df a3 5b b6 71 e2 d9 af 43 86 11 22 44 88 0d 1a 34 68 d0 bd 67 ce 81 1f 3e 7c f8 ed c7 93 3b 76 ec c5 97 33 66 cc 85 17 2e 5c b8 6d da a9 4f 9e 21 42 84 15 2a 54 a8 4d 9a 29 52 a4 55 aa 49 92 39 72 e4 d5 b7 73 e6 d1 bf 63 c6 91 3f 7e fc e5 d7 b3 7b f6 f1 ff e3 db ab 4b 96 31 62 c4 95 37 6e dc a5 57 ae 41 82 19 32 64 c8 8d 07 0e 1c 38 70 e0 dd a7 53 a6 51 a2 59 b2 79 f2 f9 ef c3 9b 2b 56 ac 45 8a 09 12 24 48 90 3d 7a f4 f5 f7 f3 fb eb cb 8b 0b 16 2c 58 b0 7d fa e9 cf 83 1b 36 6c
+ * 01 f5 d2 c4 9a 71 f1 7f fc 87 c1 c6 19 2f 40 55 3d ba 53 04 9c 61 34 8c 46 68 70 3e cc 7d 74 75 b5 db 0c df 9e 6d 79 eb 63 9f 38 d0 94 a5 24 89 5c 65 5b ae 37 33 4c dd 47 f4 02 a6 39 d8 9d 2d 62 b9 2e 0f 2b 60 58 e4 f8 6c 72 b0 85 4d 95 41 1c 23 05 99 32 c5 0e 82 91 14 d1 af f9 b3 07 97 6e 0b 67 3b 78 e6 28 22 4f a3 ca 48 de 1d a8 17 6f 90 aa 31 5a f3 e9 a9 44 30 56 09 59 6a 42 cd e5 d6 86 d9 bf cb 26 66 7c d5 be 25 1f e0 98 27 92 51 c7 45 2c c0 ad a7 69 f7 b4 e8 84 e1 18 88 3c 76 20 5e 9b 1e 0d 81 4a bd 16 8a ac 93 ce 1a c2 0a 3f fd e3 77 6b d7 ef a4 80 a1 36 ed a2 12 57 b6 29 8d 7b c8 52 c3 bc b8 21 d4 ea d3 06 ab 2a 1b 5f b7 10 ec 64 f6 e2 11 50 83 54 3a fa fb f2 43 b1 ff e7 c9 03 bb ee 13 8b dc 35 b2 da cf a0 96 49 4e 08 73 f0 7e fe 15 4b
+ * 01 bb a6 d7 c7 07 ce 82 4a 2f a5 9b b6 60 f1 ad e7 f4 06 d2 df 2e ca 65 5c 48 21 aa cd 4e c1 61 38 0a 3e d1 d5 cb 10 dc 5e 24 b8 de 79 36 43 72 d9 f8 f9 a2 a4 6a 3d ea 8e 03 f5 ab b4 5d b5 53 6b 39 86 b0 50 74 96 84 5a 4b e8 49 e5 51 ef 12 bc 89 5b 2b 29 09 c3 57 1e 37 76 0b 64 8a 52 59 80 da a8 44 95 3c 33 e6 7c af 6c b1 9d fc 92 d6 d8 ff a7 77 04 13 73 66 28 7d 83 fb 5f 63 25 19 bd c5 3b 6e 20 35 55 42 31 e1 b9 9e 90 d4 ba db f7 2a e9 3a a0 75 7a d3 02 ee 9c c6 1f 14 cc 22 4d 30 71 58 11 85 4f 6f 6d 1d cf fa 54 a9 17 a3 0f ae 0d 1c c2 d0 32 16 f6 c0 7f 2d 15 f3 1b f2 ed b3 45 c8 ac 7b 2c e2 e4 bf be 9f 34 05 70 3f 98 fe 62 18 9a 56 8d 93 97 78 4c 7e 27 87 08 8b ec 67 0e 1a 23 8c 68 99 94 40 b2 a1 eb b7 26 f0 dd e3 69 0c c4 88 41 81 91 e0 fd
+ * 01 97 7f 9c 7c 18 bd a2 58 1a da 74 70 a3 e5 47 29 07 f5 80 23 e9 fa 46 54 a0 99 95 53 9b 0b c7 09 c0 78 89 92 e3 0d b0 2a 8c fb 17 3f 26 65 87 27 5c 66 61 79 4d 32 b3 8d 52 e2 82 3d f9 c5 02 bc 4c 73 48 62 af ba 41 d9 c4 2f b1 33 b8 15 7d cf 3a a9 5f 84 6d 34 1b 44 94 72 81 42 be cc 4b 0a 6f 5a 22 36 b5 3c 9d 13 7e 08 dd d6 5e 04 fc 5b ec ef f1 6e 1e 77 24 e6 c6 aa cb fd 51 67 06 6a 4a 88 db b2 c2 5d 43 40 f7 50 a8 f2 7a 71 a4 d2 bf 31 90 19 9a 8e f6 c3 a6 e7 60 12 ee 2d de 38 e8 b7 98 c1 28 f3 05 96 63 d1 b9 14 9f 1d 83 68 75 ed 16 03 ce e4 df e0 10 ae 69 55 91 2e 4e fe 21 1f 9e e1 d5 cd ca f0 8b 2b c9 8a 93 bb 57 20 86 1c a1 4f 3e 25 d4 6c a5 6b a7 37 ff 39 35 0c f8 ea 56 45 8f 2c 59 ab 85 eb 49 0f dc d8 76 b6 f4 0e 11 b4 d0 30 d3 3b ad d7
+ * 01 2b 3f cf 73 2c d6 ed cb 74 15 78 8a c1 17 c9 89 68 21 ab 76 3b 4b 5a 6e 0e b9 d3 b6 3e 36 86 bf a2 a7 30 14 eb c7 2d 96 67 20 b5 9a e0 a8 c6 80 04 8d fe 75 5e 23 ca 8f 48 99 0d df 8e b8 70 29 9c 44 69 3d a5 c2 90 d2 1c 9b 02 1d 98 93 ec 84 e8 64 4c 3a 8b 97 f3 e5 c0 7d 26 c8 08 a0 62 82 55 f7 33 f6 51 63 4d 77 da fd c3 38 6d ee 09 47 a3 05 de a6 f1 22 25 6a 0c 81 b2 6b 58 d5 b3 fc fb 28 7f 07 dc 7a 9e d0 37 b4 e1 1a 24 03 ae 94 ba 88 2f ea 2e 8c 5b bb 79 d1 11 ff a4 19 3c 2a 4e 52 e3 95 bd 31 5d 35 4a 41 c4 db 42 c5 0b 49 1b 7c e4 b0 9d 45 f0 a9 61 57 06 d4 40 91 56 13 fa 87 ac 27 54 dd 59 1f 71 39 43 6c f9 be 4f f4 1e 32 cd e9 7e 7b 66 5f ef e7 6f 0a 60 d7 b7 83 92 e2 af 72 f8 b1 50 10 ce 18 53 a1 cc ad 12 34 0f f5 aa 16 e6 f2 d8 85 9f bc
+ */
+const uint8_t __aligned(256) raid_gfcauchy[6][256] =
+{
+       {
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+               0x01, 0x01, 0x01,
+       },
+       {
+               0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
+               0x1d, 0x3a, 0x74, 0xe8, 0xcd, 0x87, 0x13, 0x26,
+               0x4c, 0x98, 0x2d, 0x5a, 0xb4, 0x75, 0xea, 0xc9,
+               0x8f, 0x03, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0,
+               0x9d, 0x27, 0x4e, 0x9c, 0x25, 0x4a, 0x94, 0x35,
+               0x6a, 0xd4, 0xb5, 0x77, 0xee, 0xc1, 0x9f, 0x23,
+               0x46, 0x8c, 0x05, 0x0a, 0x14, 0x28, 0x50, 0xa0,
+               0x5d, 0xba, 0x69, 0xd2, 0xb9, 0x6f, 0xde, 0xa1,
+               0x5f, 0xbe, 0x61, 0xc2, 0x99, 0x2f, 0x5e, 0xbc,
+               0x65, 0xca, 0x89, 0x0f, 0x1e, 0x3c, 0x78, 0xf0,
+               0xfd, 0xe7, 0xd3, 0xbb, 0x6b, 0xd6, 0xb1, 0x7f,
+               0xfe, 0xe1, 0xdf, 0xa3, 0x5b, 0xb6, 0x71, 0xe2,
+               0xd9, 0xaf, 0x43, 0x86, 0x11, 0x22, 0x44, 0x88,
+               0x0d, 0x1a, 0x34, 0x68, 0xd0, 0xbd, 0x67, 0xce,
+               0x81, 0x1f, 0x3e, 0x7c, 0xf8, 0xed, 0xc7, 0x93,
+               0x3b, 0x76, 0xec, 0xc5, 0x97, 0x33, 0x66, 0xcc,
+               0x85, 0x17, 0x2e, 0x5c, 0xb8, 0x6d, 0xda, 0xa9,
+               0x4f, 0x9e, 0x21, 0x42, 0x84, 0x15, 0x2a, 0x54,
+               0xa8, 0x4d, 0x9a, 0x29, 0x52, 0xa4, 0x55, 0xaa,
+               0x49, 0x92, 0x39, 0x72, 0xe4, 0xd5, 0xb7, 0x73,
+               0xe6, 0xd1, 0xbf, 0x63, 0xc6, 0x91, 0x3f, 0x7e,
+               0xfc, 0xe5, 0xd7, 0xb3, 0x7b, 0xf6, 0xf1, 0xff,
+               0xe3, 0xdb, 0xab, 0x4b, 0x96, 0x31, 0x62, 0xc4,
+               0x95, 0x37, 0x6e, 0xdc, 0xa5, 0x57, 0xae, 0x41,
+               0x82, 0x19, 0x32, 0x64, 0xc8, 0x8d, 0x07, 0x0e,
+               0x1c, 0x38, 0x70, 0xe0, 0xdd, 0xa7, 0x53, 0xa6,
+               0x51, 0xa2, 0x59, 0xb2, 0x79, 0xf2, 0xf9, 0xef,
+               0xc3, 0x9b, 0x2b, 0x56, 0xac, 0x45, 0x8a, 0x09,
+               0x12, 0x24, 0x48, 0x90, 0x3d, 0x7a, 0xf4, 0xf5,
+               0xf7, 0xf3, 0xfb, 0xeb, 0xcb, 0x8b, 0x0b, 0x16,
+               0x2c, 0x58, 0xb0, 0x7d, 0xfa, 0xe9, 0xcf, 0x83,
+               0x1b, 0x36, 0x6c,
+       },
+       {
+               0x01, 0xf5, 0xd2, 0xc4, 0x9a, 0x71, 0xf1, 0x7f,
+               0xfc, 0x87, 0xc1, 0xc6, 0x19, 0x2f, 0x40, 0x55,
+               0x3d, 0xba, 0x53, 0x04, 0x9c, 0x61, 0x34, 0x8c,
+               0x46, 0x68, 0x70, 0x3e, 0xcc, 0x7d, 0x74, 0x75,
+               0xb5, 0xdb, 0x0c, 0xdf, 0x9e, 0x6d, 0x79, 0xeb,
+               0x63, 0x9f, 0x38, 0xd0, 0x94, 0xa5, 0x24, 0x89,
+               0x5c, 0x65, 0x5b, 0xae, 0x37, 0x33, 0x4c, 0xdd,
+               0x47, 0xf4, 0x02, 0xa6, 0x39, 0xd8, 0x9d, 0x2d,
+               0x62, 0xb9, 0x2e, 0x0f, 0x2b, 0x60, 0x58, 0xe4,
+               0xf8, 0x6c, 0x72, 0xb0, 0x85, 0x4d, 0x95, 0x41,
+               0x1c, 0x23, 0x05, 0x99, 0x32, 0xc5, 0x0e, 0x82,
+               0x91, 0x14, 0xd1, 0xaf, 0xf9, 0xb3, 0x07, 0x97,
+               0x6e, 0x0b, 0x67, 0x3b, 0x78, 0xe6, 0x28, 0x22,
+               0x4f, 0xa3, 0xca, 0x48, 0xde, 0x1d, 0xa8, 0x17,
+               0x6f, 0x90, 0xaa, 0x31, 0x5a, 0xf3, 0xe9, 0xa9,
+               0x44, 0x30, 0x56, 0x09, 0x59, 0x6a, 0x42, 0xcd,
+               0xe5, 0xd6, 0x86, 0xd9, 0xbf, 0xcb, 0x26, 0x66,
+               0x7c, 0xd5, 0xbe, 0x25, 0x1f, 0xe0, 0x98, 0x27,
+               0x92, 0x51, 0xc7, 0x45, 0x2c, 0xc0, 0xad, 0xa7,
+               0x69, 0xf7, 0xb4, 0xe8, 0x84, 0xe1, 0x18, 0x88,
+               0x3c, 0x76, 0x20, 0x5e, 0x9b, 0x1e, 0x0d, 0x81,
+               0x4a, 0xbd, 0x16, 0x8a, 0xac, 0x93, 0xce, 0x1a,
+               0xc2, 0x0a, 0x3f, 0xfd, 0xe3, 0x77, 0x6b, 0xd7,
+               0xef, 0xa4, 0x80, 0xa1, 0x36, 0xed, 0xa2, 0x12,
+               0x57, 0xb6, 0x29, 0x8d, 0x7b, 0xc8, 0x52, 0xc3,
+               0xbc, 0xb8, 0x21, 0xd4, 0xea, 0xd3, 0x06, 0xab,
+               0x2a, 0x1b, 0x5f, 0xb7, 0x10, 0xec, 0x64, 0xf6,
+               0xe2, 0x11, 0x50, 0x83, 0x54, 0x3a, 0xfa, 0xfb,
+               0xf2, 0x43, 0xb1, 0xff, 0xe7, 0xc9, 0x03, 0xbb,
+               0xee, 0x13, 0x8b, 0xdc, 0x35, 0xb2, 0xda, 0xcf,
+               0xa0, 0x96, 0x49, 0x4e, 0x08, 0x73, 0xf0, 0x7e,
+               0xfe, 0x15, 0x4b,
+       },
+       {
+               0x01, 0xbb, 0xa6, 0xd7, 0xc7, 0x07, 0xce, 0x82,
+               0x4a, 0x2f, 0xa5, 0x9b, 0xb6, 0x60, 0xf1, 0xad,
+               0xe7, 0xf4, 0x06, 0xd2, 0xdf, 0x2e, 0xca, 0x65,
+               0x5c, 0x48, 0x21, 0xaa, 0xcd, 0x4e, 0xc1, 0x61,
+               0x38, 0x0a, 0x3e, 0xd1, 0xd5, 0xcb, 0x10, 0xdc,
+               0x5e, 0x24, 0xb8, 0xde, 0x79, 0x36, 0x43, 0x72,
+               0xd9, 0xf8, 0xf9, 0xa2, 0xa4, 0x6a, 0x3d, 0xea,
+               0x8e, 0x03, 0xf5, 0xab, 0xb4, 0x5d, 0xb5, 0x53,
+               0x6b, 0x39, 0x86, 0xb0, 0x50, 0x74, 0x96, 0x84,
+               0x5a, 0x4b, 0xe8, 0x49, 0xe5, 0x51, 0xef, 0x12,
+               0xbc, 0x89, 0x5b, 0x2b, 0x29, 0x09, 0xc3, 0x57,
+               0x1e, 0x37, 0x76, 0x0b, 0x64, 0x8a, 0x52, 0x59,
+               0x80, 0xda, 0xa8, 0x44, 0x95, 0x3c, 0x33, 0xe6,
+               0x7c, 0xaf, 0x6c, 0xb1, 0x9d, 0xfc, 0x92, 0xd6,
+               0xd8, 0xff, 0xa7, 0x77, 0x04, 0x13, 0x73, 0x66,
+               0x28, 0x7d, 0x83, 0xfb, 0x5f, 0x63, 0x25, 0x19,
+               0xbd, 0xc5, 0x3b, 0x6e, 0x20, 0x35, 0x55, 0x42,
+               0x31, 0xe1, 0xb9, 0x9e, 0x90, 0xd4, 0xba, 0xdb,
+               0xf7, 0x2a, 0xe9, 0x3a, 0xa0, 0x75, 0x7a, 0xd3,
+               0x02, 0xee, 0x9c, 0xc6, 0x1f, 0x14, 0xcc, 0x22,
+               0x4d, 0x30, 0x71, 0x58, 0x11, 0x85, 0x4f, 0x6f,
+               0x6d, 0x1d, 0xcf, 0xfa, 0x54, 0xa9, 0x17, 0xa3,
+               0x0f, 0xae, 0x0d, 0x1c, 0xc2, 0xd0, 0x32, 0x16,
+               0xf6, 0xc0, 0x7f, 0x2d, 0x15, 0xf3, 0x1b, 0xf2,
+               0xed, 0xb3, 0x45, 0xc8, 0xac, 0x7b, 0x2c, 0xe2,
+               0xe4, 0xbf, 0xbe, 0x9f, 0x34, 0x05, 0x70, 0x3f,
+               0x98, 0xfe, 0x62, 0x18, 0x9a, 0x56, 0x8d, 0x93,
+               0x97, 0x78, 0x4c, 0x7e, 0x27, 0x87, 0x08, 0x8b,
+               0xec, 0x67, 0x0e, 0x1a, 0x23, 0x8c, 0x68, 0x99,
+               0x94, 0x40, 0xb2, 0xa1, 0xeb, 0xb7, 0x26, 0xf0,
+               0xdd, 0xe3, 0x69, 0x0c, 0xc4, 0x88, 0x41, 0x81,
+               0x91, 0xe0, 0xfd,
+       },
+       {
+               0x01, 0x97, 0x7f, 0x9c, 0x7c, 0x18, 0xbd, 0xa2,
+               0x58, 0x1a, 0xda, 0x74, 0x70, 0xa3, 0xe5, 0x47,
+               0x29, 0x07, 0xf5, 0x80, 0x23, 0xe9, 0xfa, 0x46,
+               0x54, 0xa0, 0x99, 0x95, 0x53, 0x9b, 0x0b, 0xc7,
+               0x09, 0xc0, 0x78, 0x89, 0x92, 0xe3, 0x0d, 0xb0,
+               0x2a, 0x8c, 0xfb, 0x17, 0x3f, 0x26, 0x65, 0x87,
+               0x27, 0x5c, 0x66, 0x61, 0x79, 0x4d, 0x32, 0xb3,
+               0x8d, 0x52, 0xe2, 0x82, 0x3d, 0xf9, 0xc5, 0x02,
+               0xbc, 0x4c, 0x73, 0x48, 0x62, 0xaf, 0xba, 0x41,
+               0xd9, 0xc4, 0x2f, 0xb1, 0x33, 0xb8, 0x15, 0x7d,
+               0xcf, 0x3a, 0xa9, 0x5f, 0x84, 0x6d, 0x34, 0x1b,
+               0x44, 0x94, 0x72, 0x81, 0x42, 0xbe, 0xcc, 0x4b,
+               0x0a, 0x6f, 0x5a, 0x22, 0x36, 0xb5, 0x3c, 0x9d,
+               0x13, 0x7e, 0x08, 0xdd, 0xd6, 0x5e, 0x04, 0xfc,
+               0x5b, 0xec, 0xef, 0xf1, 0x6e, 0x1e, 0x77, 0x24,
+               0xe6, 0xc6, 0xaa, 0xcb, 0xfd, 0x51, 0x67, 0x06,
+               0x6a, 0x4a, 0x88, 0xdb, 0xb2, 0xc2, 0x5d, 0x43,
+               0x40, 0xf7, 0x50, 0xa8, 0xf2, 0x7a, 0x71, 0xa4,
+               0xd2, 0xbf, 0x31, 0x90, 0x19, 0x9a, 0x8e, 0xf6,
+               0xc3, 0xa6, 0xe7, 0x60, 0x12, 0xee, 0x2d, 0xde,
+               0x38, 0xe8, 0xb7, 0x98, 0xc1, 0x28, 0xf3, 0x05,
+               0x96, 0x63, 0xd1, 0xb9, 0x14, 0x9f, 0x1d, 0x83,
+               0x68, 0x75, 0xed, 0x16, 0x03, 0xce, 0xe4, 0xdf,
+               0xe0, 0x10, 0xae, 0x69, 0x55, 0x91, 0x2e, 0x4e,
+               0xfe, 0x21, 0x1f, 0x9e, 0xe1, 0xd5, 0xcd, 0xca,
+               0xf0, 0x8b, 0x2b, 0xc9, 0x8a, 0x93, 0xbb, 0x57,
+               0x20, 0x86, 0x1c, 0xa1, 0x4f, 0x3e, 0x25, 0xd4,
+               0x6c, 0xa5, 0x6b, 0xa7, 0x37, 0xff, 0x39, 0x35,
+               0x0c, 0xf8, 0xea, 0x56, 0x45, 0x8f, 0x2c, 0x59,
+               0xab, 0x85, 0xeb, 0x49, 0x0f, 0xdc, 0xd8, 0x76,
+               0xb6, 0xf4, 0x0e, 0x11, 0xb4, 0xd0, 0x30, 0xd3,
+               0x3b, 0xad, 0xd7,
+       },
+       {
+               0x01, 0x2b, 0x3f, 0xcf, 0x73, 0x2c, 0xd6, 0xed,
+               0xcb, 0x74, 0x15, 0x78, 0x8a, 0xc1, 0x17, 0xc9,
+               0x89, 0x68, 0x21, 0xab, 0x76, 0x3b, 0x4b, 0x5a,
+               0x6e, 0x0e, 0xb9, 0xd3, 0xb6, 0x3e, 0x36, 0x86,
+               0xbf, 0xa2, 0xa7, 0x30, 0x14, 0xeb, 0xc7, 0x2d,
+               0x96, 0x67, 0x20, 0xb5, 0x9a, 0xe0, 0xa8, 0xc6,
+               0x80, 0x04, 0x8d, 0xfe, 0x75, 0x5e, 0x23, 0xca,
+               0x8f, 0x48, 0x99, 0x0d, 0xdf, 0x8e, 0xb8, 0x70,
+               0x29, 0x9c, 0x44, 0x69, 0x3d, 0xa5, 0xc2, 0x90,
+               0xd2, 0x1c, 0x9b, 0x02, 0x1d, 0x98, 0x93, 0xec,
+               0x84, 0xe8, 0x64, 0x4c, 0x3a, 0x8b, 0x97, 0xf3,
+               0xe5, 0xc0, 0x7d, 0x26, 0xc8, 0x08, 0xa0, 0x62,
+               0x82, 0x55, 0xf7, 0x33, 0xf6, 0x51, 0x63, 0x4d,
+               0x77, 0xda, 0xfd, 0xc3, 0x38, 0x6d, 0xee, 0x09,
+               0x47, 0xa3, 0x05, 0xde, 0xa6, 0xf1, 0x22, 0x25,
+               0x6a, 0x0c, 0x81, 0xb2, 0x6b, 0x58, 0xd5, 0xb3,
+               0xfc, 0xfb, 0x28, 0x7f, 0x07, 0xdc, 0x7a, 0x9e,
+               0xd0, 0x37, 0xb4, 0xe1, 0x1a, 0x24, 0x03, 0xae,
+               0x94, 0xba, 0x88, 0x2f, 0xea, 0x2e, 0x8c, 0x5b,
+               0xbb, 0x79, 0xd1, 0x11, 0xff, 0xa4, 0x19, 0x3c,
+               0x2a, 0x4e, 0x52, 0xe3, 0x95, 0xbd, 0x31, 0x5d,
+               0x35, 0x4a, 0x41, 0xc4, 0xdb, 0x42, 0xc5, 0x0b,
+               0x49, 0x1b, 0x7c, 0xe4, 0xb0, 0x9d, 0x45, 0xf0,
+               0xa9, 0x61, 0x57, 0x06, 0xd4, 0x40, 0x91, 0x56,
+               0x13, 0xfa, 0x87, 0xac, 0x27, 0x54, 0xdd, 0x59,
+               0x1f, 0x71, 0x39, 0x43, 0x6c, 0xf9, 0xbe, 0x4f,
+               0xf4, 0x1e, 0x32, 0xcd, 0xe9, 0x7e, 0x7b, 0x66,
+               0x5f, 0xef, 0xe7, 0x6f, 0x0a, 0x60, 0xd7, 0xb7,
+               0x83, 0x92, 0xe2, 0xaf, 0x72, 0xf8, 0xb1, 0x50,
+               0x10, 0xce, 0x18, 0x53, 0xa1, 0xcc, 0xad, 0x12,
+               0x34, 0x0f, 0xf5, 0xaa, 0x16, 0xe6, 0xf2, 0xd8,
+               0x85, 0x9f, 0xbc,
+       },
+};
+
+#ifdef CONFIG_X86
+/**
+ * PSHUFB tables for the Cauchy matrix.
+ *
+ * Indexes are [DISK][PARITY - 2][LH].
+ * Where DISK is from 0 to 250, PARITY from 2 to 5, LH from 0 to 1.
+ */
+const uint8_t __aligned(256) raid_gfcauchypshufb[251][4][2][16] =
+{
+       {
+               {
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+                       { 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0 },
+               },
+               {
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+                       { 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0 },
+               },
+               {
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+                       { 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0 },
+               },
+               {
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+                       { 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xf5, 0xf7, 0x02, 0xf3, 0x06, 0x04, 0xf1, 0xfb, 0x0e, 0x0c, 0xf9, 0x08, 0xfd, 0xff, 0x0a },
+                       { 0x00, 0xeb, 0xcb, 0x20, 0x8b, 0x60, 0x40, 0xab, 0x0b, 0xe0, 0xc0, 0x2b, 0x80, 0x6b, 0x4b, 0xa0 },
+               },
+               {
+                       { 0x00, 0xbb, 0x6b, 0xd0, 0xd6, 0x6d, 0xbd, 0x06, 0xb1, 0x0a, 0xda, 0x61, 0x67, 0xdc, 0x0c, 0xb7 },
+                       { 0x00, 0x7f, 0xfe, 0x81, 0xe1, 0x9e, 0x1f, 0x60, 0xdf, 0xa0, 0x21, 0x5e, 0x3e, 0x41, 0xc0, 0xbf },
+               },
+               {
+                       { 0x00, 0x97, 0x33, 0xa4, 0x66, 0xf1, 0x55, 0xc2, 0xcc, 0x5b, 0xff, 0x68, 0xaa, 0x3d, 0x99, 0x0e },
+                       { 0x00, 0x85, 0x17, 0x92, 0x2e, 0xab, 0x39, 0xbc, 0x5c, 0xd9, 0x4b, 0xce, 0x72, 0xf7, 0x65, 0xe0 },
+               },
+               {
+                       { 0x00, 0x2b, 0x56, 0x7d, 0xac, 0x87, 0xfa, 0xd1, 0x45, 0x6e, 0x13, 0x38, 0xe9, 0xc2, 0xbf, 0x94 },
+                       { 0x00, 0x8a, 0x09, 0x83, 0x12, 0x98, 0x1b, 0x91, 0x24, 0xae, 0x2d, 0xa7, 0x36, 0xbc, 0x3f, 0xb5 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xd2, 0xb9, 0x6b, 0x6f, 0xbd, 0xd6, 0x04, 0xde, 0x0c, 0x67, 0xb5, 0xb1, 0x63, 0x08, 0xda },
+                       { 0x00, 0xa1, 0x5f, 0xfe, 0xbe, 0x1f, 0xe1, 0x40, 0x61, 0xc0, 0x3e, 0x9f, 0xdf, 0x7e, 0x80, 0x21 },
+               },
+               {
+                       { 0x00, 0xa6, 0x51, 0xf7, 0xa2, 0x04, 0xf3, 0x55, 0x59, 0xff, 0x08, 0xae, 0xfb, 0x5d, 0xaa, 0x0c },
+                       { 0x00, 0xb2, 0x79, 0xcb, 0xf2, 0x40, 0x8b, 0x39, 0xf9, 0x4b, 0x80, 0x32, 0x0b, 0xb9, 0x72, 0xc0 },
+               },
+               {
+                       { 0x00, 0x7f, 0xfe, 0x81, 0xe1, 0x9e, 0x1f, 0x60, 0xdf, 0xa0, 0x21, 0x5e, 0x3e, 0x41, 0xc0, 0xbf },
+                       { 0x00, 0xa3, 0x5b, 0xf8, 0xb6, 0x15, 0xed, 0x4e, 0x71, 0xd2, 0x2a, 0x89, 0xc7, 0x64, 0x9c, 0x3f },
+               },
+               {
+                       { 0x00, 0x3f, 0x7e, 0x41, 0xfc, 0xc3, 0x82, 0xbd, 0xe5, 0xda, 0x9b, 0xa4, 0x19, 0x26, 0x67, 0x58 },
+                       { 0x00, 0xd7, 0xb3, 0x64, 0x7b, 0xac, 0xc8, 0x1f, 0xf6, 0x21, 0x45, 0x92, 0x8d, 0x5a, 0x3e, 0xe9 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xc4, 0x95, 0x51, 0x37, 0xf3, 0xa2, 0x66, 0x6e, 0xaa, 0xfb, 0x3f, 0x59, 0x9d, 0xcc, 0x08 },
+                       { 0x00, 0xdc, 0xa5, 0x79, 0x57, 0x8b, 0xf2, 0x2e, 0xae, 0x72, 0x0b, 0xd7, 0xf9, 0x25, 0x5c, 0x80 },
+               },
+               {
+                       { 0x00, 0xd7, 0xb3, 0x64, 0x7b, 0xac, 0xc8, 0x1f, 0xf6, 0x21, 0x45, 0x92, 0x8d, 0x5a, 0x3e, 0xe9 },
+                       { 0x00, 0xf1, 0xff, 0x0e, 0xe3, 0x12, 0x1c, 0xed, 0xdb, 0x2a, 0x24, 0xd5, 0x38, 0xc9, 0xc7, 0x36 },
+               },
+               {
+                       { 0x00, 0x9c, 0x25, 0xb9, 0x4a, 0xd6, 0x6f, 0xf3, 0x94, 0x08, 0xb1, 0x2d, 0xde, 0x42, 0xfb, 0x67 },
+                       { 0x00, 0x35, 0x6a, 0x5f, 0xd4, 0xe1, 0xbe, 0x8b, 0xb5, 0x80, 0xdf, 0xea, 0x61, 0x54, 0x0b, 0x3e },
+               },
+               {
+                       { 0x00, 0xcf, 0x83, 0x4c, 0x1b, 0xd4, 0x98, 0x57, 0x36, 0xf9, 0xb5, 0x7a, 0x2d, 0xe2, 0xae, 0x61 },
+                       { 0x00, 0x6c, 0xd8, 0xb4, 0xad, 0xc1, 0x75, 0x19, 0x47, 0x2b, 0x9f, 0xf3, 0xea, 0x86, 0x32, 0x5e },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x9a, 0x29, 0xb3, 0x52, 0xc8, 0x7b, 0xe1, 0xa4, 0x3e, 0x8d, 0x17, 0xf6, 0x6c, 0xdf, 0x45 },
+                       { 0x00, 0x55, 0xaa, 0xff, 0x49, 0x1c, 0xe3, 0xb6, 0x92, 0xc7, 0x38, 0x6d, 0xdb, 0x8e, 0x71, 0x24 },
+               },
+               {
+                       { 0x00, 0xc7, 0x93, 0x54, 0x3b, 0xfc, 0xa8, 0x6f, 0x76, 0xb1, 0xe5, 0x22, 0x4d, 0x8a, 0xde, 0x19 },
+                       { 0x00, 0xec, 0xc5, 0x29, 0x97, 0x7b, 0x52, 0xbe, 0x33, 0xdf, 0xf6, 0x1a, 0xa4, 0x48, 0x61, 0x8d },
+               },
+               {
+                       { 0x00, 0x7c, 0xf8, 0x84, 0xed, 0x91, 0x15, 0x69, 0xc7, 0xbb, 0x3f, 0x43, 0x2a, 0x56, 0xd2, 0xae },
+                       { 0x00, 0x93, 0x3b, 0xa8, 0x76, 0xe5, 0x4d, 0xde, 0xec, 0x7f, 0xd7, 0x44, 0x9a, 0x09, 0xa1, 0x32 },
+               },
+               {
+                       { 0x00, 0x73, 0xe6, 0x95, 0xd1, 0xa2, 0x37, 0x44, 0xbf, 0xcc, 0x59, 0x2a, 0x6e, 0x1d, 0x88, 0xfb },
+                       { 0x00, 0x63, 0xc6, 0xa5, 0x91, 0xf2, 0x57, 0x34, 0x3f, 0x5c, 0xf9, 0x9a, 0xae, 0xcd, 0x68, 0x0b },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x71, 0xe2, 0x93, 0xd9, 0xa8, 0x3b, 0x4a, 0xaf, 0xde, 0x4d, 0x3c, 0x76, 0x07, 0x94, 0xe5 },
+                       { 0x00, 0x43, 0x86, 0xc5, 0x11, 0x52, 0x97, 0xd4, 0x22, 0x61, 0xa4, 0xe7, 0x33, 0x70, 0xb5, 0xf6 },
+               },
+               {
+                       { 0x00, 0x07, 0x0e, 0x09, 0x1c, 0x1b, 0x12, 0x15, 0x38, 0x3f, 0x36, 0x31, 0x24, 0x23, 0x2a, 0x2d },
+                       { 0x00, 0x70, 0xe0, 0x90, 0xdd, 0xad, 0x3d, 0x4d, 0xa7, 0xd7, 0x47, 0x37, 0x7a, 0x0a, 0x9a, 0xea },
+               },
+               {
+                       { 0x00, 0x18, 0x30, 0x28, 0x60, 0x78, 0x50, 0x48, 0xc0, 0xd8, 0xf0, 0xe8, 0xa0, 0xb8, 0x90, 0x88 },
+                       { 0x00, 0x9d, 0x27, 0xba, 0x4e, 0xd3, 0x69, 0xf4, 0x9c, 0x01, 0xbb, 0x26, 0xd2, 0x4f, 0xf5, 0x68 },
+               },
+               {
+                       { 0x00, 0x2c, 0x58, 0x74, 0xb0, 0x9c, 0xe8, 0xc4, 0x7d, 0x51, 0x25, 0x09, 0xcd, 0xe1, 0x95, 0xb9 },
+                       { 0x00, 0xfa, 0xe9, 0x13, 0xcf, 0x35, 0x26, 0xdc, 0x83, 0x79, 0x6a, 0x90, 0x4c, 0xb6, 0xa5, 0x5f },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xf1, 0xff, 0x0e, 0xe3, 0x12, 0x1c, 0xed, 0xdb, 0x2a, 0x24, 0xd5, 0x38, 0xc9, 0xc7, 0x36 },
+                       { 0x00, 0xab, 0x4b, 0xe0, 0x96, 0x3d, 0xdd, 0x76, 0x31, 0x9a, 0x7a, 0xd1, 0xa7, 0x0c, 0xec, 0x47 },
+               },
+               {
+                       { 0x00, 0xce, 0x81, 0x4f, 0x1f, 0xd1, 0x9e, 0x50, 0x3e, 0xf0, 0xbf, 0x71, 0x21, 0xef, 0xa0, 0x6e },
+                       { 0x00, 0x7c, 0xf8, 0x84, 0xed, 0x91, 0x15, 0x69, 0xc7, 0xbb, 0x3f, 0x43, 0x2a, 0x56, 0xd2, 0xae },
+               },
+               {
+                       { 0x00, 0xbd, 0x67, 0xda, 0xce, 0x73, 0xa9, 0x14, 0x81, 0x3c, 0xe6, 0x5b, 0x4f, 0xf2, 0x28, 0x95 },
+                       { 0x00, 0x1f, 0x3e, 0x21, 0x7c, 0x63, 0x42, 0x5d, 0xf8, 0xe7, 0xc6, 0xd9, 0x84, 0x9b, 0xba, 0xa5 },
+               },
+               {
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+               },
+               {
+                       { 0x00, 0xd8, 0xad, 0x75, 0x47, 0x9f, 0xea, 0x32, 0x8e, 0x56, 0x23, 0xfb, 0xc9, 0x11, 0x64, 0xbc },
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+               },
+               {
+                       { 0x00, 0xad, 0x47, 0xea, 0x8e, 0x23, 0xc9, 0x64, 0x01, 0xac, 0x46, 0xeb, 0x8f, 0x22, 0xc8, 0x65 },
+                       { 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xcf, 0x83, 0x4c, 0x1b, 0xd4, 0x98, 0x57, 0x36, 0xf9, 0xb5, 0x7a, 0x2d, 0xe2, 0xae, 0x61 },
+                       { 0x00, 0x6c, 0xd8, 0xb4, 0xad, 0xc1, 0x75, 0x19, 0x47, 0x2b, 0x9f, 0xf3, 0xea, 0x86, 0x32, 0x5e },
+               },
+               {
+                       { 0x00, 0xf0, 0xfd, 0x0d, 0xe7, 0x17, 0x1a, 0xea, 0xd3, 0x23, 0x2e, 0xde, 0x34, 0xc4, 0xc9, 0x39 },
+                       { 0x00, 0xbb, 0x6b, 0xd0, 0xd6, 0x6d, 0xbd, 0x06, 0xb1, 0x0a, 0xda, 0x61, 0x67, 0xdc, 0x0c, 0xb7 },
+               },
+               {
+                       { 0x00, 0x76, 0xec, 0x9a, 0xc5, 0xb3, 0x29, 0x5f, 0x97, 0xe1, 0x7b, 0x0d, 0x52, 0x24, 0xbe, 0xc8 },
+                       { 0x00, 0x33, 0x66, 0x55, 0xcc, 0xff, 0xaa, 0x99, 0x85, 0xb6, 0xe3, 0xd0, 0x49, 0x7a, 0x2f, 0x1c },
+               },
+               {
+                       { 0x00, 0x12, 0x24, 0x36, 0x48, 0x5a, 0x6c, 0x7e, 0x90, 0x82, 0xb4, 0xa6, 0xd8, 0xca, 0xfc, 0xee },
+                       { 0x00, 0x3d, 0x7a, 0x47, 0xf4, 0xc9, 0x8e, 0xb3, 0xf5, 0xc8, 0x8f, 0xb2, 0x01, 0x3c, 0x7b, 0x46 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xa0, 0x5d, 0xfd, 0xba, 0x1a, 0xe7, 0x47, 0x69, 0xc9, 0x34, 0x94, 0xd3, 0x73, 0x8e, 0x2e },
+                       { 0x00, 0xd2, 0xb9, 0x6b, 0x6f, 0xbd, 0xd6, 0x04, 0xde, 0x0c, 0x67, 0xb5, 0xb1, 0x63, 0x08, 0xda },
+               },
+               {
+                       { 0x00, 0xdd, 0xa7, 0x7a, 0x53, 0x8e, 0xf4, 0x29, 0xa6, 0x7b, 0x01, 0xdc, 0xf5, 0x28, 0x52, 0x8f },
+                       { 0x00, 0x51, 0xa2, 0xf3, 0x59, 0x08, 0xfb, 0xaa, 0xb2, 0xe3, 0x10, 0x41, 0xeb, 0xba, 0x49, 0x18 },
+               },
+               {
+                       { 0x00, 0xb6, 0x71, 0xc7, 0xe2, 0x54, 0x93, 0x25, 0xd9, 0x6f, 0xa8, 0x1e, 0x3b, 0x8d, 0x4a, 0xfc },
+                       { 0x00, 0xaf, 0x43, 0xec, 0x86, 0x29, 0xc5, 0x6a, 0x11, 0xbe, 0x52, 0xfd, 0x97, 0x38, 0xd4, 0x7b },
+               },
+               {
+                       { 0x00, 0x34, 0x68, 0x5c, 0xd0, 0xe4, 0xb8, 0x8c, 0xbd, 0x89, 0xd5, 0xe1, 0x6d, 0x59, 0x05, 0x31 },
+                       { 0x00, 0x67, 0xce, 0xa9, 0x81, 0xe6, 0x4f, 0x28, 0x1f, 0x78, 0xd1, 0xb6, 0x9e, 0xf9, 0x50, 0x37 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x96, 0x31, 0xa7, 0x62, 0xf4, 0x53, 0xc5, 0xc4, 0x52, 0xf5, 0x63, 0xa6, 0x30, 0x97, 0x01 },
+                       { 0x00, 0x95, 0x37, 0xa2, 0x6e, 0xfb, 0x59, 0xcc, 0xdc, 0x49, 0xeb, 0x7e, 0xb2, 0x27, 0x85, 0x10 },
+               },
+               {
+                       { 0x00, 0xe3, 0xdb, 0x38, 0xab, 0x48, 0x70, 0x93, 0x4b, 0xa8, 0x90, 0x73, 0xe0, 0x03, 0x3b, 0xd8 },
+                       { 0x00, 0x96, 0x31, 0xa7, 0x62, 0xf4, 0x53, 0xc5, 0xc4, 0x52, 0xf5, 0x63, 0xa6, 0x30, 0x97, 0x01 },
+               },
+               {
+                       { 0x00, 0xf4, 0xf5, 0x01, 0xf7, 0x03, 0x02, 0xf6, 0xf3, 0x07, 0x06, 0xf2, 0x04, 0xf0, 0xf1, 0x05 },
+                       { 0x00, 0xfb, 0xeb, 0x10, 0xcb, 0x30, 0x20, 0xdb, 0x8b, 0x70, 0x60, 0x9b, 0x40, 0xbb, 0xab, 0x50 },
+               },
+               {
+                       { 0x00, 0x0f, 0x1e, 0x11, 0x3c, 0x33, 0x22, 0x2d, 0x78, 0x77, 0x66, 0x69, 0x44, 0x4b, 0x5a, 0x55 },
+                       { 0x00, 0xf0, 0xfd, 0x0d, 0xe7, 0x17, 0x1a, 0xea, 0xd3, 0x23, 0x2e, 0xde, 0x34, 0xc4, 0xc9, 0x39 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x49, 0x92, 0xdb, 0x39, 0x70, 0xab, 0xe2, 0x72, 0x3b, 0xe0, 0xa9, 0x4b, 0x02, 0xd9, 0x90 },
+                       { 0x00, 0xe4, 0xd5, 0x31, 0xb7, 0x53, 0x62, 0x86, 0x73, 0x97, 0xa6, 0x42, 0xc4, 0x20, 0x11, 0xf5 },
+               },
+               {
+                       { 0x00, 0x69, 0xd2, 0xbb, 0xb9, 0xd0, 0x6b, 0x02, 0x6f, 0x06, 0xbd, 0xd4, 0xd6, 0xbf, 0x04, 0x6d },
+                       { 0x00, 0xde, 0xa1, 0x7f, 0x5f, 0x81, 0xfe, 0x20, 0xbe, 0x60, 0x1f, 0xc1, 0xe1, 0x3f, 0x40, 0x9e },
+               },
+               {
+                       { 0x00, 0x0e, 0x1c, 0x12, 0x38, 0x36, 0x24, 0x2a, 0x70, 0x7e, 0x6c, 0x62, 0x48, 0x46, 0x54, 0x5a },
+                       { 0x00, 0xe0, 0xdd, 0x3d, 0xa7, 0x47, 0x7a, 0x9a, 0x53, 0xb3, 0x8e, 0x6e, 0xf4, 0x14, 0x29, 0xc9 },
+               },
+               {
+                       { 0x00, 0xf5, 0xf7, 0x02, 0xf3, 0x06, 0x04, 0xf1, 0xfb, 0x0e, 0x0c, 0xf9, 0x08, 0xfd, 0xff, 0x0a },
+                       { 0x00, 0xeb, 0xcb, 0x20, 0x8b, 0x60, 0x40, 0xab, 0x0b, 0xe0, 0xc0, 0x2b, 0x80, 0x6b, 0x4b, 0xa0 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x4e, 0x9c, 0xd2, 0x25, 0x6b, 0xb9, 0xf7, 0x4a, 0x04, 0xd6, 0x98, 0x6f, 0x21, 0xf3, 0xbd },
+                       { 0x00, 0x94, 0x35, 0xa1, 0x6a, 0xfe, 0x5f, 0xcb, 0xd4, 0x40, 0xe1, 0x75, 0xbe, 0x2a, 0x8b, 0x1f },
+               },
+               {
+                       { 0x00, 0x0c, 0x18, 0x14, 0x30, 0x3c, 0x28, 0x24, 0x60, 0x6c, 0x78, 0x74, 0x50, 0x5c, 0x48, 0x44 },
+                       { 0x00, 0xc0, 0x9d, 0x5d, 0x27, 0xe7, 0xba, 0x7a, 0x4e, 0x8e, 0xd3, 0x13, 0x69, 0xa9, 0xf4, 0x34 },
+               },
+               {
+                       { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff },
+                       { 0x00, 0x0d, 0x1a, 0x17, 0x34, 0x39, 0x2e, 0x23, 0x68, 0x65, 0x72, 0x7f, 0x5c, 0x51, 0x46, 0x4b },
+               },
+               {
+                       { 0x00, 0xaa, 0x49, 0xe3, 0x92, 0x38, 0xdb, 0x71, 0x39, 0x93, 0x70, 0xda, 0xab, 0x01, 0xe2, 0x48 },
+                       { 0x00, 0x72, 0xe4, 0x96, 0xd5, 0xa7, 0x31, 0x43, 0xb7, 0xc5, 0x53, 0x21, 0x62, 0x10, 0x86, 0xf4 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38, 0x40, 0x48, 0x50, 0x58, 0x60, 0x68, 0x70, 0x78 },
+                       { 0x00, 0x80, 0x1d, 0x9d, 0x3a, 0xba, 0x27, 0xa7, 0x74, 0xf4, 0x69, 0xe9, 0x4e, 0xce, 0x53, 0xd3 },
+               },
+               {
+                       { 0x00, 0xc4, 0x95, 0x51, 0x37, 0xf3, 0xa2, 0x66, 0x6e, 0xaa, 0xfb, 0x3f, 0x59, 0x9d, 0xcc, 0x08 },
+                       { 0x00, 0xdc, 0xa5, 0x79, 0x57, 0x8b, 0xf2, 0x2e, 0xae, 0x72, 0x0b, 0xd7, 0xf9, 0x25, 0x5c, 0x80 },
+               },
+               {
+                       { 0x00, 0xb4, 0x75, 0xc1, 0xea, 0x5e, 0x9f, 0x2b, 0xc9, 0x7d, 0xbc, 0x08, 0x23, 0x97, 0x56, 0xe2 },
+                       { 0x00, 0x8f, 0x03, 0x8c, 0x06, 0x89, 0x05, 0x8a, 0x0c, 0x83, 0x0f, 0x80, 0x0a, 0x85, 0x09, 0x86 },
+               },
+               {
+                       { 0x00, 0x16, 0x2c, 0x3a, 0x58, 0x4e, 0x74, 0x62, 0xb0, 0xa6, 0x9c, 0x8a, 0xe8, 0xfe, 0xc4, 0xd2 },
+                       { 0x00, 0x7d, 0xfa, 0x87, 0xe9, 0x94, 0x13, 0x6e, 0xcf, 0xb2, 0x35, 0x48, 0x26, 0x5b, 0xdc, 0xa1 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x73, 0xe6, 0x95, 0xd1, 0xa2, 0x37, 0x44, 0xbf, 0xcc, 0x59, 0x2a, 0x6e, 0x1d, 0x88, 0xfb },
+                       { 0x00, 0x63, 0xc6, 0xa5, 0x91, 0xf2, 0x57, 0x34, 0x3f, 0x5c, 0xf9, 0x9a, 0xae, 0xcd, 0x68, 0x0b },
+               },
+               {
+                       { 0x00, 0x88, 0x0d, 0x85, 0x1a, 0x92, 0x17, 0x9f, 0x34, 0xbc, 0x39, 0xb1, 0x2e, 0xa6, 0x23, 0xab },
+                       { 0x00, 0x68, 0xd0, 0xb8, 0xbd, 0xd5, 0x6d, 0x05, 0x67, 0x0f, 0xb7, 0xdf, 0xda, 0xb2, 0x0a, 0x62 },
+               },
+               {
+                       { 0x00, 0xd0, 0xbd, 0x6d, 0x67, 0xb7, 0xda, 0x0a, 0xce, 0x1e, 0x73, 0xa3, 0xa9, 0x79, 0x14, 0xc4 },
+                       { 0x00, 0x81, 0x1f, 0x9e, 0x3e, 0xbf, 0x21, 0xa0, 0x7c, 0xfd, 0x63, 0xe2, 0x42, 0xc3, 0x5d, 0xdc },
+               },
+               {
+                       { 0x00, 0xe6, 0xd1, 0x37, 0xbf, 0x59, 0x6e, 0x88, 0x63, 0x85, 0xb2, 0x54, 0xdc, 0x3a, 0x0d, 0xeb },
+                       { 0x00, 0xc6, 0x91, 0x57, 0x3f, 0xf9, 0xae, 0x68, 0x7e, 0xb8, 0xef, 0x29, 0x41, 0x87, 0xd0, 0x16 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xf0, 0xfd, 0x0d, 0xe7, 0x17, 0x1a, 0xea, 0xd3, 0x23, 0x2e, 0xde, 0x34, 0xc4, 0xc9, 0x39 },
+                       { 0x00, 0xbb, 0x6b, 0xd0, 0xd6, 0x6d, 0xbd, 0x06, 0xb1, 0x0a, 0xda, 0x61, 0x67, 0xdc, 0x0c, 0xb7 },
+               },
+               {
+                       { 0x00, 0x41, 0x82, 0xc3, 0x19, 0x58, 0x9b, 0xda, 0x32, 0x73, 0xb0, 0xf1, 0x2b, 0x6a, 0xa9, 0xe8 },
+                       { 0x00, 0x64, 0xc8, 0xac, 0x8d, 0xe9, 0x45, 0x21, 0x07, 0x63, 0xcf, 0xab, 0x8a, 0xee, 0x42, 0x26 },
+               },
+               {
+                       { 0x00, 0x30, 0x60, 0x50, 0xc0, 0xf0, 0xa0, 0x90, 0x9d, 0xad, 0xfd, 0xcd, 0x5d, 0x6d, 0x3d, 0x0d },
+                       { 0x00, 0x27, 0x4e, 0x69, 0x9c, 0xbb, 0xd2, 0xf5, 0x25, 0x02, 0x6b, 0x4c, 0xb9, 0x9e, 0xf7, 0xd0 },
+               },
+               {
+                       { 0x00, 0xf2, 0xf9, 0x0b, 0xef, 0x1d, 0x16, 0xe4, 0xc3, 0x31, 0x3a, 0xc8, 0x2c, 0xde, 0xd5, 0x27 },
+                       { 0x00, 0x9b, 0x2b, 0xb0, 0x56, 0xcd, 0x7d, 0xe6, 0xac, 0x37, 0x87, 0x1c, 0xfa, 0x61, 0xd1, 0x4a },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x7e, 0xfc, 0x82, 0xe5, 0x9b, 0x19, 0x67, 0xd7, 0xa9, 0x2b, 0x55, 0x32, 0x4c, 0xce, 0xb0 },
+                       { 0x00, 0xb3, 0x7b, 0xc8, 0xf6, 0x45, 0x8d, 0x3e, 0xf1, 0x42, 0x8a, 0x39, 0x07, 0xb4, 0x7c, 0xcf },
+               },
+               {
+                       { 0x00, 0x81, 0x1f, 0x9e, 0x3e, 0xbf, 0x21, 0xa0, 0x7c, 0xfd, 0x63, 0xe2, 0x42, 0xc3, 0x5d, 0xdc },
+                       { 0x00, 0xf8, 0xed, 0x15, 0xc7, 0x3f, 0x2a, 0xd2, 0x93, 0x6b, 0x7e, 0x86, 0x54, 0xac, 0xb9, 0x41 },
+               },
+               {
+                       { 0x00, 0xd3, 0xbb, 0x68, 0x6b, 0xb8, 0xd0, 0x03, 0xd6, 0x05, 0x6d, 0xbe, 0xbd, 0x6e, 0x06, 0xd5 },
+                       { 0x00, 0xb1, 0x7f, 0xce, 0xfe, 0x4f, 0x81, 0x30, 0xe1, 0x50, 0x9e, 0x2f, 0x1f, 0xae, 0x60, 0xd1 },
+               },
+               {
+                       { 0x00, 0xd8, 0xad, 0x75, 0x47, 0x9f, 0xea, 0x32, 0x8e, 0x56, 0x23, 0xfb, 0xc9, 0x11, 0x64, 0xbc },
+                       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+               },
+       },
+       {
+               {
+                       { 0x00, 0xfe, 0xe1, 0x1f, 0xdf, 0x21, 0x3e, 0xc0, 0xa3, 0x5d, 0x42, 0xbc, 0x7c, 0x82, 0x9d, 0x63 },
+                       { 0x00, 0x5b, 0xb6, 0xed, 0x71, 0x2a, 0xc7, 0x9c, 0xe2, 0xb9, 0x54, 0x0f, 0x93, 0xc8, 0x25, 0x7e },
+               },
+               {
+                       { 0x00, 0x91, 0x3f, 0xae, 0x7e, 0xef, 0x41, 0xd0, 0xfc, 0x6d, 0xc3, 0x52, 0x82, 0x13, 0xbd, 0x2c },
+                       { 0x00, 0xe5, 0xd7, 0x32, 0xb3, 0x56, 0x64, 0x81, 0x7b, 0x9e, 0xac, 0x49, 0xc8, 0x2d, 0x1f, 0xfa },
+               },
+               {
+                       { 0x00, 0x3b, 0x76, 0x4d, 0xec, 0xd7, 0x9a, 0xa1, 0xc5, 0xfe, 0xb3, 0x88, 0x29, 0x12, 0x5f, 0x64 },
+                       { 0x00, 0x97, 0x33, 0xa4, 0x66, 0xf1, 0x55, 0xc2, 0xcc, 0x5b, 0xff, 0x68, 0xaa, 0x3d, 0x99, 0x0e },
+               },
+               {
+                       { 0x00, 0x85, 0x17, 0x92, 0x2e, 0xab, 0x39, 0xbc, 0x5c, 0xd9, 0x4b, 0xce, 0x72, 0xf7, 0x65, 0xe0 },
+                       { 0x00, 0xb8, 0x6d, 0xd5, 0xda, 0x62, 0xb7, 0x0f, 0xa9, 0x11, 0xc4, 0x7c, 0x73, 0xcb, 0x1e, 0xa6 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x15, 0x2a, 0x3f, 0x54, 0x41, 0x7e, 0x6b, 0xa8, 0xbd, 0x82, 0x97, 0xfc, 0xe9, 0xd6, 0xc3 },
+                       { 0x00, 0x4d, 0x9a, 0xd7, 0x29, 0x64, 0xb3, 0xfe, 0x52, 0x1f, 0xc8, 0x85, 0x7b, 0x36, 0xe1, 0xac },
+               },
+               {
+                       { 0x00, 0xe0, 0xdd, 0x3d, 0xa7, 0x47, 0x7a, 0x9a, 0x53, 0xb3, 0x8e, 0x6e, 0xf4, 0x14, 0x29, 0xc9 },
+                       { 0x00, 0xa6, 0x51, 0xf7, 0xa2, 0x04, 0xf3, 0x55, 0x59, 0xff, 0x08, 0xae, 0xfb, 0x5d, 0xaa, 0x0c },
+               },
+               {
+                       { 0x00, 0xad, 0x47, 0xea, 0x8e, 0x23, 0xc9, 0x64, 0x01, 0xac, 0x46, 0xeb, 0x8f, 0x22, 0xc8, 0x65 },
+                       { 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e },
+               },
+               {
+                       { 0x00, 0x9f, 0x23, 0xbc, 0x46, 0xd9, 0x65, 0xfa, 0x8c, 0x13, 0xaf, 0x30, 0xca, 0x55, 0xe9, 0x76 },
+                       { 0x00, 0x05, 0x0a, 0x0f, 0x14, 0x11, 0x1e, 0x1b, 0x28, 0x2d, 0x22, 0x27, 0x3c, 0x39, 0x36, 0x33 },
+               },
+       },
+       {
+               {
+                       { 0x00, 0x4b, 0x96, 0xdd, 0x31, 0x7a, 0xa7, 0xec, 0x62, 0x29, 0xf4, 0xbf, 0x53, 0x18, 0xc5, 0x8e },
+                       { 0x00, 0xc4, 0x95, 0x51, 0x37, 0xf3, 0xa2, 0x66, 0x6e, 0xaa, 0xfb, 0x3f, 0x59, 0x9d, 0xcc, 0x08 },
+               },
+               {
+                       { 0x00, 0xfd, 0xe7, 0x1a, 0xd3, 0x2e, 0x34, 0xc9, 0xbb, 0x46, 0x5c, 0xa1, 0x68, 0x95, 0x8f, 0x72 },
+                       { 0x00, 0x6b, 0xd6, 0xbd, 0xb1, 0xda, 0x67, 0x0c, 0x7f, 0x14, 0xa9, 0xc2, 0xce, 0xa5, 0x18, 0x73 },
+               },
+               {
+                       { 0x00, 0xd7, 0xb3, 0x64, 0x7b, 0xac, 0xc8, 0x1f, 0xf6, 0x21, 0x45, 0x92, 0x8d, 0x5a, 0x3e, 0xe9 },
+                       { 0x00, 0xf1, 0xff, 0x0e, 0xe3, 0x12, 0x1c, 0xed, 0xdb, 0x2a, 0x24, 0xd5, 0x38, 0xc9, 0xc7, 0x36 },
+               },
+               {
+                       { 0x00, 0xbc, 0x65, 0xd9, 0xca, 0x76, 0xaf, 0x13, 0x89, 0x35, 0xec, 0x50, 0x43, 0xff, 0x26, 0x9a },
+                       { 0x00, 0x0f, 0x1e, 0x11, 0x3c, 0x33, 0x22, 0x2d, 0x78, 0x77, 0x66, 0x69, 0x44, 0x4b, 0x5a, 0x55 },
+               },
+       },
+};
+#endif
+
+#ifdef CONFIG_X86
+/**
+ * PSHUFB tables for generic multiplication.
+ *
+ * Indexes are [MULTIPLER][LH].
+ * Where MULTIPLER is from 0 to 255, LH from 0 to 1.
+ */
+const uint8_t __aligned(256) raid_gfmulpshufb[256][2][16] =
+{
+       {
+               { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+               { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
+       },
+       {
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+       {
+               { 0x00, 0xd1, 0xbf, 0x6e, 0x63, 0xb2, 0xdc, 0x0d, 0xc6, 0x17, 0x79, 0xa8, 0xa5, 0x74, 0x1a, 0xcb },
+               { 0x00, 0x91, 0x3f, 0xae, 0x7e, 0xef, 0x41, 0xd0, 0xfc, 0x6d, 0xc3, 0x52, 0x82, 0x13, 0xbd, 0x2c },
+       },
+       {
+               { 0x00, 0xd2, 0xb9, 0x6b, 0x6f, 0xbd, 0xd6, 0x04, 0xde, 0x0c, 0x67, 0xb5, 0xb1, 0x63, 0x08, 0xda },
+               { 0x00, 0xa1, 0x5f, 0xfe, 0xbe, 0x1f, 0xe1, 0x40, 0x61, 0xc0, 0x3e, 0x9f, 0xdf, 0x7e, 0x80, 0x21 },
+       },
+       {
+               { 0x00, 0xd3, 0xbb, 0x68, 0x6b, 0xb8, 0xd0, 0x03, 0xd6, 0x05, 0x6d, 0xbe, 0xbd, 0x6e, 0x06, 0xd5 },
+               { 0x00, 0xb1, 0x7f, 0xce, 0xfe, 0x4f, 0x81, 0x30, 0xe1, 0x50, 0x9e, 0x2f, 0x1f, 0xae, 0x60, 0xd1 },
+       },
+       {
+               { 0x00, 0xd4, 0xb5, 0x61, 0x77, 0xa3, 0xc2, 0x16, 0xee, 0x3a, 0x5b, 0x8f, 0x99, 0x4d, 0x2c, 0xf8 },
+               { 0x00, 0xc1, 0x9f, 0x5e, 0x23, 0xe2, 0xbc, 0x7d, 0x46, 0x87, 0xd9, 0x18, 0x65, 0xa4, 0xfa, 0x3b },
+       },
+       {
+               { 0x00, 0xd5, 0xb7, 0x62, 0x73, 0xa6, 0xc4, 0x11, 0xe6, 0x33, 0x51, 0x84, 0x95, 0x40, 0x22, 0xf7 },
+               { 0x00, 0xd1, 0xbf, 0x6e, 0x63, 0xb2, 0xdc, 0x0d, 0xc6, 0x17, 0x79, 0xa8, 0xa5, 0x74, 0x1a, 0xcb },
+       },
+       {
+               { 0x00, 0xd6, 0xb1, 0x67, 0x7f, 0xa9, 0xce, 0x18, 0xfe, 0x28, 0x4f, 0x99, 0x81, 0x57, 0x30, 0xe6 },
+               { 0x00, 0xe1, 0xdf, 0x3e, 0xa3, 0x42, 0x7c, 0x9d, 0x5b, 0xba, 0x84, 0x65, 0xf8, 0x19, 0x27, 0xc6 },
+       },
+       {
+               { 0x00, 0xd7, 0xb3, 0x64, 0x7b, 0xac, 0xc8, 0x1f, 0xf6, 0x21, 0x45, 0x92, 0x8d, 0x5a, 0x3e, 0xe9 },
+               { 0x00, 0xf1, 0xff, 0x0e, 0xe3, 0x12, 0x1c, 0xed, 0xdb, 0x2a, 0x24, 0xd5, 0x38, 0xc9, 0xc7, 0x36 },
+       },
+       {
+               { 0x00, 0xd8, 0xad, 0x75, 0x47, 0x9f, 0xea, 0x32, 0x8e, 0x56, 0x23, 0xfb, 0xc9, 0x11, 0x64, 0xbc },
+               { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f },
+       },
+       {
+               { 0x00, 0xd9, 0xaf, 0x76, 0x43, 0x9a, 0xec, 0x35, 0x86, 0x5f, 0x29, 0xf0, 0xc5, 0x1c, 0x6a, 0xb3 },
+               { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff },
+       },
+       {
+               { 0x00, 0xda, 0xa9, 0x73, 0x4f, 0x95, 0xe6, 0x3c, 0x9e, 0x44, 0x37, 0xed, 0xd1, 0x0b, 0x78, 0xa2 },
+               { 0x00, 0x21, 0x42, 0x63, 0x84, 0xa5, 0xc6, 0xe7, 0x15, 0x34, 0x57, 0x76, 0x91, 0xb0, 0xd3, 0xf2 },
+       },
+       {
+               { 0x00, 0xdb, 0xab, 0x70, 0x4b, 0x90, 0xe0, 0x3b, 0x96, 0x4d, 0x3d, 0xe6, 0xdd, 0x06, 0x76, 0xad },
+               { 0x00, 0x31, 0x62, 0x53, 0xc4, 0xf5, 0xa6, 0x97, 0x95, 0xa4, 0xf7, 0xc6, 0x51, 0x60, 0x33, 0x02 },
+       },
+       {
+               { 0x00, 0xdc, 0xa5, 0x79, 0x57, 0x8b, 0xf2, 0x2e, 0xae, 0x72, 0x0b, 0xd7, 0xf9, 0x25, 0x5c, 0x80 },
+               { 0x00, 0x41, 0x82, 0xc3, 0x19, 0x58, 0x9b, 0xda, 0x32, 0x73, 0xb0, 0xf1, 0x2b, 0x6a, 0xa9, 0xe8 },
+       },
+       {
+               { 0x00, 0xdd, 0xa7, 0x7a, 0x53, 0x8e, 0xf4, 0x29, 0xa6, 0x7b, 0x01, 0xdc, 0xf5, 0x28, 0x52, 0x8f },
+               { 0x00, 0x51, 0xa2, 0xf3, 0x59, 0x08, 0xfb, 0xaa, 0xb2, 0xe3, 0x10, 0x41, 0xeb, 0xba, 0x49, 0x18 },
+       },
+       {
+               { 0x00, 0xde, 0xa1, 0x7f, 0x5f, 0x81, 0xfe, 0x20, 0xbe, 0x60, 0x1f, 0xc1, 0xe1, 0x3f, 0x40, 0x9e },
+               { 0x00, 0x61, 0xc2, 0xa3, 0x99, 0xf8, 0x5b, 0x3a, 0x2f, 0x4e, 0xed, 0x8c, 0xb6, 0xd7, 0x74, 0x15 },
+       },
+       {
+               { 0x00, 0xdf, 0xa3, 0x7c, 0x5b, 0x84, 0xf8, 0x27, 0xb6, 0x69, 0x15, 0xca, 0xed, 0x32, 0x4e, 0x91 },
+               { 0x00, 0x71, 0xe2, 0x93, 0xd9, 0xa8, 0x3b, 0x4a, 0xaf, 0xde, 0x4d, 0x3c, 0x76, 0x07, 0x94, 0xe5 },
+       },
+       {
+               { 0x00, 0xe0, 0xdd, 0x3d, 0xa7, 0x47, 0x7a, 0x9a, 0x53, 0xb3, 0x8e, 0x6e, 0xf4, 0x14, 0x29, 0xc9 },
+               { 0x00, 0xa6, 0x51, 0xf7, 0xa2, 0x04, 0xf3, 0x55, 0x59, 0xff, 0x08, 0xae, 0xfb, 0x5d, 0xaa, 0x0c },
+       },
+       {
+               { 0x00, 0xe1, 0xdf, 0x3e, 0xa3, 0x42, 0x7c, 0x9d, 0x5b, 0xba, 0x84, 0x65, 0xf8, 0x19, 0x27, 0xc6 },
+               { 0x00, 0xb6, 0x71, 0xc7, 0xe2, 0x54, 0x93, 0x25, 0xd9, 0x6f, 0xa8, 0x1e, 0x3b, 0x8d, 0x4a, 0xfc },
+       },
+       {
+               { 0x00, 0xe2, 0xd9, 0x3b, 0xaf, 0x4d, 0x76, 0x94, 0x43, 0xa1, 0x9a, 0x78, 0xec, 0x0e, 0x35, 0xd7 },
+               { 0x00, 0x86, 0x11, 0x97, 0x22, 0xa4, 0x33, 0xb5, 0x44, 0xc2, 0x55, 0xd3, 0x66, 0xe0, 0x77, 0xf1 },
+       },
+       {
+               { 0x00, 0xe3, 0xdb, 0x38, 0xab, 0x48, 0x70, 0x93, 0x4b, 0xa8, 0x90, 0x73, 0xe0, 0x03, 0x3b, 0xd8 },
+               { 0x00, 0x96, 0x31, 0xa7, 0x62, 0xf4, 0x53, 0xc5, 0xc4, 0x52, 0xf5, 0x63, 0xa6, 0x30, 0x97, 0x01 },
+       },
+       {
+               { 0x00, 0xe4, 0xd5, 0x31, 0xb7, 0x53, 0x62, 0x86, 0x73, 0x97, 0xa6, 0x42, 0xc4, 0x20, 0x11, 0xf5 },
+               { 0x00, 0xe6, 0xd1, 0x37, 0xbf, 0x59, 0x6e, 0x88, 0x63, 0x85, 0xb2, 0x54, 0xdc, 0x3a, 0x0d, 0xeb },
+       },
+       {
+               { 0x00, 0xe5, 0xd7, 0x32, 0xb3, 0x56, 0x64, 0x81, 0x7b, 0x9e, 0xac, 0x49, 0xc8, 0x2d, 0x1f, 0xfa },
+               { 0x00, 0xf6, 0xf1, 0x07, 0xff, 0x09, 0x0e, 0xf8, 0xe3, 0x15, 0x12, 0xe4, 0x1c, 0xea, 0xed, 0x1b },
+       },
+       {
+               { 0x00, 0xe6, 0xd1, 0x37, 0xbf, 0x59, 0x6e, 0x88, 0x63, 0x85, 0xb2, 0x54, 0xdc, 0x3a, 0x0d, 0xeb },
+               { 0x00, 0xc6, 0x91, 0x57, 0x3f, 0xf9, 0xae, 0x68, 0x7e, 0xb8, 0xef, 0x29, 0x41, 0x87, 0xd0, 0x16 },
+       },
+       {
+               { 0x00, 0xe7, 0xd3, 0x34, 0xbb, 0x5c, 0x68, 0x8f, 0x6b, 0x8c, 0xb8, 0x5f, 0xd0, 0x37, 0x03, 0xe4 },
+               { 0x00, 0xd6, 0xb1, 0x67, 0x7f, 0xa9, 0xce, 0x18, 0xfe, 0x28, 0x4f, 0x99, 0x81, 0x57, 0x30, 0xe6 },
+       },
+       {
+               { 0x00, 0xe8, 0xcd, 0x25, 0x87, 0x6f, 0x4a, 0xa2, 0x13, 0xfb, 0xde, 0x36, 0x94, 0x7c, 0x59, 0xb1 },
+               { 0x00, 0x26, 0x4c, 0x6a, 0x98, 0xbe, 0xd4, 0xf2, 0x2d, 0x0b, 0x61, 0x47, 0xb5, 0x93, 0xf9, 0xdf },
+       },
+       {
+               { 0x00, 0xe9, 0xcf, 0x26, 0x83, 0x6a, 0x4c, 0xa5, 0x1b, 0xf2, 0xd4, 0x3d, 0x98, 0x71, 0x57, 0xbe },
+               { 0x00, 0x36, 0x6c, 0x5a, 0xd8, 0xee, 0xb4, 0x82, 0xad, 0x9b, 0xc1, 0xf7, 0x75, 0x43, 0x19, 0x2f },
+       },
+       {
+               { 0x00, 0xea, 0xc9, 0x23, 0x8f, 0x65, 0x46, 0xac, 0x03, 0xe9, 0xca, 0x20, 0x8c, 0x66, 0x45, 0xaf },
+               { 0x00, 0x06, 0x0c, 0x0a, 0x18, 0x1e, 0x14, 0x12, 0x30, 0x36, 0x3c, 0x3a, 0x28, 0x2e, 0x24, 0x22 },
+       },
+       {
+               { 0x00, 0xeb, 0xcb, 0x20, 0x8b, 0x60, 0x40, 0xab, 0x0b, 0xe0, 0xc0, 0x2b, 0x80, 0x6b, 0x4b, 0xa0 },
+               { 0x00, 0x16, 0x2c, 0x3a, 0x58, 0x4e, 0x74, 0x62, 0xb0, 0xa6, 0x9c, 0x8a, 0xe8, 0xfe, 0xc4, 0xd2 },
+       },
+       {
+               { 0x00, 0xec, 0xc5, 0x29, 0x97, 0x7b, 0x52, 0xbe, 0x33, 0xdf, 0xf6, 0x1a, 0xa4, 0x48, 0x61, 0x8d },
+               { 0x00, 0x66, 0xcc, 0xaa, 0x85, 0xe3, 0x49, 0x2f, 0x17, 0x71, 0xdb, 0xbd, 0x92, 0xf4, 0x5e, 0x38 },
+       },
+       {
+               { 0x00, 0xed, 0xc7, 0x2a, 0x93, 0x7e, 0x54, 0xb9, 0x3b, 0xd6, 0xfc, 0x11, 0xa8, 0x45, 0x6f, 0x82 },
+               { 0x00, 0x76, 0xec, 0x9a, 0xc5, 0xb3, 0x29, 0x5f, 0x97, 0xe1, 0x7b, 0x0d, 0x52, 0x24, 0xbe, 0xc8 },
+       },
+       {
+               { 0x00, 0xee, 0xc1, 0x2f, 0x9f, 0x71, 0x5e, 0xb0, 0x23, 0xcd, 0xe2, 0x0c, 0xbc, 0x52, 0x7d, 0x93 },
+               { 0x00, 0x46, 0x8c, 0xca, 0x05, 0x43, 0x89, 0xcf, 0x0a, 0x4c, 0x86, 0xc0, 0x0f, 0x49, 0x83, 0xc5 },
+       },
+       {
+               { 0x00, 0xef, 0xc3, 0x2c, 0x9b, 0x74, 0x58, 0xb7, 0x2b, 0xc4, 0xe8, 0x07, 0xb0, 0x5f, 0x73, 0x9c },
+               { 0x00, 0x56, 0xac, 0xfa, 0x45, 0x13, 0xe9, 0xbf, 0x8a, 0xdc, 0x26, 0x70, 0xcf, 0x99, 0x63, 0x35 },
+       },
+       {
+               { 0x00, 0xf0, 0xfd, 0x0d, 0xe7, 0x17, 0x1a, 0xea, 0xd3, 0x23, 0x2e, 0xde, 0x34, 0xc4, 0xc9, 0x39 },
+               { 0x00, 0xbb, 0x6b, 0xd0, 0xd6, 0x6d, 0xbd, 0x06, 0xb1, 0x0a, 0xda, 0x61, 0x67, 0xdc, 0x0c, 0xb7 },
+       },
+       {
+               { 0x00, 0xf1, 0xff, 0x0e, 0xe3, 0x12, 0x1c, 0xed, 0xdb, 0x2a, 0x24, 0xd5, 0x38, 0xc9, 0xc7, 0x36 },
+               { 0x00, 0xab, 0x4b, 0xe0, 0x96, 0x3d, 0xdd, 0x76, 0x31, 0x9a, 0x7a, 0xd1, 0xa7, 0x0c, 0xec, 0x47 },
+       },
+       {
+               { 0x00, 0xf2, 0xf9, 0x0b, 0xef, 0x1d, 0x16, 0xe4, 0xc3, 0x31, 0x3a, 0xc8, 0x2c, 0xde, 0xd5, 0x27 },
+               { 0x00, 0x9b, 0x2b, 0xb0, 0x56, 0xcd, 0x7d, 0xe6, 0xac, 0x37, 0x87, 0x1c, 0xfa, 0x61, 0xd1, 0x4a },
+       },
+       {
+               { 0x00, 0xf3, 0xfb, 0x08, 0xeb, 0x18, 0x10, 0xe3, 0xcb, 0x38, 0x30, 0xc3, 0x20, 0xd3, 0xdb, 0x28 },
+               { 0x00, 0x8b, 0x0b, 0x80, 0x16, 0x9d, 0x1d, 0x96, 0x2c, 0xa7, 0x27, 0xac, 0x3a, 0xb1, 0x31, 0xba },
+       },
+       {
+               { 0x00, 0xf4, 0xf5, 0x01, 0xf7, 0x03, 0x02, 0xf6, 0xf3, 0x07, 0x06, 0xf2, 0x04, 0xf0, 0xf1, 0x05 },
+               { 0x00, 0xfb, 0xeb, 0x10, 0xcb, 0x30, 0x20, 0xdb, 0x8b, 0x70, 0x60, 0x9b, 0x40, 0xbb, 0xab, 0x50 },
+       },
+       {
+               { 0x00, 0xf5, 0xf7, 0x02, 0xf3, 0x06, 0x04, 0xf1, 0xfb, 0x0e, 0x0c, 0xf9, 0x08, 0xfd, 0xff, 0x0a },
+               { 0x00, 0xeb, 0xcb, 0x20, 0x8b, 0x60, 0x40, 0xab, 0x0b, 0xe0, 0xc0, 0x2b, 0x80, 0x6b, 0x4b, 0xa0 },
+       },
+       {
+               { 0x00, 0xf6, 0xf1, 0x07, 0xff, 0x09, 0x0e, 0xf8, 0xe3, 0x15, 0x12, 0xe4, 0x1c, 0xea, 0xed, 0x1b },
+               { 0x00, 0xdb, 0xab, 0x70, 0x4b, 0x90, 0xe0, 0x3b, 0x96, 0x4d, 0x3d, 0xe6, 0xdd, 0x06, 0x76, 0xad },
+       },
+       {
+               { 0x00, 0xf7, 0xf3, 0x04, 0xfb, 0x0c, 0x08, 0xff, 0xeb, 0x1c, 0x18, 0xef, 0x10, 0xe7, 0xe3, 0x14 },
+               { 0x00, 0xcb, 0x8b, 0x40, 0x0b, 0xc0, 0x80, 0x4b, 0x16, 0xdd, 0x9d, 0x56, 0x1d, 0xd6, 0x96, 0x5d },
+       },
+       {
+               { 0x00, 0xf8, 0xed, 0x15, 0xc7, 0x3f, 0x2a, 0xd2, 0x93, 0x6b, 0x7e, 0x86, 0x54, 0xac, 0xb9, 0x41 },
+               { 0x00, 0x3b, 0x76, 0x4d, 0xec, 0xd7, 0x9a, 0xa1, 0xc5, 0xfe, 0xb3, 0x88, 0x29, 0x12, 0x5f, 0x64 },
+       },
+       {
+               { 0x00, 0xf9, 0xef, 0x16, 0xc3, 0x3a, 0x2c, 0xd5, 0x9b, 0x62, 0x74, 0x8d, 0x58, 0xa1, 0xb7, 0x4e },
+               { 0x00, 0x2b, 0x56, 0x7d, 0xac, 0x87, 0xfa, 0xd1, 0x45, 0x6e, 0x13, 0x38, 0xe9, 0xc2, 0xbf, 0x94 },
+       },
+       {
+               { 0x00, 0xfa, 0xe9, 0x13, 0xcf, 0x35, 0x26, 0xdc, 0x83, 0x79, 0x6a, 0x90, 0x4c, 0xb6, 0xa5, 0x5f },
+               { 0x00, 0x1b, 0x36, 0x2d, 0x6c, 0x77, 0x5a, 0x41, 0xd8, 0xc3, 0xee, 0xf5, 0xb4, 0xaf, 0x82, 0x99 },
+       },
+       {
+               { 0x00, 0xfb, 0xeb, 0x10, 0xcb, 0x30, 0x20, 0xdb, 0x8b, 0x70, 0x60, 0x9b, 0x40, 0xbb, 0xab, 0x50 },
+               { 0x00, 0x0b, 0x16, 0x1d, 0x2c, 0x27, 0x3a, 0x31, 0x58, 0x53, 0x4e, 0x45, 0x74, 0x7f, 0x62, 0x69 },
+       },
+       {
+               { 0x00, 0xfc, 0xe5, 0x19, 0xd7, 0x2b, 0x32, 0xce, 0xb3, 0x4f, 0x56, 0xaa, 0x64, 0x98, 0x81, 0x7d },
+               { 0x00, 0x7b, 0xf6, 0x8d, 0xf1, 0x8a, 0x07, 0x7c, 0xff, 0x84, 0x09, 0x72, 0x0e, 0x75, 0xf8, 0x83 },
+       },
+       {
+               { 0x00, 0xfd, 0xe7, 0x1a, 0xd3, 0x2e, 0x34, 0xc9, 0xbb, 0x46, 0x5c, 0xa1, 0x68, 0x95, 0x8f, 0x72 },
+               { 0x00, 0x6b, 0xd6, 0xbd, 0xb1, 0xda, 0x67, 0x0c, 0x7f, 0x14, 0xa9, 0xc2, 0xce, 0xa5, 0x18, 0x73 },
+       },
+       {
+               { 0x00, 0xfe, 0xe1, 0x1f, 0xdf, 0x21, 0x3e, 0xc0, 0xa3, 0x5d, 0x42, 0xbc, 0x7c, 0x82, 0x9d, 0x63 },
+               { 0x00, 0x5b, 0xb6, 0xed, 0x71, 0x2a, 0xc7, 0x9c, 0xe2, 0xb9, 0x54, 0x0f, 0x93, 0xc8, 0x25, 0x7e },
+       },
+       {
+               { 0x00, 0xff, 0xe3, 0x1c, 0xdb, 0x24, 0x38, 0xc7, 0xab, 0x54, 0x48, 0xb7, 0x70, 0x8f, 0x93, 0x6c },
+               { 0x00, 0x4b, 0x96, 0xdd, 0x31, 0x7a, 0xa7, 0xec, 0x62, 0x29, 0xf4, 0xbf, 0x53, 0x18, 0xc5, 0x8e },
+       },
+};
+#endif
+

diff --git a/raid/tag.c b/raid/tag.c
new file mode 100644 (file)
index 0000000..bfeefaa
--- /dev/null
+++ b/raid/tag.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+
+static struct raid_func {
+       const char *name;
+       void (*p)();
+} RAID_FUNC[] = {
+       { "int8", raid_gen3_int8 },
+       { "int8", raid_gen4_int8 },
+       { "int8", raid_gen5_int8 },
+       { "int8", raid_gen6_int8 },
+       { "int32", raid_gen1_int32 },
+       { "int64", raid_gen1_int64 },
+       { "int32", raid_gen2_int32 },
+       { "int64", raid_gen2_int64 },
+       { "int32", raid_genz_int32 },
+       { "int64", raid_genz_int64 },
+       { "int8", raid_rec1_int8 },
+       { "int8", raid_rec2_int8 },
+       { "int8", raid_recX_int8 },
+
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSE2
+       { "sse2", raid_gen1_sse2 },
+       { "sse2", raid_gen2_sse2 },
+       { "sse2", raid_genz_sse2 },
+#endif
+#ifdef CONFIG_SSSE3
+       { "ssse3", raid_gen3_ssse3 },
+       { "ssse3", raid_gen4_ssse3 },
+       { "ssse3", raid_gen5_ssse3 },
+       { "ssse3", raid_gen6_ssse3 },
+       { "ssse3", raid_rec1_ssse3 },
+       { "ssse3", raid_rec2_ssse3 },
+       { "ssse3", raid_recX_ssse3 },
+#endif
+#ifdef CONFIG_AVX2
+       { "avx2", raid_gen1_avx2 },
+       { "avx2", raid_gen2_avx2 },
+       { "avx2", raid_rec1_avx2 },
+       { "avx2", raid_rec2_avx2 },
+       { "avx2", raid_recX_avx2 },
+#endif
+#endif
+
+#ifdef CONFIG_X86_64
+#ifdef CONFIG_SSE2
+       { "sse2e", raid_gen2_sse2ext },
+       { "sse2e", raid_genz_sse2ext },
+#endif
+#ifdef CONFIG_SSSE3
+       { "ssse3e", raid_gen3_ssse3ext },
+       { "ssse3e", raid_gen4_ssse3ext },
+       { "ssse3e", raid_gen5_ssse3ext },
+       { "ssse3e", raid_gen6_ssse3ext },
+#endif
+#ifdef CONFIG_AVX2
+       { "avx2e", raid_gen3_avx2ext },
+       { "avx2e", raid_genz_avx2ext },
+       { "avx2e", raid_gen4_avx2ext },
+       { "avx2e", raid_gen5_avx2ext },
+       { "avx2e", raid_gen6_avx2ext },
+#endif
+#endif
+       { 0, 0 }
+};
+
+static const char *raid_tag(void (*func)())
+{
+       struct raid_func *i = RAID_FUNC;
+
+       while (i->name != 0) {
+               if (i->p == func)
+                       return i->name;
+               ++i;
+       }
+
+       /* LCOV_EXCL_START */
+       return "unknown";
+       /* LCOV_EXCL_STOP */
+}
+
+const char *raid_gen1_tag(void)
+{
+       return raid_tag(raid_gen_ptr[0]);
+}
+
+const char *raid_gen2_tag(void)
+{
+       return raid_tag(raid_gen_ptr[1]);
+}
+
+const char *raid_genz_tag(void)
+{
+       return raid_tag(raid_genz_ptr);
+}
+
+const char *raid_gen3_tag(void)
+{
+       return raid_tag(raid_gen_ptr[2]);
+}
+
+const char *raid_gen4_tag(void)
+{
+       return raid_tag(raid_gen_ptr[3]);
+}
+
+const char *raid_gen5_tag(void)
+{
+       return raid_tag(raid_gen_ptr[4]);
+}
+
+const char *raid_gen6_tag(void)
+{
+       return raid_tag(raid_gen_ptr[5]);
+}
+
+const char *raid_rec1_tag(void)
+{
+       return raid_tag(raid_rec_ptr[0]);
+}
+
+const char *raid_rec2_tag(void)
+{
+       return raid_tag(raid_rec_ptr[1]);
+}
+
+const char *raid_recX_tag(void)
+{
+       return raid_tag(raid_rec_ptr[2]);
+}
+

diff --git a/raid/test.c b/raid/test.c
new file mode 100644 (file)
index 0000000..feb8a41
--- /dev/null
+++ b/raid/test.c
@@ -0,0 +1,452 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "cpu.h"
+#include "combo.h"
+#include "memory.h"
+
+/**
+ * Binomial coefficient of n over r.
+ */
+static int ibc(int n, int r)
+{
+       if (r == 0 || n == r)
+               return 1;
+       else
+               return ibc(n - 1, r - 1) + ibc(n - 1, r);
+}
+
+/**
+ * Power n ^ r;
+ */
+static int ipow(int n, int r)
+{
+       int v = 1;
+
+       while (r) {
+               v *= n;
+               --r;
+       }
+       return v;
+}
+
+int raid_test_combo(void)
+{
+       int r;
+       int count;
+       int p[RAID_PARITY_MAX];
+
+       for (r = 1; r <= RAID_PARITY_MAX; ++r) {
+               /* count combination (r of RAID_PARITY_MAX) elements */
+               count = 0;
+               combination_first(r, RAID_PARITY_MAX, p);
+
+               do {
+                       ++count;
+               } while (combination_next(r, RAID_PARITY_MAX, p));
+
+               if (count != ibc(RAID_PARITY_MAX, r)) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       for (r = 1; r <= RAID_PARITY_MAX; ++r) {
+               /* count permutation (r of RAID_PARITY_MAX) elements */
+               count = 0;
+               permutation_first(r, RAID_PARITY_MAX, p);
+
+               do {
+                       ++count;
+               } while (permutation_next(r, RAID_PARITY_MAX, p));
+
+               if (count != ipow(RAID_PARITY_MAX, r)) {
+                       /* LCOV_EXCL_START */
+                       return -1;
+                       /* LCOV_EXCL_STOP */
+               }
+       }
+
+       return 0;
+}
+
+int raid_test_insert(void)
+{
+       int p[RAID_PARITY_MAX];
+       int r;
+
+       for (r = 1; r <= RAID_PARITY_MAX; ++r) {
+               permutation_first(r, RAID_PARITY_MAX, p);
+               do {
+                       int i[RAID_PARITY_MAX];
+                       int j;
+
+                       /* insert in order */
+                       for (j = 0; j < r; ++j)
+                               raid_insert(j, i, p[j]);
+
+                       /* check order */
+                       for (j = 1; j < r; ++j) {
+                               if (i[j - 1] > i[j]) {
+                                       /* LCOV_EXCL_START */
+                                       return -1;
+                                       /* LCOV_EXCL_STOP */
+                               }
+                       }
+               } while (permutation_next(r, RAID_PARITY_MAX, p));
+       }
+
+       return 0;
+}
+
+int raid_test_sort(void)
+{
+       int p[RAID_PARITY_MAX];
+       int r;
+
+       for (r = 1; r <= RAID_PARITY_MAX; ++r) {
+               permutation_first(r, RAID_PARITY_MAX, p);
+               do {
+                       int i[RAID_PARITY_MAX];
+                       int j;
+
+                       /* make a copy */
+                       for (j = 0; j < r; ++j)
+                               i[j] = p[j];
+
+                       raid_sort(r, i);
+
+                       /* check order */
+                       for (j = 1; j < r; ++j) {
+                               if (i[j - 1] > i[j]) {
+                                       /* LCOV_EXCL_START */
+                                       return -1;
+                                       /* LCOV_EXCL_STOP */
+                               }
+                       }
+               } while (permutation_next(r, RAID_PARITY_MAX, p));
+       }
+
+       return 0;
+}
+
+int raid_test_rec(int mode, int nd, size_t size)
+{
+       void (*f[RAID_PARITY_MAX][4])(
+               int nr, int *id, int *ip, int nd, size_t size, void **vbuf);
+       void *v_alloc;
+       void **v;
+       void **data;
+       void **parity;
+       void **test;
+       void *data_save[RAID_PARITY_MAX];
+       void *parity_save[RAID_PARITY_MAX];
+       void *waste;
+       int nv;
+       int id[RAID_PARITY_MAX];
+       int ip[RAID_PARITY_MAX];
+       int i;
+       int j;
+       int nr;
+       int nf[RAID_PARITY_MAX];
+       int np;
+
+       raid_mode(mode);
+       if (mode == RAID_MODE_CAUCHY)
+               np = RAID_PARITY_MAX;
+       else
+               np = 3;
+
+       nv = nd + np * 2 + 2;
+
+       v = raid_malloc_vector(nd, nv, size, &v_alloc);
+       if (!v) {
+               /* LCOV_EXCL_START */
+               return -1;
+               /* LCOV_EXCL_STOP */
+       }
+
+       data = v;
+       parity = v + nd;
+       test = v + nd + np;
+
+       for (i = 0; i < np; ++i)
+               parity_save[i] = parity[i];
+
+       memset(v[nv - 2], 0, size);
+       raid_zero(v[nv - 2]);
+
+       waste = v[nv - 1];
+
+       /* fill with pseudo-random data with the arbitrary seed "1" */
+       raid_mrand_vector(1, nd, size, v);
+
+       /* setup recov functions */
+       for (i = 0; i < np; ++i) {
+               nf[i] = 0;
+               if (i == 0) {
+                       f[i][nf[i]++] = raid_rec1_int8;
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSSE3
+                       if (raid_cpu_has_ssse3())
+                               f[i][nf[i]++] = raid_rec1_ssse3;
+#endif
+#ifdef CONFIG_AVX2
+                       if (raid_cpu_has_avx2())
+                               f[i][nf[i]++] = raid_rec1_avx2;
+#endif
+#endif
+               } else if (i == 1) {
+                       f[i][nf[i]++] = raid_rec2_int8;
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSSE3
+                       if (raid_cpu_has_ssse3())
+                               f[i][nf[i]++] = raid_rec2_ssse3;
+#endif
+#ifdef CONFIG_AVX2
+                       if (raid_cpu_has_avx2())
+                               f[i][nf[i]++] = raid_rec2_avx2;
+#endif
+#endif
+               } else {
+                       f[i][nf[i]++] = raid_recX_int8;
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSSE3
+                       if (raid_cpu_has_ssse3())
+                               f[i][nf[i]++] = raid_recX_ssse3;
+#endif
+#ifdef CONFIG_AVX2
+                       if (raid_cpu_has_avx2())
+                               f[i][nf[i]++] = raid_recX_avx2;
+#endif
+#endif
+               }
+       }
+
+       /* compute the parity */
+       raid_gen_ref(nd, np, size, v);
+
+       /* set all the parity to the waste v */
+       for (i = 0; i < np; ++i)
+               parity[i] = waste;
+
+       /* all parity levels */
+       for (nr = 1; nr <= np; ++nr) {
+               /* all combinations (nr of nd) disks */
+               combination_first(nr, nd, id);
+               do {
+                       /* all combinations (nr of np) parities */
+                       combination_first(nr, np, ip);
+                       do {
+                               /* for each recover function */
+                               for (j = 0; j < nf[nr - 1]; ++j) {
+                                       /* set */
+                                       for (i = 0; i < nr; ++i) {
+                                               /* remove the missing data */
+                                               data_save[i] = data[id[i]];
+                                               data[id[i]] = test[i];
+                                               /* set the parity to use */
+                                               parity[ip[i]] = parity_save[ip[i]];
+                                       }
+
+                                       /* recover */
+                                       f[nr - 1][j](nr, id, ip, nd, size, v);
+
+                                       /* check */
+                                       for (i = 0; i < nr; ++i) {
+                                               if (memcmp(test[i], data_save[i], size) != 0) {
+                                                       /* LCOV_EXCL_START */
+                                                       goto bail;
+                                                       /* LCOV_EXCL_STOP */
+                                               }
+                                       }
+
+                                       /* restore */
+                                       for (i = 0; i < nr; ++i) {
+                                               /* restore the data */
+                                               data[id[i]] = data_save[i];
+                                               /* restore the parity */
+                                               parity[ip[i]] = waste;
+                                       }
+                               }
+                       } while (combination_next(nr, np, ip));
+               } while (combination_next(nr, nd, id));
+       }
+
+       free(v_alloc);
+       free(v);
+       return 0;
+
+bail:
+       /* LCOV_EXCL_START */
+       free(v_alloc);
+       free(v);
+       return -1;
+       /* LCOV_EXCL_STOP */
+}
+
+int raid_test_par(int mode, int nd, size_t size)
+{
+       void (*f[64])(int nd, size_t size, void **vbuf);
+       void *v_alloc;
+       void **v;
+       int nv;
+       int i, j;
+       int nf;
+       int np;
+
+       raid_mode(mode);
+       if (mode == RAID_MODE_CAUCHY)
+               np = RAID_PARITY_MAX;
+       else
+               np = 3;
+
+       nv = nd + np * 2;
+
+       v = raid_malloc_vector(nd, nv, size, &v_alloc);
+       if (!v) {
+               /* LCOV_EXCL_START */
+               return -1;
+               /* LCOV_EXCL_STOP */
+       }
+
+       /* check memory */
+       if (raid_mtest_vector(nv, size, v) != 0) {
+               /* LCOV_EXCL_START */
+               goto bail;
+               /* LCOV_EXCL_STOP */
+       }
+
+       /* fill with pseudo-random data with the arbitrary seed "2" */
+       raid_mrand_vector(2, nv, size, v);
+
+       /* compute the parity */
+       raid_gen_ref(nd, np, size, v);
+
+       /* copy in back buffers */
+       for (i = 0; i < np; ++i)
+               memcpy(v[nd + np + i], v[nd + i], size);
+
+       /* load all the available functions */
+       nf = 0;
+
+       f[nf++] = raid_gen1_int32;
+       f[nf++] = raid_gen1_int64;
+       f[nf++] = raid_gen2_int32;
+       f[nf++] = raid_gen2_int64;
+
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSE2
+       if (raid_cpu_has_sse2()) {
+               f[nf++] = raid_gen1_sse2;
+               f[nf++] = raid_gen2_sse2;
+#ifdef CONFIG_X86_64
+               f[nf++] = raid_gen2_sse2ext;
+#endif
+       }
+#endif
+
+#ifdef CONFIG_AVX2
+       if (raid_cpu_has_avx2()) {
+               f[nf++] = raid_gen1_avx2;
+               f[nf++] = raid_gen2_avx2;
+       }
+#endif
+#endif /* CONFIG_X86 */
+
+       if (mode == RAID_MODE_CAUCHY) {
+               f[nf++] = raid_gen3_int8;
+               f[nf++] = raid_gen4_int8;
+               f[nf++] = raid_gen5_int8;
+               f[nf++] = raid_gen6_int8;
+
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSSE3
+               if (raid_cpu_has_ssse3()) {
+                       f[nf++] = raid_gen3_ssse3;
+                       f[nf++] = raid_gen4_ssse3;
+                       f[nf++] = raid_gen5_ssse3;
+                       f[nf++] = raid_gen6_ssse3;
+#ifdef CONFIG_X86_64
+                       f[nf++] = raid_gen3_ssse3ext;
+                       f[nf++] = raid_gen4_ssse3ext;
+                       f[nf++] = raid_gen5_ssse3ext;
+                       f[nf++] = raid_gen6_ssse3ext;
+#endif
+               }
+#endif
+
+#ifdef CONFIG_AVX2
+#ifdef CONFIG_X86_64
+               if (raid_cpu_has_avx2()) {
+                       f[nf++] = raid_gen3_avx2ext;
+                       f[nf++] = raid_gen4_avx2ext;
+                       f[nf++] = raid_gen5_avx2ext;
+                       f[nf++] = raid_gen6_avx2ext;
+               }
+#endif
+#endif
+#endif /* CONFIG_X86 */
+       } else {
+               f[nf++] = raid_genz_int32;
+               f[nf++] = raid_genz_int64;
+
+#ifdef CONFIG_X86
+#ifdef CONFIG_SSE2
+               if (raid_cpu_has_sse2()) {
+                       f[nf++] = raid_genz_sse2;
+#ifdef CONFIG_X86_64
+                       f[nf++] = raid_genz_sse2ext;
+#endif
+               }
+#endif
+
+#ifdef CONFIG_AVX2
+#ifdef CONFIG_X86_64
+               if (raid_cpu_has_avx2())
+                       f[nf++] = raid_genz_avx2ext;
+#endif
+#endif
+#endif /* CONFIG_X86 */
+       }
+
+       /* check all the functions */
+       for (j = 0; j < nf; ++j) {
+               /* compute parity */
+               f[j](nd, size, v);
+
+               /* check it */
+               for (i = 0; i < np; ++i) {
+                       if (memcmp(v[nd + np + i], v[nd + i], size) != 0) {
+                               /* LCOV_EXCL_START */
+                               goto bail;
+                               /* LCOV_EXCL_STOP */
+                       }
+               }
+       }
+
+       free(v_alloc);
+       free(v);
+       return 0;
+
+bail:
+       /* LCOV_EXCL_START */
+       free(v_alloc);
+       free(v);
+       return -1;
+       /* LCOV_EXCL_STOP */
+}
+

diff --git a/raid/test.h b/raid/test.h
new file mode 100644 (file)
index 0000000..6d902c7
--- /dev/null
+++ b/raid/test.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __RAID_TEST_H
+#define __RAID_TEST_H
+
+/**
+ * Tests insertion function.
+ *
+ * Test raid_insert() with all the possible combinations of elements to insert.
+ *
+ * Returns 0 on success.
+ */
+int raid_test_insert(void);
+
+/**
+ * Tests sorting function.
+ *
+ * Test raid_sort() with all the possible combinations of elements to sort.
+ *
+ * Returns 0 on success.
+ */
+int raid_test_sort(void);
+
+/**
+ * Tests combination functions.
+ *
+ * Tests combination_first() and combination_next() for all the parity levels.
+ *
+ * Returns 0 on success.
+ */
+int raid_test_combo(void);
+
+/**
+ * Tests recovering functions.
+ *
+ * All the recovering functions are tested with all the combinations
+ * of failing disks and recovering parities.
+ *
+ * Take care that the test time grows exponentially with the number of disks.
+ *
+ * Returns 0 on success.
+ */
+int raid_test_rec(unsigned mode, int nd, size_t size);
+
+/**
+ * Tests parity generation functions.
+ *
+ * All the parity generation functions are tested with the specified
+ * number of disks.
+ *
+ * Returns 0 on success.
+ */
+int raid_test_par(unsigned mode, int nd, size_t size);
+
+#endif
+

diff --git a/raid/x86.c b/raid/x86.c
new file mode 100644 (file)
index 0000000..84b12c1
--- /dev/null
+++ b/raid/x86.c
@@ -0,0 +1,2452 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+#include "gf.h"
+
+/*
+ * For x86 optimizations you can see:
+ *
+ * Software optimization resources
+ * http://www.agner.org/optimize/
+ *
+ * x86, x64 Instruction Latency, Memory Latency and CPUID dumps
+ * http://users.atw.hu/instlatx64/
+ */
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
+/*
+ * GEN1 (RAID5 with xor) SSE2 implementation
+ *
+ * Intentionally don't process more than 64 bytes because 64 is the typical
+ * cache block, and processing 128 bytes doesn't increase performance, and in
+ * some cases it even decreases it.
+ */
+void raid_gen1_sse2(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+
+       raid_sse_begin();
+
+       for (i = 0; i < size; i += 64) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (v[l][i + 16]));
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (v[l][i + 32]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (v[l][i + 48]));
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("pxor %0,%%xmm0" : : "m" (v[d][i]));
+                       asm volatile ("pxor %0,%%xmm1" : : "m" (v[d][i + 16]));
+                       asm volatile ("pxor %0,%%xmm2" : : "m" (v[d][i + 32]));
+                       asm volatile ("pxor %0,%%xmm3" : : "m" (v[d][i + 48]));
+               }
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (p[i + 32]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (p[i + 48]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
+/*
+ * GEN1 (RAID5 with xor) AVX2 implementation
+ *
+ * Intentionally don't process more than 64 bytes because 64 is the typical
+ * cache block, and processing 128 bytes doesn't increase performance, and in
+ * some cases it even decreases it.
+ */
+void raid_gen1_avx2(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+
+       raid_avx_begin();
+
+       for (i = 0; i < size; i += 64) {
+               asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
+               asm volatile ("vmovdqa %0,%%ymm1" : : "m" (v[l][i + 32]));
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("vpxor %0,%%ymm0,%%ymm0" : : "m" (v[d][i]));
+                       asm volatile ("vpxor %0,%%ymm1,%%ymm1" : : "m" (v[d][i + 32]));
+               }
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
+static const struct gfconst16 {
+       uint8_t poly[16];
+       uint8_t low4[16];
+} gfconst16 __aligned(32) = {
+       {
+               0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
+               0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d
+       },
+       {
+               0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
+               0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f
+       },
+};
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
+/*
+ * GEN2 (RAID6 with powers of 2) SSE2 implementation
+ */
+void raid_gen2_sse2(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+
+       for (i = 0; i < size; i += 32) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (v[l][i + 16]));
+               asm volatile ("movdqa %xmm0,%xmm2");
+               asm volatile ("movdqa %xmm1,%xmm3");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("pxor %xmm4,%xmm4");
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pcmpgtb %xmm2,%xmm4");
+                       asm volatile ("pcmpgtb %xmm3,%xmm5");
+                       asm volatile ("paddb %xmm2,%xmm2");
+                       asm volatile ("paddb %xmm3,%xmm3");
+                       asm volatile ("pand %xmm7,%xmm4");
+                       asm volatile ("pand %xmm7,%xmm5");
+                       asm volatile ("pxor %xmm4,%xmm2");
+                       asm volatile ("pxor %xmm5,%xmm3");
+
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm5" : : "m" (v[d][i + 16]));
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm5,%xmm1");
+                       asm volatile ("pxor %xmm4,%xmm2");
+                       asm volatile ("pxor %xmm5,%xmm3");
+               }
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (q[i + 16]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
+/*
+ * GEN2 (RAID6 with powers of 2) AVX2 implementation
+ */
+void raid_gen2_avx2(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+
+       raid_avx_begin();
+
+       asm volatile ("vbroadcasti128 %0, %%ymm7" : : "m" (gfconst16.poly[0]));
+       asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
+
+       for (i = 0; i < size; i += 64) {
+               asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
+               asm volatile ("vmovdqa %0,%%ymm1" : : "m" (v[l][i + 32]));
+               asm volatile ("vmovdqa %ymm0,%ymm2");
+               asm volatile ("vmovdqa %ymm1,%ymm3");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("vpcmpgtb %ymm2,%ymm6,%ymm4");
+                       asm volatile ("vpcmpgtb %ymm3,%ymm6,%ymm5");
+                       asm volatile ("vpaddb %ymm2,%ymm2,%ymm2");
+                       asm volatile ("vpaddb %ymm3,%ymm3,%ymm3");
+                       asm volatile ("vpand %ymm7,%ymm4,%ymm4");
+                       asm volatile ("vpand %ymm7,%ymm5,%ymm5");
+                       asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
+                       asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
+
+                       asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
+                       asm volatile ("vmovdqa %0,%%ymm5" : : "m" (v[d][i + 32]));
+                       asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
+                       asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
+               }
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm3,%0" : "=m" (q[i + 32]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
+/*
+ * GEN2 (RAID6 with powers of 2) SSE2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen2_sse2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.poly[0]));
+
+       for (i = 0; i < size; i += 64) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (v[l][i + 16]));
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (v[l][i + 32]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (v[l][i + 48]));
+               asm volatile ("movdqa %xmm0,%xmm4");
+               asm volatile ("movdqa %xmm1,%xmm5");
+               asm volatile ("movdqa %xmm2,%xmm6");
+               asm volatile ("movdqa %xmm3,%xmm7");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("pxor %xmm8,%xmm8");
+                       asm volatile ("pxor %xmm9,%xmm9");
+                       asm volatile ("pxor %xmm10,%xmm10");
+                       asm volatile ("pxor %xmm11,%xmm11");
+                       asm volatile ("pcmpgtb %xmm4,%xmm8");
+                       asm volatile ("pcmpgtb %xmm5,%xmm9");
+                       asm volatile ("pcmpgtb %xmm6,%xmm10");
+                       asm volatile ("pcmpgtb %xmm7,%xmm11");
+                       asm volatile ("paddb %xmm4,%xmm4");
+                       asm volatile ("paddb %xmm5,%xmm5");
+                       asm volatile ("paddb %xmm6,%xmm6");
+                       asm volatile ("paddb %xmm7,%xmm7");
+                       asm volatile ("pand %xmm15,%xmm8");
+                       asm volatile ("pand %xmm15,%xmm9");
+                       asm volatile ("pand %xmm15,%xmm10");
+                       asm volatile ("pand %xmm15,%xmm11");
+                       asm volatile ("pxor %xmm8,%xmm4");
+                       asm volatile ("pxor %xmm9,%xmm5");
+                       asm volatile ("pxor %xmm10,%xmm6");
+                       asm volatile ("pxor %xmm11,%xmm7");
+
+                       asm volatile ("movdqa %0,%%xmm8" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm9" : : "m" (v[d][i + 16]));
+                       asm volatile ("movdqa %0,%%xmm10" : : "m" (v[d][i + 32]));
+                       asm volatile ("movdqa %0,%%xmm11" : : "m" (v[d][i + 48]));
+                       asm volatile ("pxor %xmm8,%xmm0");
+                       asm volatile ("pxor %xmm9,%xmm1");
+                       asm volatile ("pxor %xmm10,%xmm2");
+                       asm volatile ("pxor %xmm11,%xmm3");
+                       asm volatile ("pxor %xmm8,%xmm4");
+                       asm volatile ("pxor %xmm9,%xmm5");
+                       asm volatile ("pxor %xmm10,%xmm6");
+                       asm volatile ("pxor %xmm11,%xmm7");
+               }
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (p[i + 32]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (p[i + 48]));
+               asm volatile ("movntdq %%xmm4,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm5,%0" : "=m" (q[i + 16]));
+               asm volatile ("movntdq %%xmm6,%0" : "=m" (q[i + 32]));
+               asm volatile ("movntdq %%xmm7,%0" : "=m" (q[i + 48]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
+ */
+void raid_gen3_ssse3(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 3; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("movdqa %0,%%xmm3" : : "m" (gfconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %xmm4,%xmm0");
+               asm volatile ("movdqa %xmm4,%xmm1");
+
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm6");
+               asm volatile ("pxor   %xmm6,%xmm2");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pcmpgtb %xmm1,%xmm5");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("pand %xmm3,%xmm5");
+                       asm volatile ("pxor %xmm5,%xmm1");
+
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("pand   %xmm7,%xmm4");
+                       asm volatile ("pand   %xmm7,%xmm5");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm5,%xmm6");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+
+               asm volatile ("pxor %xmm5,%xmm5");
+               asm volatile ("pcmpgtb %xmm1,%xmm5");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("pand %xmm3,%xmm5");
+               asm volatile ("pxor %xmm5,%xmm1");
+
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
+/*
+ * GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen3_ssse3ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 3; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("movdqa %0,%%xmm3" : : "m" (gfconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm11" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 32) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm12" : : "m" (v[l][i + 16]));
+
+               asm volatile ("movdqa %xmm4,%xmm0");
+               asm volatile ("movdqa %xmm4,%xmm1");
+               asm volatile ("movdqa %xmm12,%xmm8");
+               asm volatile ("movdqa %xmm12,%xmm9");
+
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("movdqa %xmm12,%xmm13");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm13");
+               asm volatile ("pand   %xmm11,%xmm4");
+               asm volatile ("pand   %xmm11,%xmm12");
+               asm volatile ("pand   %xmm11,%xmm5");
+               asm volatile ("pand   %xmm11,%xmm13");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("movdqa %xmm2,%xmm10");
+               asm volatile ("movdqa %xmm7,%xmm15");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm12,%xmm10");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pshufb %xmm13,%xmm15");
+               asm volatile ("pxor   %xmm7,%xmm2");
+               asm volatile ("pxor   %xmm15,%xmm10");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (v[d][i + 16]));
+
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pxor %xmm13,%xmm13");
+                       asm volatile ("pcmpgtb %xmm1,%xmm5");
+                       asm volatile ("pcmpgtb %xmm9,%xmm13");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("paddb %xmm9,%xmm9");
+                       asm volatile ("pand %xmm3,%xmm5");
+                       asm volatile ("pand %xmm3,%xmm13");
+                       asm volatile ("pxor %xmm5,%xmm1");
+                       asm volatile ("pxor %xmm13,%xmm9");
+
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+                       asm volatile ("pxor %xmm12,%xmm8");
+                       asm volatile ("pxor %xmm12,%xmm9");
+
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("movdqa %xmm12,%xmm13");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm13");
+                       asm volatile ("pand   %xmm11,%xmm4");
+                       asm volatile ("pand   %xmm11,%xmm12");
+                       asm volatile ("pand   %xmm11,%xmm5");
+                       asm volatile ("pand   %xmm11,%xmm13");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("movdqa %xmm6,%xmm14");
+                       asm volatile ("movdqa %xmm7,%xmm15");
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm12,%xmm14");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pshufb %xmm13,%xmm15");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("pxor   %xmm14,%xmm10");
+                       asm volatile ("pxor   %xmm7,%xmm2");
+                       asm volatile ("pxor   %xmm15,%xmm10");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+               asm volatile ("movdqa %0,%%xmm12" : : "m" (v[0][i + 16]));
+
+               asm volatile ("pxor %xmm5,%xmm5");
+               asm volatile ("pxor %xmm13,%xmm13");
+               asm volatile ("pcmpgtb %xmm1,%xmm5");
+               asm volatile ("pcmpgtb %xmm9,%xmm13");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("paddb %xmm9,%xmm9");
+               asm volatile ("pand %xmm3,%xmm5");
+               asm volatile ("pand %xmm3,%xmm13");
+               asm volatile ("pxor %xmm5,%xmm1");
+               asm volatile ("pxor %xmm13,%xmm9");
+
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+               asm volatile ("pxor %xmm12,%xmm8");
+               asm volatile ("pxor %xmm12,%xmm9");
+               asm volatile ("pxor %xmm12,%xmm10");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm8,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm9,%0" : "=m" (q[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
+/*
+ * GEN3 (triple parity with Cauchy matrix) AVX2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen3_avx2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 3; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_avx_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("vbroadcasti128 %0, %%ymm3" : : "m" (gfconst16.poly[0]));
+       asm volatile ("vbroadcasti128 %0, %%ymm11" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 64) {
+               /* last disk without the by two multiplication */
+               asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
+               asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[l][i + 32]));
+
+               asm volatile ("vmovdqa %ymm4,%ymm0");
+               asm volatile ("vmovdqa %ymm4,%ymm1");
+               asm volatile ("vmovdqa %ymm12,%ymm8");
+               asm volatile ("vmovdqa %ymm12,%ymm9");
+
+               asm volatile ("vpsrlw  $4,%ymm4,%ymm5");
+               asm volatile ("vpsrlw  $4,%ymm12,%ymm13");
+               asm volatile ("vpand   %ymm11,%ymm4,%ymm4");
+               asm volatile ("vpand   %ymm11,%ymm12,%ymm12");
+               asm volatile ("vpand   %ymm11,%ymm5,%ymm5");
+               asm volatile ("vpand   %ymm11,%ymm13,%ymm13");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("vpshufb %ymm4,%ymm10,%ymm2");
+               asm volatile ("vpshufb %ymm12,%ymm10,%ymm10");
+               asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+               asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+               asm volatile ("vpxor   %ymm7,%ymm2,%ymm2");
+               asm volatile ("vpxor   %ymm15,%ymm10,%ymm10");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
+                       asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
+
+                       asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
+                       asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
+                       asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
+                       asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
+                       asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+                       asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
+                       asm volatile ("vpand %ymm3,%ymm5,%ymm5");
+                       asm volatile ("vpand %ymm3,%ymm13,%ymm13");
+                       asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
+
+                       asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
+                       asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+
+                       asm volatile ("vpsrlw  $4,%ymm4,%ymm5");
+                       asm volatile ("vpsrlw  $4,%ymm12,%ymm13");
+                       asm volatile ("vpand   %ymm11,%ymm4,%ymm4");
+                       asm volatile ("vpand   %ymm11,%ymm12,%ymm12");
+                       asm volatile ("vpand   %ymm11,%ymm5,%ymm5");
+                       asm volatile ("vpand   %ymm11,%ymm13,%ymm13");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
+                       asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+                       asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+                       asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+                       asm volatile ("vpxor   %ymm6,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm14,%ymm10,%ymm10");
+                       asm volatile ("vpxor   %ymm7,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm15,%ymm10,%ymm10");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
+               asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[0][i + 32]));
+
+               asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
+               asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
+               asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
+               asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
+               asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+               asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
+               asm volatile ("vpand %ymm3,%ymm5,%ymm5");
+               asm volatile ("vpand %ymm3,%ymm13,%ymm13");
+               asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
+
+               asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+               asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
+               asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+               asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
+
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
+               asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
+ */
+void raid_gen4_ssse3(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 4; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %xmm4,%xmm0");
+               asm volatile ("movdqa %xmm4,%xmm1");
+
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm2");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm3");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm3");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pcmpgtb %xmm1,%xmm5");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("pand %xmm7,%xmm5");
+                       asm volatile ("pxor %xmm5,%xmm1");
+
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("pand   %xmm7,%xmm4");
+                       asm volatile ("pand   %xmm7,%xmm5");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("pxor   %xmm7,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm3");
+                       asm volatile ("pxor   %xmm7,%xmm3");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+
+               asm volatile ("pxor %xmm5,%xmm5");
+               asm volatile ("pcmpgtb %xmm1,%xmm5");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("pand %xmm7,%xmm5");
+               asm volatile ("pxor %xmm5,%xmm1");
+
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+               asm volatile ("pxor %xmm4,%xmm3");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (s[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
+/*
+ * GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 4; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       for (i = 0; i < size; i += 32) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0]));
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm12" : : "m" (v[l][i + 16]));
+
+               asm volatile ("movdqa %xmm4,%xmm0");
+               asm volatile ("movdqa %xmm4,%xmm1");
+               asm volatile ("movdqa %xmm12,%xmm8");
+               asm volatile ("movdqa %xmm12,%xmm9");
+
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("movdqa %xmm12,%xmm13");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm13");
+               asm volatile ("pand   %xmm15,%xmm4");
+               asm volatile ("pand   %xmm15,%xmm12");
+               asm volatile ("pand   %xmm15,%xmm5");
+               asm volatile ("pand   %xmm15,%xmm13");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("movdqa %xmm2,%xmm10");
+               asm volatile ("movdqa %xmm7,%xmm15");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm12,%xmm10");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pshufb %xmm13,%xmm15");
+               asm volatile ("pxor   %xmm7,%xmm2");
+               asm volatile ("pxor   %xmm15,%xmm10");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("movdqa %xmm3,%xmm11");
+               asm volatile ("movdqa %xmm7,%xmm15");
+               asm volatile ("pshufb %xmm4,%xmm3");
+               asm volatile ("pshufb %xmm12,%xmm11");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pshufb %xmm13,%xmm15");
+               asm volatile ("pxor   %xmm7,%xmm3");
+               asm volatile ("pxor   %xmm15,%xmm11");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+                       asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0]));
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (v[d][i + 16]));
+
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pxor %xmm13,%xmm13");
+                       asm volatile ("pcmpgtb %xmm1,%xmm5");
+                       asm volatile ("pcmpgtb %xmm9,%xmm13");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("paddb %xmm9,%xmm9");
+                       asm volatile ("pand %xmm7,%xmm5");
+                       asm volatile ("pand %xmm7,%xmm13");
+                       asm volatile ("pxor %xmm5,%xmm1");
+                       asm volatile ("pxor %xmm13,%xmm9");
+
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+                       asm volatile ("pxor %xmm12,%xmm8");
+                       asm volatile ("pxor %xmm12,%xmm9");
+
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("movdqa %xmm12,%xmm13");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm13");
+                       asm volatile ("pand   %xmm15,%xmm4");
+                       asm volatile ("pand   %xmm15,%xmm12");
+                       asm volatile ("pand   %xmm15,%xmm5");
+                       asm volatile ("pand   %xmm15,%xmm13");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("movdqa %xmm6,%xmm14");
+                       asm volatile ("movdqa %xmm7,%xmm15");
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm12,%xmm14");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pshufb %xmm13,%xmm15");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("pxor   %xmm14,%xmm10");
+                       asm volatile ("pxor   %xmm7,%xmm2");
+                       asm volatile ("pxor   %xmm15,%xmm10");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("movdqa %xmm6,%xmm14");
+                       asm volatile ("movdqa %xmm7,%xmm15");
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm12,%xmm14");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pshufb %xmm13,%xmm15");
+                       asm volatile ("pxor   %xmm6,%xmm3");
+                       asm volatile ("pxor   %xmm14,%xmm11");
+                       asm volatile ("pxor   %xmm7,%xmm3");
+                       asm volatile ("pxor   %xmm15,%xmm11");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+               asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0]));
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+               asm volatile ("movdqa %0,%%xmm12" : : "m" (v[0][i + 16]));
+
+               asm volatile ("pxor %xmm5,%xmm5");
+               asm volatile ("pxor %xmm13,%xmm13");
+               asm volatile ("pcmpgtb %xmm1,%xmm5");
+               asm volatile ("pcmpgtb %xmm9,%xmm13");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("paddb %xmm9,%xmm9");
+               asm volatile ("pand %xmm7,%xmm5");
+               asm volatile ("pand %xmm7,%xmm13");
+               asm volatile ("pxor %xmm5,%xmm1");
+               asm volatile ("pxor %xmm13,%xmm9");
+
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+               asm volatile ("pxor %xmm4,%xmm3");
+               asm volatile ("pxor %xmm12,%xmm8");
+               asm volatile ("pxor %xmm12,%xmm9");
+               asm volatile ("pxor %xmm12,%xmm10");
+               asm volatile ("pxor %xmm12,%xmm11");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm8,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm9,%0" : "=m" (q[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (s[i]));
+               asm volatile ("movntdq %%xmm11,%0" : "=m" (s[i + 16]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
+/*
+ * GEN4 (quad parity with Cauchy matrix) AVX2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen4_avx2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 4; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_avx_begin();
+
+       /* generic case with at least two data disks */
+       for (i = 0; i < size; i += 64) {
+               /* last disk without the by two multiplication */
+               asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+               asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
+               asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[l][i + 32]));
+
+               asm volatile ("vmovdqa %ymm4,%ymm0");
+               asm volatile ("vmovdqa %ymm4,%ymm1");
+               asm volatile ("vmovdqa %ymm12,%ymm8");
+               asm volatile ("vmovdqa %ymm12,%ymm9");
+
+               asm volatile ("vpsrlw  $4,%ymm4,%ymm5");
+               asm volatile ("vpsrlw  $4,%ymm12,%ymm13");
+               asm volatile ("vpand   %ymm15,%ymm4,%ymm4");
+               asm volatile ("vpand   %ymm15,%ymm12,%ymm12");
+               asm volatile ("vpand   %ymm15,%ymm5,%ymm5");
+               asm volatile ("vpand   %ymm15,%ymm13,%ymm13");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("vpshufb %ymm4,%ymm10,%ymm2");
+               asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+               asm volatile ("vpshufb %ymm12,%ymm10,%ymm10");
+               asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+               asm volatile ("vpxor   %ymm7,%ymm2,%ymm2");
+               asm volatile ("vpxor   %ymm15,%ymm10,%ymm10");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("vpshufb %ymm4,%ymm11,%ymm3");
+               asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+               asm volatile ("vpshufb %ymm12,%ymm11,%ymm11");
+               asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+               asm volatile ("vpxor   %ymm7,%ymm3,%ymm3");
+               asm volatile ("vpxor   %ymm15,%ymm11,%ymm11");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.poly[0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+                       asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
+                       asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
+
+                       asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
+                       asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
+                       asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
+                       asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
+                       asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+                       asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
+                       asm volatile ("vpand %ymm7,%ymm5,%ymm5");
+                       asm volatile ("vpand %ymm7,%ymm13,%ymm13");
+                       asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
+
+                       asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
+                       asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+
+                       asm volatile ("vpsrlw  $4,%ymm4,%ymm5");
+                       asm volatile ("vpsrlw  $4,%ymm12,%ymm13");
+                       asm volatile ("vpand   %ymm15,%ymm4,%ymm4");
+                       asm volatile ("vpand   %ymm15,%ymm12,%ymm12");
+                       asm volatile ("vpand   %ymm15,%ymm5,%ymm5");
+                       asm volatile ("vpand   %ymm15,%ymm13,%ymm13");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
+                       asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+                       asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+                       asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+                       asm volatile ("vpxor   %ymm6,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm14,%ymm10,%ymm10");
+                       asm volatile ("vpxor   %ymm7,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm15,%ymm10,%ymm10");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
+                       asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
+                       asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+                       asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
+                       asm volatile ("vpxor   %ymm6,%ymm3,%ymm3");
+                       asm volatile ("vpxor   %ymm14,%ymm11,%ymm11");
+                       asm volatile ("vpxor   %ymm7,%ymm3,%ymm3");
+                       asm volatile ("vpxor   %ymm15,%ymm11,%ymm11");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.poly[0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+               asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
+               asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[0][i + 32]));
+
+               asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
+               asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
+               asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
+               asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
+               asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+               asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
+               asm volatile ("vpand %ymm7,%ymm5,%ymm5");
+               asm volatile ("vpand %ymm7,%ymm13,%ymm13");
+               asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
+
+               asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+               asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpxor %ymm4,%ymm3,%ymm3");
+               asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
+               asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+               asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
+               asm volatile ("vpxor %ymm12,%ymm11,%ymm11");
+
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
+               asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
+               asm volatile ("vmovntdq %%ymm3,%0" : "=m" (s[i]));
+               asm volatile ("vmovntdq %%ymm11,%0" : "=m" (s[i + 32]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
+ */
+void raid_gen5_ssse3(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       int d, l;
+       size_t i;
+       uint8_t buffer[16+16];
+       uint8_t *pd = __align_ptr(buffer, 16);
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 5; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %xmm4,%xmm0");
+               asm volatile ("movdqa %%xmm4,%0" : "=m" (pd[0]));
+
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm1");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm1");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm2");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm3");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm3");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (pd[0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pcmpgtb %xmm0,%xmm5");
+                       asm volatile ("paddb %xmm0,%xmm0");
+                       asm volatile ("pand %xmm7,%xmm5");
+                       asm volatile ("pxor %xmm5,%xmm0");
+
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm6");
+                       asm volatile ("movdqa %%xmm6,%0" : "=m" (pd[0]));
+
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("pand   %xmm7,%xmm4");
+                       asm volatile ("pand   %xmm7,%xmm5");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm1");
+                       asm volatile ("pxor   %xmm7,%xmm1");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("pxor   %xmm7,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm3");
+                       asm volatile ("pxor   %xmm7,%xmm3");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+               asm volatile ("movdqa %0,%%xmm6" : : "m" (pd[0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+
+               asm volatile ("pxor %xmm5,%xmm5");
+               asm volatile ("pcmpgtb %xmm0,%xmm5");
+               asm volatile ("paddb %xmm0,%xmm0");
+               asm volatile ("pand %xmm7,%xmm5");
+               asm volatile ("pxor %xmm5,%xmm0");
+
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+               asm volatile ("pxor %xmm4,%xmm3");
+               asm volatile ("pxor %xmm4,%xmm6");
+
+               asm volatile ("movntdq %%xmm6,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (s[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (t[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
+/*
+ * GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen5_ssse3ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 5; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("movdqa %0,%%xmm14" : : "m" (gfconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm10" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %xmm10,%xmm0");
+               asm volatile ("movdqa %xmm10,%xmm1");
+
+               asm volatile ("movdqa %xmm10,%xmm11");
+               asm volatile ("psrlw  $4,%xmm11");
+               asm volatile ("pand   %xmm15,%xmm10");
+               asm volatile ("pand   %xmm15,%xmm11");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm2");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm2");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm3");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm3");
+
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm4");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm4");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm10" : : "m" (v[d][i]));
+
+                       asm volatile ("pxor %xmm11,%xmm11");
+                       asm volatile ("pcmpgtb %xmm1,%xmm11");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("pand %xmm14,%xmm11");
+                       asm volatile ("pxor %xmm11,%xmm1");
+
+                       asm volatile ("pxor %xmm10,%xmm0");
+                       asm volatile ("pxor %xmm10,%xmm1");
+
+                       asm volatile ("movdqa %xmm10,%xmm11");
+                       asm volatile ("psrlw  $4,%xmm11");
+                       asm volatile ("pand   %xmm15,%xmm10");
+                       asm volatile ("pand   %xmm15,%xmm11");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm2");
+                       asm volatile ("pxor   %xmm13,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm3");
+                       asm volatile ("pxor   %xmm13,%xmm3");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm4");
+                       asm volatile ("pxor   %xmm13,%xmm4");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm10" : : "m" (v[0][i]));
+
+               asm volatile ("pxor %xmm11,%xmm11");
+               asm volatile ("pcmpgtb %xmm1,%xmm11");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("pand %xmm14,%xmm11");
+               asm volatile ("pxor %xmm11,%xmm1");
+
+               asm volatile ("pxor %xmm10,%xmm0");
+               asm volatile ("pxor %xmm10,%xmm1");
+               asm volatile ("pxor %xmm10,%xmm2");
+               asm volatile ("pxor %xmm10,%xmm3");
+               asm volatile ("pxor %xmm10,%xmm4");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (s[i]));
+               asm volatile ("movntdq %%xmm4,%0" : "=m" (t[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
+/*
+ * GEN5 (penta parity with Cauchy matrix) AVX2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen5_avx2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 5; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_avx_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("vpxor %ymm8,%ymm8,%ymm8");
+       asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (gfconst16.poly[0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 32) {
+               /* last disk without the by two multiplication */
+               asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[l][i]));
+
+               asm volatile ("vmovdqa %ymm10,%ymm0");
+               asm volatile ("vmovdqa %ymm10,%ymm1");
+
+               asm volatile ("vpsrlw  $4,%ymm10,%ymm11");
+               asm volatile ("vpand   %ymm15,%ymm10,%ymm10");
+               asm volatile ("vpand   %ymm15,%ymm11,%ymm11");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm2,%ymm2");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm3,%ymm3");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm3,%ymm3");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm4,%ymm4");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm4,%ymm4");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[d][i]));
+
+                       asm volatile ("vpcmpgtb %ymm1,%ymm8,%ymm11");
+                       asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+                       asm volatile ("vpand %ymm14,%ymm11,%ymm11");
+                       asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
+
+                       asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
+
+                       asm volatile ("vpsrlw  $4,%ymm10,%ymm11");
+                       asm volatile ("vpand   %ymm15,%ymm10,%ymm10");
+                       asm volatile ("vpand   %ymm15,%ymm11,%ymm11");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm13,%ymm2,%ymm2");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm3,%ymm3");
+                       asm volatile ("vpxor   %ymm13,%ymm3,%ymm3");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm4,%ymm4");
+                       asm volatile ("vpxor   %ymm13,%ymm4,%ymm4");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[0][i]));
+
+               asm volatile ("vpcmpgtb %ymm1,%ymm8,%ymm11");
+               asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+               asm volatile ("vpand %ymm14,%ymm11,%ymm11");
+               asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
+
+               asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
+               asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm10,%ymm2,%ymm2");
+               asm volatile ("vpxor %ymm10,%ymm3,%ymm3");
+               asm volatile ("vpxor %ymm10,%ymm4,%ymm4");
+
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
+               asm volatile ("vmovntdq %%ymm3,%0" : "=m" (s[i]));
+               asm volatile ("vmovntdq %%ymm4,%0" : "=m" (t[i]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
+ */
+void raid_gen6_ssse3(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       uint8_t *u;
+       int d, l;
+       size_t i;
+       uint8_t buffer[2*16+16];
+       uint8_t *pd = __align_ptr(buffer, 16);
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+       u = v[nd + 5];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 6; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %%xmm4,%0" : "=m" (pd[0]));
+               asm volatile ("movdqa %%xmm4,%0" : "=m" (pd[16]));
+
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+               asm volatile ("movdqa %xmm4,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm0");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm0");
+
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm1");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm1");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm2");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][3][0][0]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][3][1][0]));
+               asm volatile ("pshufb %xmm4,%xmm3");
+               asm volatile ("pshufb %xmm5,%xmm7");
+               asm volatile ("pxor   %xmm7,%xmm3");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm5" : : "m" (pd[0]));
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (pd[16]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+
+                       asm volatile ("pxor %xmm4,%xmm4");
+                       asm volatile ("pcmpgtb %xmm6,%xmm4");
+                       asm volatile ("paddb %xmm6,%xmm6");
+                       asm volatile ("pand %xmm7,%xmm4");
+                       asm volatile ("pxor %xmm4,%xmm6");
+
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+
+                       asm volatile ("pxor %xmm4,%xmm5");
+                       asm volatile ("pxor %xmm4,%xmm6");
+                       asm volatile ("movdqa %%xmm5,%0" : "=m" (pd[0]));
+                       asm volatile ("movdqa %%xmm6,%0" : "=m" (pd[16]));
+
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+                       asm volatile ("movdqa %xmm4,%xmm5");
+                       asm volatile ("psrlw  $4,%xmm5");
+                       asm volatile ("pand   %xmm7,%xmm4");
+                       asm volatile ("pand   %xmm7,%xmm5");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm0");
+                       asm volatile ("pxor   %xmm7,%xmm0");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm1");
+                       asm volatile ("pxor   %xmm7,%xmm1");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm2");
+                       asm volatile ("pxor   %xmm7,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][3][0][0]));
+                       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][3][1][0]));
+                       asm volatile ("pshufb %xmm4,%xmm6");
+                       asm volatile ("pshufb %xmm5,%xmm7");
+                       asm volatile ("pxor   %xmm6,%xmm3");
+                       asm volatile ("pxor   %xmm7,%xmm3");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm5" : : "m" (pd[0]));
+               asm volatile ("movdqa %0,%%xmm6" : : "m" (pd[16]));
+               asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
+
+               asm volatile ("pxor %xmm4,%xmm4");
+               asm volatile ("pcmpgtb %xmm6,%xmm4");
+               asm volatile ("paddb %xmm6,%xmm6");
+               asm volatile ("pand %xmm7,%xmm4");
+               asm volatile ("pxor %xmm4,%xmm6");
+
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (v[0][i]));
+               asm volatile ("pxor %xmm4,%xmm0");
+               asm volatile ("pxor %xmm4,%xmm1");
+               asm volatile ("pxor %xmm4,%xmm2");
+               asm volatile ("pxor %xmm4,%xmm3");
+               asm volatile ("pxor %xmm4,%xmm5");
+               asm volatile ("pxor %xmm4,%xmm6");
+
+               asm volatile ("movntdq %%xmm5,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm6,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (s[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (t[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (u[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
+/*
+ * GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen6_ssse3ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       uint8_t *u;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+       u = v[nd + 5];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 6; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_sse_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("movdqa %0,%%xmm14" : : "m" (gfconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 16) {
+               /* last disk without the by two multiplication */
+               asm volatile ("movdqa %0,%%xmm10" : : "m" (v[l][i]));
+
+               asm volatile ("movdqa %xmm10,%xmm0");
+               asm volatile ("movdqa %xmm10,%xmm1");
+
+               asm volatile ("movdqa %xmm10,%xmm11");
+               asm volatile ("psrlw  $4,%xmm11");
+               asm volatile ("pand   %xmm15,%xmm10");
+               asm volatile ("pand   %xmm15,%xmm11");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm2");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm2");
+
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm3");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm3");
+
+               asm volatile ("movdqa %0,%%xmm4" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm4");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm4");
+
+               asm volatile ("movdqa %0,%%xmm5" : : "m" (gfgenpshufb[l][3][0][0]));
+               asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][3][1][0]));
+               asm volatile ("pshufb %xmm10,%xmm5");
+               asm volatile ("pshufb %xmm11,%xmm13");
+               asm volatile ("pxor   %xmm13,%xmm5");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("movdqa %0,%%xmm10" : : "m" (v[d][i]));
+
+                       asm volatile ("pxor %xmm11,%xmm11");
+                       asm volatile ("pcmpgtb %xmm1,%xmm11");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("pand %xmm14,%xmm11");
+                       asm volatile ("pxor %xmm11,%xmm1");
+
+                       asm volatile ("pxor %xmm10,%xmm0");
+                       asm volatile ("pxor %xmm10,%xmm1");
+
+                       asm volatile ("movdqa %xmm10,%xmm11");
+                       asm volatile ("psrlw  $4,%xmm11");
+                       asm volatile ("pand   %xmm15,%xmm10");
+                       asm volatile ("pand   %xmm15,%xmm11");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm2");
+                       asm volatile ("pxor   %xmm13,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm3");
+                       asm volatile ("pxor   %xmm13,%xmm3");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm4");
+                       asm volatile ("pxor   %xmm13,%xmm4");
+
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][3][0][0]));
+                       asm volatile ("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][3][1][0]));
+                       asm volatile ("pshufb %xmm10,%xmm12");
+                       asm volatile ("pshufb %xmm11,%xmm13");
+                       asm volatile ("pxor   %xmm12,%xmm5");
+                       asm volatile ("pxor   %xmm13,%xmm5");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("movdqa %0,%%xmm10" : : "m" (v[0][i]));
+
+               asm volatile ("pxor %xmm11,%xmm11");
+               asm volatile ("pcmpgtb %xmm1,%xmm11");
+               asm volatile ("paddb %xmm1,%xmm1");
+               asm volatile ("pand %xmm14,%xmm11");
+               asm volatile ("pxor %xmm11,%xmm1");
+
+               asm volatile ("pxor %xmm10,%xmm0");
+               asm volatile ("pxor %xmm10,%xmm1");
+               asm volatile ("pxor %xmm10,%xmm2");
+               asm volatile ("pxor %xmm10,%xmm3");
+               asm volatile ("pxor %xmm10,%xmm4");
+               asm volatile ("pxor %xmm10,%xmm5");
+
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm3,%0" : "=m" (s[i]));
+               asm volatile ("movntdq %%xmm4,%0" : "=m" (t[i]));
+               asm volatile ("movntdq %%xmm5,%0" : "=m" (u[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
+/*
+ * GEN6 (hexa parity with Cauchy matrix) AVX2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_gen6_avx2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       uint8_t *s;
+       uint8_t *t;
+       uint8_t *u;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+       s = v[nd + 3];
+       t = v[nd + 4];
+       u = v[nd + 5];
+
+       /* special case with only one data disk */
+       if (l == 0) {
+               for (i = 0; i < 6; ++i)
+                       memcpy(v[1 + i], v[0], size);
+               return;
+       }
+
+       raid_avx_begin();
+
+       /* generic case with at least two data disks */
+       asm volatile ("vpxor %ymm8,%ymm8,%ymm8");
+       asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (gfconst16.poly[0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 32) {
+               /* last disk without the by two multiplication */
+               asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[l][i]));
+
+               asm volatile ("vmovdqa %ymm10,%ymm0");
+               asm volatile ("vmovdqa %ymm10,%ymm1");
+
+               asm volatile ("vpsrlw  $4,%ymm10,%ymm11");
+               asm volatile ("vpand   %ymm15,%ymm10,%ymm10");
+               asm volatile ("vpand   %ymm15,%ymm11,%ymm11");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfgenpshufb[l][0][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][0][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm2,%ymm2");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfgenpshufb[l][1][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][1][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm3,%ymm3");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm3,%ymm3");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (gfgenpshufb[l][2][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][2][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm4,%ymm4");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm4,%ymm4");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm5" : : "m" (gfgenpshufb[l][3][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][3][1][0]));
+               asm volatile ("vpshufb %ymm10,%ymm5,%ymm5");
+               asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+               asm volatile ("vpxor   %ymm13,%ymm5,%ymm5");
+
+               /* intermediate disks */
+               for (d = l - 1; d > 0; --d) {
+                       asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[d][i]));
+
+                       asm volatile ("vpcmpgtb %ymm1,%ymm8,%ymm11");
+                       asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+                       asm volatile ("vpand %ymm14,%ymm11,%ymm11");
+                       asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
+
+                       asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
+
+                       asm volatile ("vpsrlw  $4,%ymm10,%ymm11");
+                       asm volatile ("vpand   %ymm15,%ymm10,%ymm10");
+                       asm volatile ("vpand   %ymm15,%ymm11,%ymm11");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][0][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][0][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm2,%ymm2");
+                       asm volatile ("vpxor   %ymm13,%ymm2,%ymm2");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][1][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][1][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm3,%ymm3");
+                       asm volatile ("vpxor   %ymm13,%ymm3,%ymm3");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][2][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][2][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm4,%ymm4");
+                       asm volatile ("vpxor   %ymm13,%ymm4,%ymm4");
+
+                       asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][3][0][0]));
+                       asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][3][1][0]));
+                       asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
+                       asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
+                       asm volatile ("vpxor   %ymm12,%ymm5,%ymm5");
+                       asm volatile ("vpxor   %ymm13,%ymm5,%ymm5");
+               }
+
+               /* first disk with all coefficients at 1 */
+               asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[0][i]));
+
+               asm volatile ("vpcmpgtb %ymm1,%ymm8,%ymm11");
+               asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+               asm volatile ("vpand %ymm14,%ymm11,%ymm11");
+               asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
+
+               asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
+               asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
+               asm volatile ("vpxor %ymm10,%ymm2,%ymm2");
+               asm volatile ("vpxor %ymm10,%ymm3,%ymm3");
+               asm volatile ("vpxor %ymm10,%ymm4,%ymm4");
+               asm volatile ("vpxor %ymm10,%ymm5,%ymm5");
+
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
+               asm volatile ("vmovntdq %%ymm3,%0" : "=m" (s[i]));
+               asm volatile ("vmovntdq %%ymm4,%0" : "=m" (t[i]));
+               asm volatile ("vmovntdq %%ymm5,%0" : "=m" (u[i]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * RAID recovering for one disk SSSE3 implementation
+ */
+void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *pa;
+       uint8_t G;
+       uint8_t V;
+       size_t i;
+
+       (void)nr; /* unused, it's always 1 */
+
+       /* if it's RAID5 uses the faster function */
+       if (ip[0] == 0) {
+               raid_rec1of1(id, nd, size, vv);
+               return;
+       }
+
+       /* setup the coefficients matrix */
+       G = A(ip[0], id[0]);
+
+       /* invert it to solve the system of linear equations */
+       V = inv(G);
+
+       /* compute delta parity */
+       raid_delta_gen(1, id, ip, nd, size, vv);
+
+       p = v[nd + ip[0]];
+       pa = v[id[0]];
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+       asm volatile ("movdqa %0,%%xmm4" : : "m" (gfmulpshufb[V][0][0]));
+       asm volatile ("movdqa %0,%%xmm5" : : "m" (gfmulpshufb[V][1][0]));
+
+       for (i = 0; i < size; i += 16) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (p[i]));
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (pa[i]));
+               asm volatile ("movdqa %xmm4,%xmm2");
+               asm volatile ("movdqa %xmm5,%xmm3");
+               asm volatile ("pxor   %xmm0,%xmm1");
+               asm volatile ("movdqa %xmm1,%xmm0");
+               asm volatile ("psrlw  $4,%xmm1");
+               asm volatile ("pand   %xmm7,%xmm0");
+               asm volatile ("pand   %xmm7,%xmm1");
+               asm volatile ("pshufb %xmm0,%xmm2");
+               asm volatile ("pshufb %xmm1,%xmm3");
+               asm volatile ("pxor   %xmm3,%xmm2");
+               asm volatile ("movdqa %%xmm2,%0" : "=m" (pa[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * RAID recovering for two disks SSSE3 implementation
+ */
+void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       const int N = 2;
+       uint8_t *p[N];
+       uint8_t *pa[N];
+       uint8_t G[N * N];
+       uint8_t V[N * N];
+       size_t i;
+       int j, k;
+
+       (void)nr; /* unused, it's always 2 */
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       G[j * N + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, N);
+
+       /* compute delta parity */
+       raid_delta_gen(N, id, ip, nd, size, vv);
+
+       for (j = 0; j < N; ++j) {
+               p[j] = v[nd + ip[j]];
+               pa[j] = v[id[j]];
+       }
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 16) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (p[0][i]));
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (pa[0][i]));
+               asm volatile ("movdqa %0,%%xmm1" : : "m" (p[1][i]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (pa[1][i]));
+               asm volatile ("pxor   %xmm2,%xmm0");
+               asm volatile ("pxor   %xmm3,%xmm1");
+
+               asm volatile ("pxor %xmm6,%xmm6");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[V[0]][0][0]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[0]][1][0]));
+               asm volatile ("movdqa %xmm0,%xmm4");
+               asm volatile ("movdqa %xmm0,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm3");
+               asm volatile ("pxor   %xmm2,%xmm6");
+               asm volatile ("pxor   %xmm3,%xmm6");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[V[1]][0][0]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[1]][1][0]));
+               asm volatile ("movdqa %xmm1,%xmm4");
+               asm volatile ("movdqa %xmm1,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm3");
+               asm volatile ("pxor   %xmm2,%xmm6");
+               asm volatile ("pxor   %xmm3,%xmm6");
+
+               asm volatile ("movdqa %%xmm6,%0" : "=m" (pa[0][i]));
+
+               asm volatile ("pxor %xmm6,%xmm6");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[V[2]][0][0]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[2]][1][0]));
+               asm volatile ("movdqa %xmm0,%xmm4");
+               asm volatile ("movdqa %xmm0,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm3");
+               asm volatile ("pxor   %xmm2,%xmm6");
+               asm volatile ("pxor   %xmm3,%xmm6");
+
+               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[V[3]][0][0]));
+               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[3]][1][0]));
+               asm volatile ("movdqa %xmm1,%xmm4");
+               asm volatile ("movdqa %xmm1,%xmm5");
+               asm volatile ("psrlw  $4,%xmm5");
+               asm volatile ("pand   %xmm7,%xmm4");
+               asm volatile ("pand   %xmm7,%xmm5");
+               asm volatile ("pshufb %xmm4,%xmm2");
+               asm volatile ("pshufb %xmm5,%xmm3");
+               asm volatile ("pxor   %xmm2,%xmm6");
+               asm volatile ("pxor   %xmm3,%xmm6");
+
+               asm volatile ("movdqa %%xmm6,%0" : "=m" (pa[1][i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
+/*
+ * RAID recovering SSSE3 implementation
+ */
+void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       int N = nr;
+       uint8_t *p[RAID_PARITY_MAX];
+       uint8_t *pa[RAID_PARITY_MAX];
+       uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t buffer[RAID_PARITY_MAX*16+16];
+       uint8_t *pd = __align_ptr(buffer, 16);
+       size_t i;
+       int j, k;
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       G[j * N + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, N);
+
+       /* compute delta parity */
+       raid_delta_gen(N, id, ip, nd, size, vv);
+
+       for (j = 0; j < N; ++j) {
+               p[j] = v[nd + ip[j]];
+               pa[j] = v[id[j]];
+       }
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 16) {
+               /* delta */
+               for (j = 0; j < N; ++j) {
+                       asm volatile ("movdqa %0,%%xmm0" : : "m" (p[j][i]));
+                       asm volatile ("movdqa %0,%%xmm1" : : "m" (pa[j][i]));
+                       asm volatile ("pxor   %xmm1,%xmm0");
+                       asm volatile ("movdqa %%xmm0,%0" : "=m" (pd[j*16]));
+               }
+
+               /* reconstruct */
+               for (j = 0; j < N; ++j) {
+                       asm volatile ("pxor %xmm0,%xmm0");
+                       asm volatile ("pxor %xmm1,%xmm1");
+
+                       for (k = 0; k < N; ++k) {
+                               uint8_t m = V[j * N + k];
+
+                               asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[m][0][0]));
+                               asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[m][1][0]));
+                               asm volatile ("movdqa %0,%%xmm4" : : "m" (pd[k*16]));
+                               asm volatile ("movdqa %xmm4,%xmm5");
+                               asm volatile ("psrlw  $4,%xmm5");
+                               asm volatile ("pand   %xmm7,%xmm4");
+                               asm volatile ("pand   %xmm7,%xmm5");
+                               asm volatile ("pshufb %xmm4,%xmm2");
+                               asm volatile ("pshufb %xmm5,%xmm3");
+                               asm volatile ("pxor   %xmm2,%xmm0");
+                               asm volatile ("pxor   %xmm3,%xmm1");
+                       }
+
+                       asm volatile ("pxor %xmm1,%xmm0");
+                       asm volatile ("movdqa %%xmm0,%0" : "=m" (pa[j][i]));
+               }
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
+/*
+ * RAID recovering for one disk AVX2 implementation
+ */
+void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       uint8_t *p;
+       uint8_t *pa;
+       uint8_t G;
+       uint8_t V;
+       size_t i;
+
+       (void)nr; /* unused, it's always 1 */
+
+       /* if it's RAID5 uses the faster function */
+       if (ip[0] == 0) {
+               raid_rec1of1(id, nd, size, vv);
+               return;
+       }
+
+       /* setup the coefficients matrix */
+       G = A(ip[0], id[0]);
+
+       /* invert it to solve the system of linear equations */
+       V = inv(G);
+
+       /* compute delta parity */
+       raid_delta_gen(1, id, ip, nd, size, vv);
+
+       p = v[nd + ip[0]];
+       pa = v[id[0]];
+
+       raid_avx_begin();
+
+       asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (gfmulpshufb[V][0][0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm5" : : "m" (gfmulpshufb[V][1][0]));
+
+       for (i = 0; i < size; i += 32) {
+               asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[i]));
+               asm volatile ("vmovdqa %0,%%ymm1" : : "m" (pa[i]));
+               asm volatile ("vpxor   %ymm1,%ymm0,%ymm0");
+               asm volatile ("vpsrlw  $4,%ymm0,%ymm1");
+               asm volatile ("vpand   %ymm7,%ymm0,%ymm0");
+               asm volatile ("vpand   %ymm7,%ymm1,%ymm1");
+               asm volatile ("vpshufb %ymm0,%ymm4,%ymm2");
+               asm volatile ("vpshufb %ymm1,%ymm5,%ymm3");
+               asm volatile ("vpxor   %ymm3,%ymm2,%ymm2");
+               asm volatile ("vmovdqa %%ymm2,%0" : "=m" (pa[i]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
+/*
+ * RAID recovering for two disks AVX2 implementation
+ */
+void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       const int N = 2;
+       uint8_t *p[N];
+       uint8_t *pa[N];
+       uint8_t G[N * N];
+       uint8_t V[N * N];
+       size_t i;
+       int j, k;
+
+       (void)nr; /* unused, it's always 2 */
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       G[j * N + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, N);
+
+       /* compute delta parity */
+       raid_delta_gen(N, id, ip, nd, size, vv);
+
+       for (j = 0; j < N; ++j) {
+               p[j] = v[nd + ip[j]];
+               pa[j] = v[id[j]];
+       }
+
+       raid_avx_begin();
+
+       asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 32) {
+               asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
+               asm volatile ("vmovdqa %0,%%ymm2" : : "m" (pa[0][i]));
+               asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
+               asm volatile ("vmovdqa %0,%%ymm3" : : "m" (pa[1][i]));
+               asm volatile ("vpxor   %ymm2,%ymm0,%ymm0");
+               asm volatile ("vpxor   %ymm3,%ymm1,%ymm1");
+
+               asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[0]][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[0]][1][0]));
+               asm volatile ("vpsrlw  $4,%ymm0,%ymm5");
+               asm volatile ("vpand   %ymm7,%ymm0,%ymm4");
+               asm volatile ("vpand   %ymm7,%ymm5,%ymm5");
+               asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
+               asm volatile ("vpxor   %ymm2,%ymm6,%ymm6");
+               asm volatile ("vpxor   %ymm3,%ymm6,%ymm6");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[1]][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[1]][1][0]));
+               asm volatile ("vpsrlw  $4,%ymm1,%ymm5");
+               asm volatile ("vpand   %ymm7,%ymm1,%ymm4");
+               asm volatile ("vpand   %ymm7,%ymm5,%ymm5");
+               asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
+               asm volatile ("vpxor   %ymm2,%ymm6,%ymm6");
+               asm volatile ("vpxor   %ymm3,%ymm6,%ymm6");
+
+               asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[0][i]));
+
+               asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[2]][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[2]][1][0]));
+               asm volatile ("vpsrlw  $4,%ymm0,%ymm5");
+               asm volatile ("vpand   %ymm7,%ymm0,%ymm4");
+               asm volatile ("vpand   %ymm7,%ymm5,%ymm5");
+               asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
+               asm volatile ("vpxor   %ymm2,%ymm6,%ymm6");
+               asm volatile ("vpxor   %ymm3,%ymm6,%ymm6");
+
+               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[3]][0][0]));
+               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[3]][1][0]));
+               asm volatile ("vpsrlw  $4,%ymm1,%ymm5");
+               asm volatile ("vpand   %ymm7,%ymm1,%ymm4");
+               asm volatile ("vpand   %ymm7,%ymm5,%ymm5");
+               asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
+               asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
+               asm volatile ("vpxor   %ymm2,%ymm6,%ymm6");
+               asm volatile ("vpxor   %ymm3,%ymm6,%ymm6");
+
+               asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
+       }
+
+       raid_avx_end();
+}
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
+/*
+ * RAID recovering AVX2 implementation
+ */
+void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t **)vv;
+       int N = nr;
+       uint8_t *p[RAID_PARITY_MAX];
+       uint8_t *pa[RAID_PARITY_MAX];
+       uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
+       uint8_t buffer[RAID_PARITY_MAX*32+32];
+       uint8_t *pd = __align_ptr(buffer, 32);
+       size_t i;
+       int j, k;
+
+       /* setup the coefficients matrix */
+       for (j = 0; j < N; ++j)
+               for (k = 0; k < N; ++k)
+                       G[j * N + k] = A(ip[j], id[k]);
+
+       /* invert it to solve the system of linear equations */
+       raid_invert(G, V, N);
+
+       /* compute delta parity */
+       raid_delta_gen(N, id, ip, nd, size, vv);
+
+       for (j = 0; j < N; ++j) {
+               p[j] = v[nd + ip[j]];
+               pa[j] = v[id[j]];
+       }
+
+       raid_avx_begin();
+
+       asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
+
+       for (i = 0; i < size; i += 32) {
+               /* delta */
+               for (j = 0; j < N; ++j) {
+                       asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[j][i]));
+                       asm volatile ("vmovdqa %0,%%ymm1" : : "m" (pa[j][i]));
+                       asm volatile ("vpxor   %ymm1,%ymm0,%ymm0");
+                       asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pd[j*32]));
+               }
+
+               /* reconstruct */
+               for (j = 0; j < N; ++j) {
+                       asm volatile ("vpxor %ymm0,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm1,%ymm1,%ymm1");
+
+                       for (k = 0; k < N; ++k) {
+                               uint8_t m = V[j * N + k];
+
+                               asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[m][0][0]));
+                               asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[m][1][0]));
+                               asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pd[k*32]));
+                               asm volatile ("vpsrlw  $4,%ymm4,%ymm5");
+                               asm volatile ("vpand   %ymm7,%ymm4,%ymm4");
+                               asm volatile ("vpand   %ymm7,%ymm5,%ymm5");
+                               asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
+                               asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
+                               asm volatile ("vpxor   %ymm2,%ymm0,%ymm0");
+                               asm volatile ("vpxor   %ymm3,%ymm1,%ymm1");
+                       }
+
+                       asm volatile ("vpxor %ymm1,%ymm0,%ymm0");
+                       asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[j][i]));
+               }
+       }
+
+       raid_avx_end();
+}
+#endif
+

diff --git a/raid/x86z.c b/raid/x86z.c
new file mode 100644 (file)
index 0000000..1e3fe89
--- /dev/null
+++ b/raid/x86z.c
@@ -0,0 +1,255 @@
+/*
+ * Copyright (C) 2013 Andrea Mazzoleni
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "internal.h"
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
+static const struct gfzconst16 {
+       uint8_t poly[16];
+       uint8_t half[16];
+       uint8_t low7[16];
+} gfzconst16 __aligned(64) =
+{
+       {
+               0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
+               0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d
+       },
+       {
+               0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e,
+               0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e
+       },
+       {
+               0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
+               0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f
+       }
+};
+#endif
+
+#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
+/*
+ * GENz (triple parity with powers of 2^-1) SSE2 implementation
+ */
+void raid_genz_sse2(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t**)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfzconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm3" : : "m" (gfzconst16.half[0]));
+       asm volatile ("movdqa %0,%%xmm6" : : "m" (gfzconst16.low7[0]));
+
+       for (i = 0; i < size; i += 16) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
+               asm volatile ("movdqa %xmm0,%xmm1");
+               asm volatile ("movdqa %xmm0,%xmm2");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("pxor %xmm4,%xmm4");
+                       asm volatile ("pcmpgtb %xmm1,%xmm4");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("pand %xmm7,%xmm4");
+                       asm volatile ("pxor %xmm4,%xmm1");
+
+                       asm volatile ("movdqa %xmm2,%xmm4");
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("psllw $7,%xmm4");
+                       asm volatile ("psrlw $1,%xmm2");
+                       asm volatile ("pcmpgtb %xmm4,%xmm5");
+                       asm volatile ("pand %xmm6,%xmm2");
+                       asm volatile ("pand %xmm3,%xmm5");
+                       asm volatile ("pxor %xmm5,%xmm2");
+
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+                       asm volatile ("pxor %xmm4,%xmm2");
+               }
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
+/*
+ * GENz (triple parity with powers of 2^-1) SSE2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_genz_sse2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t**)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       raid_sse_begin();
+
+       asm volatile ("movdqa %0,%%xmm7" : : "m" (gfzconst16.poly[0]));
+       asm volatile ("movdqa %0,%%xmm3" : : "m" (gfzconst16.half[0]));
+       asm volatile ("movdqa %0,%%xmm11" : : "m" (gfzconst16.low7[0]));
+
+       for (i = 0; i < size; i += 32) {
+               asm volatile ("movdqa %0,%%xmm0" : : "m" (v[l][i]));
+               asm volatile ("movdqa %0,%%xmm8" : : "m" (v[l][i + 16]));
+               asm volatile ("movdqa %xmm0,%xmm1");
+               asm volatile ("movdqa %xmm8,%xmm9");
+               asm volatile ("movdqa %xmm0,%xmm2");
+               asm volatile ("movdqa %xmm8,%xmm10");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("movdqa %xmm2,%xmm6");
+                       asm volatile ("movdqa %xmm10,%xmm14");
+                       asm volatile ("pxor %xmm4,%xmm4");
+                       asm volatile ("pxor %xmm12,%xmm12");
+                       asm volatile ("pxor %xmm5,%xmm5");
+                       asm volatile ("pxor %xmm13,%xmm13");
+                       asm volatile ("psllw $7,%xmm6");
+                       asm volatile ("psllw $7,%xmm14");
+                       asm volatile ("psrlw $1,%xmm2");
+                       asm volatile ("psrlw $1,%xmm10");
+                       asm volatile ("pcmpgtb %xmm1,%xmm4");
+                       asm volatile ("pcmpgtb %xmm9,%xmm12");
+                       asm volatile ("pcmpgtb %xmm6,%xmm5");
+                       asm volatile ("pcmpgtb %xmm14,%xmm13");
+                       asm volatile ("paddb %xmm1,%xmm1");
+                       asm volatile ("paddb %xmm9,%xmm9");
+                       asm volatile ("pand %xmm11,%xmm2");
+                       asm volatile ("pand %xmm11,%xmm10");
+                       asm volatile ("pand %xmm7,%xmm4");
+                       asm volatile ("pand %xmm7,%xmm12");
+                       asm volatile ("pand %xmm3,%xmm5");
+                       asm volatile ("pand %xmm3,%xmm13");
+                       asm volatile ("pxor %xmm4,%xmm1");
+                       asm volatile ("pxor %xmm12,%xmm9");
+                       asm volatile ("pxor %xmm5,%xmm2");
+                       asm volatile ("pxor %xmm13,%xmm10");
+
+                       asm volatile ("movdqa %0,%%xmm4" : : "m" (v[d][i]));
+                       asm volatile ("movdqa %0,%%xmm12" : : "m" (v[d][i + 16]));
+                       asm volatile ("pxor %xmm4,%xmm0");
+                       asm volatile ("pxor %xmm4,%xmm1");
+                       asm volatile ("pxor %xmm4,%xmm2");
+                       asm volatile ("pxor %xmm12,%xmm8");
+                       asm volatile ("pxor %xmm12,%xmm9");
+                       asm volatile ("pxor %xmm12,%xmm10");
+               }
+               asm volatile ("movntdq %%xmm0,%0" : "=m" (p[i]));
+               asm volatile ("movntdq %%xmm8,%0" : "=m" (p[i + 16]));
+               asm volatile ("movntdq %%xmm1,%0" : "=m" (q[i]));
+               asm volatile ("movntdq %%xmm9,%0" : "=m" (q[i + 16]));
+               asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
+               asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
+       }
+
+       raid_sse_end();
+}
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
+/*
+ * GENz (triple parity with powers of 2^-1) AVX2 implementation
+ *
+ * Note that it uses 16 registers, meaning that x64 is required.
+ */
+void raid_genz_avx2ext(int nd, size_t size, void **vv)
+{
+       uint8_t **v = (uint8_t**)vv;
+       uint8_t *p;
+       uint8_t *q;
+       uint8_t *r;
+       int d, l;
+       size_t i;
+
+       l = nd - 1;
+       p = v[nd];
+       q = v[nd + 1];
+       r = v[nd + 2];
+
+       raid_avx_begin();
+
+       asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfzconst16.poly[0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfzconst16.half[0]));
+       asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (gfzconst16.low7[0]));
+       asm volatile ("vpxor %ymm15,%ymm15,%ymm15");
+
+       for (i = 0; i < size; i += 64) {
+               asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
+               asm volatile ("vmovdqa %0,%%ymm8" : : "m" (v[l][i + 32]));
+               asm volatile ("vmovdqa %ymm0,%ymm1");
+               asm volatile ("vmovdqa %ymm8,%ymm9");
+               asm volatile ("vmovdqa %ymm0,%ymm2");
+               asm volatile ("vmovdqa %ymm8,%ymm10");
+               for (d = l - 1; d >= 0; --d) {
+                       asm volatile ("vpsllw $7,%ymm2,%ymm6");
+                       asm volatile ("vpsllw $7,%ymm10,%ymm14");
+                       asm volatile ("vpsrlw $1,%ymm2,%ymm2");
+                       asm volatile ("vpsrlw $1,%ymm10,%ymm10");
+                       asm volatile ("vpcmpgtb %ymm1,%ymm15,%ymm4");
+                       asm volatile ("vpcmpgtb %ymm9,%ymm15,%ymm12");
+                       asm volatile ("vpcmpgtb %ymm6,%ymm15,%ymm5");
+                       asm volatile ("vpcmpgtb %ymm14,%ymm15,%ymm13");
+                       asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
+                       asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
+                       asm volatile ("vpand %ymm11,%ymm2,%ymm2");
+                       asm volatile ("vpand %ymm11,%ymm10,%ymm10");
+                       asm volatile ("vpand %ymm7,%ymm4,%ymm4");
+                       asm volatile ("vpand %ymm7,%ymm12,%ymm12");
+                       asm volatile ("vpand %ymm3,%ymm5,%ymm5");
+                       asm volatile ("vpand %ymm3,%ymm13,%ymm13");
+                       asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+                       asm volatile ("vpxor %ymm5,%ymm2,%ymm2");
+                       asm volatile ("vpxor %ymm13,%ymm10,%ymm10");
+
+                       asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
+                       asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
+                       asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
+                       asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
+                       asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
+                       asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
+                       asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
+                       asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
+               }
+               asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
+               asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
+               asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
+               asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
+               asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
+               asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
+       }
+
+       raid_avx_end();
+}
+#endif
+