2 Copyright 2005-2011 Intel Corporation. All Rights Reserved.
4 This file is part of Threading Building Blocks.
6 Threading Building Blocks is free software; you can redistribute it
7 and/or modify it under the terms of the GNU General Public License
8 version 2 as published by the Free Software Foundation.
10 Threading Building Blocks is distributed in the hope that it will be
11 useful, but WITHOUT ANY WARRANTY; without even the implied warranty
12 of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with Threading Building Blocks; if not, write to the Free Software
17 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 As a special exception, you may use this file as part of a free software
20 library without restriction. Specifically, if other files instantiate
21 templates or use macros or inline functions from this file, or you compile
22 this file and link it with other files to produce an executable, this
23 file does not by itself cause the resulting executable to be covered by
24 the GNU General Public License. This exception does not however
25 invalidate any other reasons why the executable file might be covered by
26 the GNU General Public License.
29 #if !defined(__TBB_machine_H) || defined(__TBB_machine_linux_ia64_H)
30 #error Do not include this file directly; include tbb_machine.h instead
33 #define __TBB_machine_linux_ia64_H
37 #include <ia64intrin.h>
39 #define __TBB_WORDSIZE 8
40 #define __TBB_BIG_ENDIAN 0
43 #define __TBB_compiler_fence()
44 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
45 #define __TBB_acquire_consistency_helper()
46 #define __TBB_release_consistency_helper()
47 #define __TBB_full_memory_fence() __mf()
49 #define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
50 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
51 // Even though GCC imbues volatile loads with acquire semantics, it sometimes moves
52 // loads over the acquire fence. The following helpers stop such incorrect code motion.
53 #define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
54 #define __TBB_release_consistency_helper() __TBB_compiler_fence()
55 #define __TBB_full_memory_fence() __asm__ __volatile__("mf": : :"memory")
56 #endif /* !__INTEL_COMPILER */
58 // Most of the functions will be in a .s file
61 int8_t __TBB_machine_fetchadd1__TBB_full_fence (volatile void *ptr, int8_t addend);
62 int8_t __TBB_machine_fetchadd1acquire(volatile void *ptr, int8_t addend);
63 int8_t __TBB_machine_fetchadd1release(volatile void *ptr, int8_t addend);
65 int16_t __TBB_machine_fetchadd2__TBB_full_fence (volatile void *ptr, int16_t addend);
66 int16_t __TBB_machine_fetchadd2acquire(volatile void *ptr, int16_t addend);
67 int16_t __TBB_machine_fetchadd2release(volatile void *ptr, int16_t addend);
69 int32_t __TBB_machine_fetchadd4__TBB_full_fence (volatile void *ptr, int32_t value);
70 int32_t __TBB_machine_fetchadd4acquire(volatile void *ptr, int32_t addend);
71 int32_t __TBB_machine_fetchadd4release(volatile void *ptr, int32_t addend);
73 int64_t __TBB_machine_fetchadd8__TBB_full_fence (volatile void *ptr, int64_t value);
74 int64_t __TBB_machine_fetchadd8acquire(volatile void *ptr, int64_t addend);
75 int64_t __TBB_machine_fetchadd8release(volatile void *ptr, int64_t addend);
77 int8_t __TBB_machine_fetchstore1__TBB_full_fence (volatile void *ptr, int8_t value);
78 int8_t __TBB_machine_fetchstore1acquire(volatile void *ptr, int8_t value);
79 int8_t __TBB_machine_fetchstore1release(volatile void *ptr, int8_t value);
81 int16_t __TBB_machine_fetchstore2__TBB_full_fence (volatile void *ptr, int16_t value);
82 int16_t __TBB_machine_fetchstore2acquire(volatile void *ptr, int16_t value);
83 int16_t __TBB_machine_fetchstore2release(volatile void *ptr, int16_t value);
85 int32_t __TBB_machine_fetchstore4__TBB_full_fence (volatile void *ptr, int32_t value);
86 int32_t __TBB_machine_fetchstore4acquire(volatile void *ptr, int32_t value);
87 int32_t __TBB_machine_fetchstore4release(volatile void *ptr, int32_t value);
89 int64_t __TBB_machine_fetchstore8__TBB_full_fence (volatile void *ptr, int64_t value);
90 int64_t __TBB_machine_fetchstore8acquire(volatile void *ptr, int64_t value);
91 int64_t __TBB_machine_fetchstore8release(volatile void *ptr, int64_t value);
93 int8_t __TBB_machine_cmpswp1__TBB_full_fence (volatile void *ptr, int8_t value, int8_t comparand);
94 int8_t __TBB_machine_cmpswp1acquire(volatile void *ptr, int8_t value, int8_t comparand);
95 int8_t __TBB_machine_cmpswp1release(volatile void *ptr, int8_t value, int8_t comparand);
97 int16_t __TBB_machine_cmpswp2__TBB_full_fence (volatile void *ptr, int16_t value, int16_t comparand);
98 int16_t __TBB_machine_cmpswp2acquire(volatile void *ptr, int16_t value, int16_t comparand);
99 int16_t __TBB_machine_cmpswp2release(volatile void *ptr, int16_t value, int16_t comparand);
101 int32_t __TBB_machine_cmpswp4__TBB_full_fence (volatile void *ptr, int32_t value, int32_t comparand);
102 int32_t __TBB_machine_cmpswp4acquire(volatile void *ptr, int32_t value, int32_t comparand);
103 int32_t __TBB_machine_cmpswp4release(volatile void *ptr, int32_t value, int32_t comparand);
105 int64_t __TBB_machine_cmpswp8__TBB_full_fence (volatile void *ptr, int64_t value, int64_t comparand);
106 int64_t __TBB_machine_cmpswp8acquire(volatile void *ptr, int64_t value, int64_t comparand);
107 int64_t __TBB_machine_cmpswp8release(volatile void *ptr, int64_t value, int64_t comparand);
109 int64_t __TBB_machine_lg(uint64_t value);
110 void __TBB_machine_pause(int32_t delay);
111 bool __TBB_machine_trylockbyte( volatile unsigned char &ptr );
112 int64_t __TBB_machine_lockbyte( volatile unsigned char &ptr );
114 //! Retrieves the current RSE backing store pointer. IA64 specific.
115 void* __TBB_get_bsp();
117 int32_t __TBB_machine_load1_relaxed(const void *ptr);
118 int32_t __TBB_machine_load2_relaxed(const void *ptr);
119 int32_t __TBB_machine_load4_relaxed(const void *ptr);
120 int64_t __TBB_machine_load8_relaxed(const void *ptr);
122 void __TBB_machine_store1_relaxed(void *ptr, int32_t value);
123 void __TBB_machine_store2_relaxed(void *ptr, int32_t value);
124 void __TBB_machine_store4_relaxed(void *ptr, int32_t value);
125 void __TBB_machine_store8_relaxed(void *ptr, int64_t value);
128 // Mapping old entry points to the names corresponding to the new full_fence identifier.
129 #define __TBB_machine_fetchadd1full_fence __TBB_machine_fetchadd1__TBB_full_fence
130 #define __TBB_machine_fetchadd2full_fence __TBB_machine_fetchadd2__TBB_full_fence
131 #define __TBB_machine_fetchadd4full_fence __TBB_machine_fetchadd4__TBB_full_fence
132 #define __TBB_machine_fetchadd8full_fence __TBB_machine_fetchadd8__TBB_full_fence
133 #define __TBB_machine_fetchstore1full_fence __TBB_machine_fetchstore1__TBB_full_fence
134 #define __TBB_machine_fetchstore2full_fence __TBB_machine_fetchstore2__TBB_full_fence
135 #define __TBB_machine_fetchstore4full_fence __TBB_machine_fetchstore4__TBB_full_fence
136 #define __TBB_machine_fetchstore8full_fence __TBB_machine_fetchstore8__TBB_full_fence
137 #define __TBB_machine_cmpswp1full_fence __TBB_machine_cmpswp1__TBB_full_fence
138 #define __TBB_machine_cmpswp2full_fence __TBB_machine_cmpswp2__TBB_full_fence
139 #define __TBB_machine_cmpswp4full_fence __TBB_machine_cmpswp4__TBB_full_fence
140 #define __TBB_machine_cmpswp8full_fence __TBB_machine_cmpswp8__TBB_full_fence
142 // Mapping relaxed operations to the entry points implementing them.
143 /** On IA64 RMW operations implicitly have acquire semantics. Thus one cannot
144 actually have completely relaxed RMW operation here. **/
145 #define __TBB_machine_fetchadd1relaxed __TBB_machine_fetchadd1acquire
146 #define __TBB_machine_fetchadd2relaxed __TBB_machine_fetchadd2acquire
147 #define __TBB_machine_fetchadd4relaxed __TBB_machine_fetchadd4acquire
148 #define __TBB_machine_fetchadd8relaxed __TBB_machine_fetchadd8acquire
149 #define __TBB_machine_fetchstore1relaxed __TBB_machine_fetchstore1acquire
150 #define __TBB_machine_fetchstore2relaxed __TBB_machine_fetchstore2acquire
151 #define __TBB_machine_fetchstore4relaxed __TBB_machine_fetchstore4acquire
152 #define __TBB_machine_fetchstore8relaxed __TBB_machine_fetchstore8acquire
153 #define __TBB_machine_cmpswp1relaxed __TBB_machine_cmpswp1acquire
154 #define __TBB_machine_cmpswp2relaxed __TBB_machine_cmpswp2acquire
155 #define __TBB_machine_cmpswp4relaxed __TBB_machine_cmpswp4acquire
156 #define __TBB_machine_cmpswp8relaxed __TBB_machine_cmpswp8acquire
158 #define __TBB_MACHINE_DEFINE_ATOMICS(S,V) \
159 template <typename T> \
160 struct machine_load_store_relaxed<T,S> { \
161 static inline T load ( const T& location ) { \
162 return (T)__TBB_machine_load##S##_relaxed(&location); \
164 static inline void store ( T& location, T value ) { \
165 __TBB_machine_store##S##_relaxed(&location, (V)value); \
171 __TBB_MACHINE_DEFINE_ATOMICS(1,int8_t);
172 __TBB_MACHINE_DEFINE_ATOMICS(2,int16_t);
173 __TBB_MACHINE_DEFINE_ATOMICS(4,int32_t);
174 __TBB_MACHINE_DEFINE_ATOMICS(8,int64_t);
175 }} // namespaces internal, tbb
177 #undef __TBB_MACHINE_DEFINE_ATOMICS
179 #define __TBB_USE_FENCED_ATOMICS 1
180 #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
182 // Definition of Lock functions
183 #define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P)
184 #define __TBB_LockByte(P) __TBB_machine_lockbyte(P)
186 // Definition of other utility functions
187 #define __TBB_Pause(V) __TBB_machine_pause(V)
188 #define __TBB_Log2(V) __TBB_machine_lg(V)