2 Copyright 2005-2011 Intel Corporation. All Rights Reserved.
4 This file is part of Threading Building Blocks.
6 Threading Building Blocks is free software; you can redistribute it
7 and/or modify it under the terms of the GNU General Public License
8 version 2 as published by the Free Software Foundation.
10 Threading Building Blocks is distributed in the hope that it will be
11 useful, but WITHOUT ANY WARRANTY; without even the implied warranty
12 of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with Threading Building Blocks; if not, write to the Free Software
17 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 As a special exception, you may use this file as part of a free software
20 library without restriction. Specifically, if other files instantiate
21 templates or use macros or inline functions from this file, or you compile
22 this file and link it with other files to produce an executable, this
23 file does not by itself cause the resulting executable to be covered by
24 the GNU General Public License. This exception does not however
25 invalidate any other reasons why the executable file might be covered by
26 the GNU General Public License.
29 #if !defined(__TBB_machine_H) || defined(__TBB_machine_windows_ia32_H)
30 #error Do not include this file directly; include tbb_machine.h instead
33 #define __TBB_machine_windows_ia32_H
35 #define __TBB_WORDSIZE 4
36 #define __TBB_BIG_ENDIAN 0
39 #define __TBB_compiler_fence() __asm { __asm nop }
40 #elif _MSC_VER >= 1300
41 extern "C" void _ReadWriteBarrier();
42 #pragma intrinsic(_ReadWriteBarrier)
43 #define __TBB_compiler_fence() _ReadWriteBarrier()
45 #error Unsupported compiler - need to define __TBB_{control,acquire,release}_consistency_helper to support it
48 #define __TBB_control_consistency_helper() __TBB_compiler_fence()
49 #define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
50 #define __TBB_release_consistency_helper() __TBB_compiler_fence()
51 #define __TBB_full_memory_fence() __asm { __asm mfence }
53 #if defined(_MSC_VER) && !defined(__INTEL_COMPILER)
54 // Workaround for overzealous compiler warnings in /Wp64 mode
55 #pragma warning (push)
56 #pragma warning (disable: 4244 4267)
60 __int64 __TBB_EXPORTED_FUNC __TBB_machine_cmpswp8 (volatile void *ptr, __int64 value, __int64 comparand );
61 __int64 __TBB_EXPORTED_FUNC __TBB_machine_fetchadd8 (volatile void *ptr, __int64 addend );
62 __int64 __TBB_EXPORTED_FUNC __TBB_machine_fetchstore8 (volatile void *ptr, __int64 value );
63 void __TBB_EXPORTED_FUNC __TBB_machine_store8 (volatile void *ptr, __int64 value );
64 __int64 __TBB_EXPORTED_FUNC __TBB_machine_load8 (const volatile void *ptr);
67 #define __TBB_MACHINE_DEFINE_ATOMICS(S,T,U,A,C) \
68 static inline T __TBB_machine_cmpswp##S ( volatile void * ptr, U value, U comparand ) { \
70 volatile T *p = (T *)ptr; \
75 __asm mov A , comparand \
76 __asm lock cmpxchg [edx], C \
82 static inline T __TBB_machine_fetchadd##S ( volatile void * ptr, U addend ) { \
84 volatile T *p = (T *)ptr; \
89 __asm lock xadd [edx], A \
95 static inline T __TBB_machine_fetchstore##S ( volatile void * ptr, U value ) { \
97 volatile T *p = (T *)ptr; \
102 __asm lock xchg [edx], A \
103 __asm mov result, A \
109 __TBB_MACHINE_DEFINE_ATOMICS(1, __int8, __int8, al, cl)
110 __TBB_MACHINE_DEFINE_ATOMICS(2, __int16, __int16, ax, cx)
111 __TBB_MACHINE_DEFINE_ATOMICS(4, ptrdiff_t, ptrdiff_t, eax, ecx)
113 #undef __TBB_MACHINE_DEFINE_ATOMICS
115 static inline __int32 __TBB_machine_lg( unsigned __int64 i ) {
125 static inline void __TBB_machine_OR( volatile void *operand, __int32 addend ) {
134 static inline void __TBB_machine_AND( volatile void *operand, __int32 addend ) {
143 static inline void __TBB_machine_pause (__int32 delay ) {
155 #define __TBB_AtomicOR(P,V) __TBB_machine_OR(P,V)
156 #define __TBB_AtomicAND(P,V) __TBB_machine_AND(P,V)
158 #define __TBB_USE_FETCHSTORE_AS_FULL_FENCED_STORE 1
159 #define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
160 #define __TBB_USE_GENERIC_RELAXED_LOAD_STORE 1
162 // Definition of other functions
163 extern "C" __declspec(dllimport) int __stdcall SwitchToThread( void );
164 #define __TBB_Yield() SwitchToThread()
165 #define __TBB_Pause(V) __TBB_machine_pause(V)
166 #define __TBB_Log2(V) __TBB_machine_lg(V)
168 #if defined(_MSC_VER)&&_MSC_VER<1400
169 static inline void* __TBB_machine_get_current_teb () {
171 __asm mov eax, fs:[0x18]
177 #if defined(_MSC_VER) && !defined(__INTEL_COMPILER)
178 #pragma warning (pop)
179 #endif // warnings 4244, 4267 are back
181 // API to retrieve/update FPU control setting
182 #define __TBB_CPU_CTL_ENV_PRESENT 1
184 struct __TBB_cpu_ctl_env_t {
188 inline void __TBB_get_cpu_ctl_env ( __TBB_cpu_ctl_env_t* ctl ) {
195 inline void __TBB_set_cpu_ctl_env ( const __TBB_cpu_ctl_env_t* ctl ) {