git.sesse.net Git - casparcg/blob - tbb30_20100406oss/include/tbb/machine/linux_intel64.h

   1 /*
   2     Copyright 2005-2010 Intel Corporation.  All Rights Reserved.
   3
   4     This file is part of Threading Building Blocks.
   5
   6     Threading Building Blocks is free software; you can redistribute it
   7     and/or modify it under the terms of the GNU General Public License
   8     version 2 as published by the Free Software Foundation.
   9
  10     Threading Building Blocks is distributed in the hope that it will be
  11     useful, but WITHOUT ANY WARRANTY; without even the implied warranty
  12     of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with Threading Building Blocks; if not, write to the Free Software
  17     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  18
  19     As a special exception, you may use this file as part of a free software
  20     library without restriction.  Specifically, if other files instantiate
  21     templates or use macros or inline functions from this file, or you compile
  22     this file and link it with other files to produce an executable, this
  23     file does not by itself cause the resulting executable to be covered by
  24     the GNU General Public License.  This exception does not however
  25     invalidate any other reasons why the executable file might be covered by
  26     the GNU General Public License.
  27 */
  28
  29 #ifndef __TBB_machine_H
  30 #error Do not include this file directly; include tbb_machine.h instead
  31 #endif
  32
  33 #include "linux_common.h"
  34
  35 #define __TBB_WORDSIZE 8
  36 #define __TBB_BIG_ENDIAN 0
  37
  38 #define __TBB_release_consistency_helper() __asm__ __volatile__("": : :"memory")
  39
  40 #ifndef __TBB_rel_acq_fence
  41 inline void __TBB_rel_acq_fence() { __asm__ __volatile__("mfence": : :"memory"); }
  42 #endif
  43
  44 #define __MACHINE_DECL_ATOMICS(S,T,X) \
  45 static inline T __TBB_machine_cmpswp##S (volatile void *ptr, T value, T comparand )  \
  46 {                                                                                    \
  47     T result;                                                                        \
  48                                                                                      \
  49     __asm__ __volatile__("lock\ncmpxchg" X " %2,%1"                                  \
  50                           : "=a"(result), "=m"(*(volatile T*)ptr)                    \
  51                           : "q"(value), "0"(comparand), "m"(*(volatile T*)ptr)       \
  52                           : "memory");                                               \
  53     return result;                                                                   \
  54 }                                                                                    \
  55                                                                                      \
  56 static inline T __TBB_machine_fetchadd##S(volatile void *ptr, T addend)              \
  57 {                                                                                    \
  58     T result;                                                                        \
  59     __asm__ __volatile__("lock\nxadd" X " %0,%1"                                     \
  60                           : "=r"(result),"=m"(*(volatile T*)ptr)                     \
  61                           : "0"(addend), "m"(*(volatile T*)ptr)                      \
  62                           : "memory");                                               \
  63     return result;                                                                   \
  64 }                                                                                    \
  65                                                                                      \
  66 static inline  T __TBB_machine_fetchstore##S(volatile void *ptr, T value)            \
  67 {                                                                                    \
  68     T result;                                                                        \
  69     __asm__ __volatile__("lock\nxchg" X " %0,%1"                                     \
  70                           : "=r"(result),"=m"(*(volatile T*)ptr)                     \
  71                           : "0"(value), "m"(*(volatile T*)ptr)                       \
  72                           : "memory");                                               \
  73     return result;                                                                   \
  74 }                                                                                    \
  75
  76 __MACHINE_DECL_ATOMICS(1,int8_t,"")
  77 __MACHINE_DECL_ATOMICS(2,int16_t,"")
  78 __MACHINE_DECL_ATOMICS(4,int32_t,"")
  79 __MACHINE_DECL_ATOMICS(8,int64_t,"q")
  80
  81 static inline int64_t __TBB_machine_lg( uint64_t x ) {
  82     int64_t j;
  83     __asm__ ("bsr %1,%0" : "=r"(j) : "r"(x));
  84     return j;
  85 }
  86
  87 static inline void __TBB_machine_or( volatile void *ptr, uint64_t addend ) {
  88     __asm__ __volatile__("lock\norq %1,%0" : "=m"(*(volatile uint64_t*)ptr) : "r"(addend), "m"(*(volatile uint64_t*)ptr) : "memory");
  89 }
  90
  91 static inline void __TBB_machine_and( volatile void *ptr, uint64_t addend ) {
  92     __asm__ __volatile__("lock\nandq %1,%0" : "=m"(*(volatile uint64_t*)ptr) : "r"(addend), "m"(*(volatile uint64_t*)ptr) : "memory");
  93 }
  94
  95 static inline void __TBB_machine_pause( int32_t delay ) {
  96     for (int32_t i = 0; i < delay; i++) {
  97        __asm__ __volatile__("pause;");
  98     }
  99     return;
 100 }
 101
 102 // Machine specific atomic operations
 103
 104 #define __TBB_CompareAndSwap1(P,V,C) __TBB_machine_cmpswp1(P,V,C)
 105 #define __TBB_CompareAndSwap2(P,V,C) __TBB_machine_cmpswp2(P,V,C)
 106 #define __TBB_CompareAndSwap4(P,V,C) __TBB_machine_cmpswp4(P,V,C)
 107 #define __TBB_CompareAndSwap8(P,V,C) __TBB_machine_cmpswp8(P,V,C)
 108 #define __TBB_CompareAndSwapW(P,V,C) __TBB_machine_cmpswp8(P,V,C)
 109
 110 #define __TBB_FetchAndAdd1(P,V) __TBB_machine_fetchadd1(P,V)
 111 #define __TBB_FetchAndAdd2(P,V) __TBB_machine_fetchadd2(P,V)
 112 #define __TBB_FetchAndAdd4(P,V) __TBB_machine_fetchadd4(P,V)
 113 #define __TBB_FetchAndAdd8(P,V)  __TBB_machine_fetchadd8(P,V)
 114 #define __TBB_FetchAndAddW(P,V)  __TBB_machine_fetchadd8(P,V)
 115
 116 #define __TBB_FetchAndStore1(P,V) __TBB_machine_fetchstore1(P,V)
 117 #define __TBB_FetchAndStore2(P,V) __TBB_machine_fetchstore2(P,V)
 118 #define __TBB_FetchAndStore4(P,V) __TBB_machine_fetchstore4(P,V)
 119 #define __TBB_FetchAndStore8(P,V)  __TBB_machine_fetchstore8(P,V)
 120 #define __TBB_FetchAndStoreW(P,V)  __TBB_machine_fetchstore8(P,V)
 121
 122 #define __TBB_Store8(P,V) (*P = V)
 123 #define __TBB_Load8(P)    (*P)
 124
 125 #define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)
 126 #define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)
 127
 128 // Definition of other functions
 129 #ifndef __TBB_Pause
 130 #define __TBB_Pause(V) __TBB_machine_pause(V)
 131 #endif
 132 #define __TBB_Log2(V)    __TBB_machine_lg(V)
 133
 134 // Special atomic functions
 135 #define __TBB_FetchAndAddWrelease(P,V) __TBB_FetchAndAddW(P,V)
 136 #define __TBB_FetchAndIncrementWacquire(P) __TBB_FetchAndAddW(P,1)
 137 #define __TBB_FetchAndDecrementWrelease(P) __TBB_FetchAndAddW(P,-1)
 138
 139 // Use generic definitions from tbb_machine.h
 140 #undef __TBB_TryLockByte
 141 #undef __TBB_LockByte