1 /* ======================================================================== */
2 /* ========================= LICENSING & COPYRIGHT ======================== */
3 /* ======================================================================== */
8 * A portable Motorola M680x0 processor emulation engine.
9 * Copyright Karl Stenerud. All rights reserved.
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this software and associated documentation files (the "Software"), to deal
13 * in the Software without restriction, including without limitation the rights
14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
15 * copies of the Software, and to permit persons to whom the Software is
16 * furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
33 #ifndef M68KCPU__HEADER
34 #define M68KCPU__HEADER
48 /* ======================================================================== */
49 /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
50 /* ======================================================================== */
52 /* Check for > 32bit sizes */
53 #if UINT_MAX > 0xffffffff
54 #define M68K_INT_GT_32_BIT 1
56 #define M68K_INT_GT_32_BIT 0
59 /* Data types used in this emulation core */
71 typedef signed char sint8; /* ASG: changed from char to signed char */
72 typedef signed short sint16;
73 typedef signed int sint32; /* AWJ: changed from long to int */
74 typedef unsigned char uint8;
75 typedef unsigned short uint16;
76 typedef unsigned int uint32; /* AWJ: changed from long to int */
78 /* signed and unsigned int must be at least 32 bits wide */
79 typedef signed int sint;
80 typedef unsigned int uint;
84 typedef signed long long sint64;
85 typedef unsigned long long uint64;
87 typedef sint32 sint64;
88 typedef uint32 uint64;
89 #endif /* M68K_USE_64_BIT */
91 /* U64 and S64 are used to wrap long integer constants. */
93 #define U64(val) val##ULL
94 #define S64(val) val##LL
100 #include "softfloat/milieu.h"
101 #include "softfloat/softfloat.h"
104 /* Allow for architectures that don't have 8-bit sizes */
105 #if UCHAR_MAX == 0xff
106 #define MAKE_INT_8(A) (sint8)(A)
109 #define sint8 signed int
111 #define uint8 unsigned int
112 static inline sint MAKE_INT_8(uint value)
114 return (value & 0x80) ? value | ~0xff : value & 0xff;
116 #endif /* UCHAR_MAX == 0xff */
119 /* Allow for architectures that don't have 16-bit sizes */
120 #if USHRT_MAX == 0xffff
121 #define MAKE_INT_16(A) (sint16)(A)
124 #define sint16 signed int
126 #define uint16 unsigned int
127 static inline sint MAKE_INT_16(uint value)
129 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
131 #endif /* USHRT_MAX == 0xffff */
134 /* Allow for architectures that don't have 32-bit sizes */
135 #if UINT_MAX == 0xffffffff
136 #define MAKE_INT_32(A) (sint32)(A)
139 #define sint32 signed int
141 #define uint32 unsigned int
142 static inline sint MAKE_INT_32(uint value)
144 return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
146 #endif /* UINT_MAX == 0xffffffff */
148 /* ======================================================================== */
149 /* ============================ GENERAL DEFINES =========================== */
150 /* ======================================================================== */
153 #define MMU_ATC_ENTRIES 22 // 68851 has 64, 030 has 22
155 /* instruction cache constants */
156 #define M68K_IC_SIZE 128
158 /* Exception Vectors handled by emulation */
159 #define EXCEPTION_RESET 0
160 #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
161 #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
162 #define EXCEPTION_ILLEGAL_INSTRUCTION 4
163 #define EXCEPTION_ZERO_DIVIDE 5
164 #define EXCEPTION_CHK 6
165 #define EXCEPTION_TRAPV 7
166 #define EXCEPTION_PRIVILEGE_VIOLATION 8
167 #define EXCEPTION_TRACE 9
168 #define EXCEPTION_1010 10
169 #define EXCEPTION_1111 11
170 #define EXCEPTION_FORMAT_ERROR 14
171 #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
172 #define EXCEPTION_SPURIOUS_INTERRUPT 24
173 #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
174 #define EXCEPTION_TRAP_BASE 32
175 #define EXCEPTION_MMU_CONFIGURATION 56 // only on 020/030
177 /* Function codes set by CPU during data/address bus activity */
178 #define FUNCTION_CODE_USER_DATA 1
179 #define FUNCTION_CODE_USER_PROGRAM 2
180 #define FUNCTION_CODE_SUPERVISOR_DATA 5
181 #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
182 #define FUNCTION_CODE_CPU_SPACE 7
184 /* CPU types for deciding what to emulate */
185 #define CPU_TYPE_000 (0x00000001)
186 #define CPU_TYPE_008 (0x00000002)
187 #define CPU_TYPE_010 (0x00000004)
188 #define CPU_TYPE_EC020 (0x00000008)
189 #define CPU_TYPE_020 (0x00000010)
190 #define CPU_TYPE_EC030 (0x00000020)
191 #define CPU_TYPE_030 (0x00000040)
192 #define CPU_TYPE_EC040 (0x00000080)
193 #define CPU_TYPE_LC040 (0x00000100)
194 #define CPU_TYPE_040 (0x00000200)
195 #define CPU_TYPE_SCC070 (0x00000400)
197 /* Different ways to stop the CPU */
198 #define STOP_LEVEL_STOP 1
199 #define STOP_LEVEL_HALT 2
201 /* Used for 68000 address error processing */
202 #define INSTRUCTION_YES 0
203 #define INSTRUCTION_NO 0x08
204 #define MODE_READ 0x10
207 #define RUN_MODE_NORMAL 0
208 #define RUN_MODE_BERR_AERR_RESET_WSF 1 // writing the stack frame
209 #define RUN_MODE_BERR_AERR_RESET 2 // stack frame done
211 #define M68K_CACR_IBE 0x10 // Instruction Burst Enable
212 #define M68K_CACR_CI 0x08 // Clear Instruction Cache
213 #define M68K_CACR_CEI 0x04 // Clear Entry in Instruction Cache
214 #define M68K_CACR_FI 0x02 // Freeze Instruction Cache
215 #define M68K_CACR_EI 0x01 // Enable Instruction Cache
218 #define NULL ((void*)0)
221 /* ======================================================================== */
222 /* ================================ MACROS ================================ */
223 /* ======================================================================== */
226 /* ---------------------------- General Macros ---------------------------- */
228 /* Bit Isolation Macros */
229 #define BIT_0(A) ((A) & 0x00000001)
230 #define BIT_1(A) ((A) & 0x00000002)
231 #define BIT_2(A) ((A) & 0x00000004)
232 #define BIT_3(A) ((A) & 0x00000008)
233 #define BIT_4(A) ((A) & 0x00000010)
234 #define BIT_5(A) ((A) & 0x00000020)
235 #define BIT_6(A) ((A) & 0x00000040)
236 #define BIT_7(A) ((A) & 0x00000080)
237 #define BIT_8(A) ((A) & 0x00000100)
238 #define BIT_9(A) ((A) & 0x00000200)
239 #define BIT_A(A) ((A) & 0x00000400)
240 #define BIT_B(A) ((A) & 0x00000800)
241 #define BIT_C(A) ((A) & 0x00001000)
242 #define BIT_D(A) ((A) & 0x00002000)
243 #define BIT_E(A) ((A) & 0x00004000)
244 #define BIT_F(A) ((A) & 0x00008000)
245 #define BIT_10(A) ((A) & 0x00010000)
246 #define BIT_11(A) ((A) & 0x00020000)
247 #define BIT_12(A) ((A) & 0x00040000)
248 #define BIT_13(A) ((A) & 0x00080000)
249 #define BIT_14(A) ((A) & 0x00100000)
250 #define BIT_15(A) ((A) & 0x00200000)
251 #define BIT_16(A) ((A) & 0x00400000)
252 #define BIT_17(A) ((A) & 0x00800000)
253 #define BIT_18(A) ((A) & 0x01000000)
254 #define BIT_19(A) ((A) & 0x02000000)
255 #define BIT_1A(A) ((A) & 0x04000000)
256 #define BIT_1B(A) ((A) & 0x08000000)
257 #define BIT_1C(A) ((A) & 0x10000000)
258 #define BIT_1D(A) ((A) & 0x20000000)
259 #define BIT_1E(A) ((A) & 0x40000000)
260 #define BIT_1F(A) ((A) & 0x80000000)
262 /* Get the most significant bit for specific sizes */
263 #define GET_MSB_8(A) ((A) & 0x80)
264 #define GET_MSB_9(A) ((A) & 0x100)
265 #define GET_MSB_16(A) ((A) & 0x8000)
266 #define GET_MSB_17(A) ((A) & 0x10000)
267 #define GET_MSB_32(A) ((A) & 0x80000000)
269 #define GET_MSB_33(A) ((A) & 0x100000000)
270 #endif /* M68K_USE_64_BIT */
272 /* Isolate nibbles */
273 #define LOW_NIBBLE(A) ((A) & 0x0f)
274 #define HIGH_NIBBLE(A) ((A) & 0xf0)
276 /* These are used to isolate 8, 16, and 32 bit sizes */
277 #define MASK_OUT_ABOVE_2(A) ((A) & 3)
278 #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
279 #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
280 #define MASK_OUT_BELOW_2(A) ((A) & ~3)
281 #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
282 #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
284 /* No need to mask if we are 32 bit */
285 #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
286 #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
287 #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
289 #define MASK_OUT_ABOVE_32(A) (A)
290 #define MASK_OUT_BELOW_32(A) 0
291 #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
293 /* Simulate address lines of 68k family */
294 #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
297 /* Shift & Rotate Macros. */
298 #define LSL(A, C) ((A) << (C))
299 #define LSR(A, C) ((A) >> (C))
301 /* Some > 32-bit optimizations */
302 #if M68K_INT_GT_32_BIT
303 /* Shift left and right */
304 #define LSR_32(A, C) ((A) >> (C))
305 #define LSL_32(A, C) ((A) << (C))
307 /* We have to do this because the morons at ANSI decided that shifts
308 * by >= data size are undefined.
310 #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
311 #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
312 #endif /* M68K_INT_GT_32_BIT */
315 #define LSL_32_64(A, C) ((A) << (C))
316 #define LSR_32_64(A, C) ((A) >> (C))
317 #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
318 #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
319 #endif /* M68K_USE_64_BIT */
321 #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
322 #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
323 #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
324 #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
325 #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
326 #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
328 #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
329 #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
330 #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
331 #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
332 #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
333 #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
337 /* ------------------------------ CPU Access ------------------------------ */
339 /* Access the CPU registers */
340 #define CPU_TYPE state->cpu_type
342 #define REG_DA state->dar /* easy access to data and address regs */
343 #define REG_DA_SAVE state->dar_save
344 #define REG_D state->dar
345 #define REG_A (state->dar+8)
346 #define REG_PPC state->ppc
347 #define REG_PC state->pc
348 #define REG_SP_BASE state->sp
349 #define REG_USP state->sp[0]
350 #define REG_ISP state->sp[4]
351 #define REG_MSP state->sp[6]
352 #define REG_SP state->dar[15]
353 #define REG_VBR state->vbr
354 #define REG_SFC state->sfc
355 #define REG_DFC state->dfc
356 #define REG_CACR state->cacr
357 #define REG_CAAR state->caar
358 #define REG_IR state->ir
360 #define REG_FP state->fpr
361 #define REG_FPCR state->fpcr
362 #define REG_FPSR state->fpsr
363 #define REG_FPIAR state->fpiar
365 #define FLAG_T1 state->t1_flag
366 #define FLAG_T0 state->t0_flag
367 #define FLAG_S state->s_flag
368 #define FLAG_M state->m_flag
369 #define FLAG_X state->x_flag
370 #define FLAG_N state->n_flag
371 #define FLAG_Z state->not_z_flag
372 #define FLAG_V state->v_flag
373 #define FLAG_C state->c_flag
374 #define FLAG_INT_MASK state->int_mask
376 #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
377 #define CPU_STOPPED m68ki_cpu.stopped
378 #define CPU_PREF_ADDR state->pref_addr
379 #define CPU_PREF_DATA state->pref_data
380 #define CPU_ADDRESS_MASK state->address_mask
381 #define CPU_SR_MASK state->sr_mask
382 #define CPU_INSTR_MODE state->instr_mode
383 #define CPU_RUN_MODE state->run_mode
385 #define CYC_INSTRUCTION state->cyc_instruction
386 #define CYC_EXCEPTION state->cyc_exception
387 #define CYC_BCC_NOTAKE_B state->cyc_bcc_notake_b
388 #define CYC_BCC_NOTAKE_W state->cyc_bcc_notake_w
389 #define CYC_DBCC_F_NOEXP state->cyc_dbcc_f_noexp
390 #define CYC_DBCC_F_EXP state->cyc_dbcc_f_exp
391 #define CYC_SCC_R_TRUE state->cyc_scc_r_true
392 #define CYC_MOVEM_W state->cyc_movem_w
393 #define CYC_MOVEM_L state->cyc_movem_l
394 #define CYC_SHIFT state->cyc_shift
395 #define CYC_RESET state->cyc_reset
396 #define HAS_PMMU state->has_pmmu
397 #define HAS_FPU state->has_fpu
398 #define PMMU_ENABLED state->pmmu_enabled
399 #define RESET_CYCLES state->reset_cycles
402 #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
403 #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
404 #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
405 #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
406 #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
407 #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
408 #define CALLBACK_ILLG_INSTR m68ki_cpu.illg_instr_callback
409 #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
410 #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
411 #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
415 /* ----------------------------- Configuration ---------------------------- */
417 /* These defines are dependant on the configuration defines in m68kconf.h */
419 /* Disable certain comparisons if we're not using all CPU types */
421 #define CPU_TYPE_IS_040_PLUS(A) ((A) & (CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
422 #define CPU_TYPE_IS_040_LESS(A) 1
424 #define CPU_TYPE_IS_040_PLUS(A) 0
425 #define CPU_TYPE_IS_040_LESS(A) 1
429 #define CPU_TYPE_IS_030_PLUS(A) ((A) & (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
430 #define CPU_TYPE_IS_030_LESS(A) 1
432 #define CPU_TYPE_IS_030_PLUS(A) 0
433 #define CPU_TYPE_IS_030_LESS(A) 1
437 #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
438 #define CPU_TYPE_IS_020_LESS(A) 1
440 #define CPU_TYPE_IS_020_PLUS(A) 0
441 #define CPU_TYPE_IS_020_LESS(A) 1
444 #if M68K_EMULATE_EC020
445 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
446 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010 | CPU_TYPE_EC020))
448 #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
449 #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
453 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
454 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_LC040))
455 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
457 #define CPU_TYPE_IS_010(A) 0
458 #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
459 #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
462 #if M68K_EMULATE_020 || M68K_EMULATE_EC020
463 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
465 #define CPU_TYPE_IS_020_VARIANT(A) 0
468 #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
469 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000)
471 #define CPU_TYPE_IS_000(A) 1
475 #if !M68K_SEPARATE_READS
476 #define m68k_read_immediate_16(state, A) m68ki_read_program_16(state, A)
477 #define m68k_read_immediate_32(state, A) m68ki_read_program_32(state, A)
479 #define m68k_read_pcrelative_8(state, A) m68ki_read_program_8(state, A)
480 #define m68k_read_pcrelative_16(state, A) m68ki_read_program_16(state, A)
481 #define m68k_read_pcrelative_32(state, A) m68ki_read_program_32(state, A)
482 #endif /* M68K_SEPARATE_READS */
485 /* Enable or disable callback functions */
486 #if M68K_EMULATE_INT_ACK
487 #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
488 #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
490 #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
493 /* Default action is to used autovector mode, which is most common */
494 #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
495 #endif /* M68K_EMULATE_INT_ACK */
497 #if M68K_EMULATE_BKPT_ACK
498 #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
499 #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
501 #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
504 #define m68ki_bkpt_ack(A)
505 #endif /* M68K_EMULATE_BKPT_ACK */
507 #if M68K_EMULATE_RESET
508 #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
509 #define m68ki_output_reset() M68K_RESET_CALLBACK()
511 #define m68ki_output_reset() CALLBACK_RESET_INSTR()
514 #define m68ki_output_reset()
515 #endif /* M68K_EMULATE_RESET */
517 #if M68K_CMPILD_HAS_CALLBACK
518 #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
519 #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
521 #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
524 #define m68ki_cmpild_callback(v,r)
525 #endif /* M68K_CMPILD_HAS_CALLBACK */
527 #if M68K_RTE_HAS_CALLBACK
528 #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
529 #define m68ki_rte_callback() M68K_RTE_CALLBACK()
531 #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
534 #define m68ki_rte_callback()
535 #endif /* M68K_RTE_HAS_CALLBACK */
537 #if M68K_TAS_HAS_CALLBACK
538 #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
539 #define m68ki_tas_callback() M68K_TAS_CALLBACK()
541 #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
544 #define m68ki_tas_callback() 1
545 #endif /* M68K_TAS_HAS_CALLBACK */
547 #if M68K_ILLG_HAS_CALLBACK
548 #if M68K_ILLG_HAS_CALLBACK == OPT_SPECIFY_HANDLER
549 #define m68ki_illg_callback(opcode) M68K_ILLG_CALLBACK(opcode)
551 #define m68ki_illg_callback(opcode) CALLBACK_ILLG_INSTR(opcode)
554 #define m68ki_illg_callback(opcode) 0 // Default is 0 = not handled, exception will occur
555 #endif /* M68K_ILLG_HAS_CALLBACK */
557 #if M68K_INSTRUCTION_HOOK
558 #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
559 #define m68ki_instr_hook(pc) M68K_INSTRUCTION_CALLBACK(pc)
561 #define m68ki_instr_hook(pc) CALLBACK_INSTR_HOOK(pc)
564 #define m68ki_instr_hook(pc)
565 #endif /* M68K_INSTRUCTION_HOOK */
568 #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
569 #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
571 #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
574 #define m68ki_pc_changed(A)
575 #endif /* M68K_MONITOR_PC */
578 /* Enable or disable function code emulation */
580 #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
581 #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
583 #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
585 #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
586 #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
587 #define m68ki_get_address_space() m68ki_address_space
589 #define m68ki_set_fc(A)
590 #define m68ki_use_data_space()
591 #define m68ki_use_program_space()
592 #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
593 #endif /* M68K_EMULATE_FC */
596 /* Enable or disable trace emulation */
597 #if M68K_EMULATE_TRACE
598 /* Initiates trace checking before each instruction (t1) */
599 #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
600 /* adds t0 to trace checking if we encounter change of flow */
601 #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
602 /* Clear all tracing */
603 #define m68ki_clear_trace() m68ki_tracing = 0
604 /* Cause a trace exception if we are tracing */
605 #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
607 #define m68ki_trace_t1()
608 #define m68ki_trace_t0()
609 #define m68ki_clear_trace()
610 #define m68ki_exception_if_trace()
611 #endif /* M68K_EMULATE_TRACE */
616 #if M68K_EMULATE_ADDRESS_ERROR
619 /* sigjmp() on Mac OS X and *BSD in general saves signal contexts and is super-slow, use sigsetjmp() to tell it not to */
621 extern sigjmp_buf m68ki_aerr_trap;
622 #define m68ki_set_address_error_trap(state) \
623 if(sigsetjmp(m68ki_aerr_trap, 0) != 0) \
625 m68ki_exception_address_error(state); \
628 if (m68ki_remaining_cycles > 0) \
629 m68ki_remaining_cycles = 0; \
630 return m68ki_initial_cycles; \
634 #define m68ki_check_address_error(state, ADDR, WRITE_MODE, FC) \
637 m68ki_aerr_address = ADDR; \
638 m68ki_aerr_write_mode = WRITE_MODE; \
639 m68ki_aerr_fc = FC; \
640 siglongjmp(m68ki_aerr_trap, 1); \
643 extern jmp_buf m68ki_aerr_trap;
644 #define m68ki_set_address_error_trap(state) \
645 if(setjmp(m68ki_aerr_trap) != 0) \
647 m68ki_exception_address_error(); \
651 return m68ki_initial_cycles; \
653 /* ensure we don't re-enter execution loop after an
654 address error if there's no more cycles remaining */ \
655 if(GET_CYCLES() <= 0) \
657 /* return how many clocks we used */ \
658 return m68ki_initial_cycles - GET_CYCLES(); \
662 #define m68ki_check_address_error(state, ADDR, WRITE_MODE, FC) \
665 m68ki_aerr_address = ADDR; \
666 m68ki_aerr_write_mode = WRITE_MODE; \
667 m68ki_aerr_fc = FC; \
668 longjmp(m68ki_aerr_trap, 1); \
671 #define m68ki_bus_error(ADDR,WRITE_MODE) m68ki_aerr_address=ADDR;m68ki_aerr_write_mode=WRITE_MODE;m68ki_exception_bus_error()
673 #define m68ki_check_address_error_010_less(state, ADDR, WRITE_MODE, FC) \
674 if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
676 m68ki_check_address_error(state, ADDR, WRITE_MODE, FC) \
679 #define m68ki_set_address_error_trap(state)
680 #define m68ki_check_address_error(state, ADDR, WRITE_MODE, FC)
681 #define m68ki_check_address_error_010_less(state, ADDR, WRITE_MODE, FC)
682 #endif /* M68K_ADDRESS_ERROR */
687 // extern FILE* M68K_LOG_FILEHANDLE;
688 extern const char *const m68ki_cpu_names[];
690 #define M68K_DO_LOG(A) do{printf("*************");printf A;}while(0) //if(M68K_LOG_FILEHANDLE) fprintf A
691 #if M68K_LOG_1010_1111
692 #define M68K_DO_LOG_EMU(A) printf A //if(M68K_LOG_FILEHANDLE) fprintf A
694 #define M68K_DO_LOG_EMU(A)
697 #define M68K_DO_LOG(A)
698 #define M68K_DO_LOG_EMU(A)
703 /* -------------------------- EA / Operand Access ------------------------- */
706 * The general instruction format follows this pattern:
707 * .... XXX. .... .YYY
708 * where XXX is register X and YYY is register Y
710 /* Data Register Isolation */
711 #define DX (REG_D[(REG_IR >> 9) & 7])
712 #define DY (REG_D[REG_IR & 7])
713 /* Address Register Isolation */
714 #define AX (REG_A[(REG_IR >> 9) & 7])
715 #define AY (REG_A[REG_IR & 7])
718 /* Effective Address Calculations */
719 #define EA_AY_AI_8() AY /* address register indirect */
720 #define EA_AY_AI_16() EA_AY_AI_8()
721 #define EA_AY_AI_32() EA_AY_AI_8()
722 #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
723 #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
724 #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
725 #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
726 #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
727 #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
728 #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16(state))) /* displacement */
729 #define EA_AY_DI_16() EA_AY_DI_8()
730 #define EA_AY_DI_32() EA_AY_DI_8()
731 #define EA_AY_IX_8() m68ki_get_ea_ix(state, AY) /* indirect + index */
732 #define EA_AY_IX_16() EA_AY_IX_8()
733 #define EA_AY_IX_32() EA_AY_IX_8()
735 #define EA_AX_AI_8() AX
736 #define EA_AX_AI_16() EA_AX_AI_8()
737 #define EA_AX_AI_32() EA_AX_AI_8()
738 #define EA_AX_PI_8() (AX++)
739 #define EA_AX_PI_16() ((AX+=2)-2)
740 #define EA_AX_PI_32() ((AX+=4)-4)
741 #define EA_AX_PD_8() (--AX)
742 #define EA_AX_PD_16() (AX-=2)
743 #define EA_AX_PD_32() (AX-=4)
744 #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16(state)))
745 #define EA_AX_DI_16() EA_AX_DI_8()
746 #define EA_AX_DI_32() EA_AX_DI_8()
747 #define EA_AX_IX_8() m68ki_get_ea_ix(state, AX)
748 #define EA_AX_IX_16() EA_AX_IX_8()
749 #define EA_AX_IX_32() EA_AX_IX_8()
751 #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
752 #define EA_A7_PD_8() (REG_A[7]-=2)
754 #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16(state)) /* absolute word */
755 #define EA_AW_16() EA_AW_8()
756 #define EA_AW_32() EA_AW_8()
757 #define EA_AL_8() m68ki_read_imm_32(state) /* absolute long */
758 #define EA_AL_16() EA_AL_8()
759 #define EA_AL_32() EA_AL_8()
760 #define EA_PCDI_8() m68ki_get_ea_pcdi(state) /* pc indirect + displacement */
761 #define EA_PCDI_16() EA_PCDI_8()
762 #define EA_PCDI_32() EA_PCDI_8()
763 #define EA_PCIX_8() m68ki_get_ea_pcix(state) /* pc indirect + index */
764 #define EA_PCIX_16() EA_PCIX_8()
765 #define EA_PCIX_32() EA_PCIX_8()
768 #define OPER_I_8(state) m68ki_read_imm_8(state)
769 #define OPER_I_16(state) m68ki_read_imm_16(state)
770 #define OPER_I_32(state) m68ki_read_imm_32(state)
774 /* --------------------------- Status Register ---------------------------- */
776 /* Flag Calculation Macros */
777 #define CFLAG_8(A) (A)
778 #define CFLAG_16(A) ((A)>>8)
780 #if M68K_INT_GT_32_BIT
781 #define CFLAG_ADD_32(S, D, R) ((R)>>24)
782 #define CFLAG_SUB_32(S, D, R) ((R)>>24)
784 #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
785 #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
786 #endif /* M68K_INT_GT_32_BIT */
788 #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
789 #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
790 #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
792 #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
793 #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
794 #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
796 #define NFLAG_8(A) (A)
797 #define NFLAG_16(A) ((A)>>8)
798 #define NFLAG_32(A) ((A)>>24)
799 #define NFLAG_64(A) ((A)>>56)
801 #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
802 #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
803 #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
807 #define NFLAG_SET 0x80
808 #define NFLAG_CLEAR 0
809 #define CFLAG_SET 0x100
810 #define CFLAG_CLEAR 0
811 #define XFLAG_SET 0x100
812 #define XFLAG_CLEAR 0
813 #define VFLAG_SET 0x80
814 #define VFLAG_CLEAR 0
816 #define ZFLAG_CLEAR 0xffffffff
819 #define SFLAG_CLEAR 0
821 #define MFLAG_CLEAR 0
823 /* Turn flag values into 1 or 0 */
824 #define XFLAG_AS_1() ((FLAG_X>>8)&1)
825 #define NFLAG_AS_1() ((FLAG_N>>7)&1)
826 #define VFLAG_AS_1() ((FLAG_V>>7)&1)
827 #define ZFLAG_AS_1() (!FLAG_Z)
828 #define CFLAG_AS_1() ((FLAG_C>>8)&1)
832 #define COND_CS() (FLAG_C&0x100)
833 #define COND_CC() (!COND_CS())
834 #define COND_VS() (FLAG_V&0x80)
835 #define COND_VC() (!COND_VS())
836 #define COND_NE() FLAG_Z
837 #define COND_EQ() (!COND_NE())
838 #define COND_MI() (FLAG_N&0x80)
839 #define COND_PL() (!COND_MI())
840 #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
841 #define COND_GE() (!COND_LT())
842 #define COND_HI() (COND_CC() && COND_NE())
843 #define COND_LS() (COND_CS() || COND_EQ())
844 #define COND_GT() (COND_GE() && COND_NE())
845 #define COND_LE() (COND_LT() || COND_EQ())
847 /* Reversed conditions */
848 #define COND_NOT_CS() COND_CC()
849 #define COND_NOT_CC() COND_CS()
850 #define COND_NOT_VS() COND_VC()
851 #define COND_NOT_VC() COND_VS()
852 #define COND_NOT_NE() COND_EQ()
853 #define COND_NOT_EQ() COND_NE()
854 #define COND_NOT_MI() COND_PL()
855 #define COND_NOT_PL() COND_MI()
856 #define COND_NOT_LT() COND_GE()
857 #define COND_NOT_GE() COND_LT()
858 #define COND_NOT_HI() COND_LS()
859 #define COND_NOT_LS() COND_HI()
860 #define COND_NOT_GT() COND_LE()
861 #define COND_NOT_LE() COND_GT()
863 /* Not real conditions, but here for convenience */
864 #define COND_XS() (FLAG_X&0x100)
865 #define COND_XC() (!COND_XS)
868 /* Get the condition code register */
869 #define m68ki_get_ccr(state) ((COND_XS() >> 4) | \
875 /* Get the status register */
876 #define m68ki_get_sr(state) ( FLAG_T1 | \
881 m68ki_get_ccr(state))
885 /* ---------------------------- Cycle Counting ---------------------------- */
887 #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
888 #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
889 #define SET_CYCLES(A) m68ki_remaining_cycles = A
890 #define GET_CYCLES() m68ki_remaining_cycles
891 #define USE_ALL_CYCLES() m68ki_remaining_cycles %= CYC_INSTRUCTION[REG_IR]
895 /* ----------------------------- Read / Write ----------------------------- */
897 /* Read from the current address space */
898 #define m68ki_read_8(state, A) m68ki_read_8_fc (state, A, FLAG_S | m68ki_get_address_space())
899 #define m68ki_read_16(state, A) m68ki_read_16_fc(state, A, FLAG_S | m68ki_get_address_space())
900 #define m68ki_read_32(state, A) m68ki_read_32_fc(state, A, FLAG_S | m68ki_get_address_space())
902 /* Write to the current data space */
903 #define m68ki_write_8(state, A, V) m68ki_write_8_fc (state, A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
904 #define m68ki_write_16(state, A, V) m68ki_write_16_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
905 #define m68ki_write_32(state, A, V) m68ki_write_32_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
907 #if M68K_SIMULATE_PD_WRITES
908 #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
910 #define m68ki_write_32_pd(state, A, V) m68ki_write_32_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
913 /* Map PC-relative reads */
914 #define m68ki_read_pcrel_8(state, A) m68k_read_pcrelative_8(state, A)
915 #define m68ki_read_pcrel_16(state, A) m68k_read_pcrelative_16(state, A)
916 #define m68ki_read_pcrel_32(state, A) m68k_read_pcrelative_32(state, A)
918 /* Read from the program space */
919 #define m68ki_read_program_8(state, A) m68ki_read_8_fc(state, A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
920 #define m68ki_read_program_16(state, A) m68ki_read_16_fc(state, A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
921 #define m68ki_read_program_32(state, A) m68ki_read_32_fc(state, A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
923 /* Read from the data space */
924 #define m68ki_read_data_8(state, A) m68ki_read_8_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA)
925 #define m68ki_read_data_16(state, A) m68ki_read_16_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA)
926 #define m68ki_read_data_32(state, A) m68ki_read_32_fc(state, A, FLAG_S | FUNCTION_CODE_USER_DATA)
930 /* ======================================================================== */
931 /* =============================== PROTOTYPES ============================= */
932 /* ======================================================================== */
944 unsigned char *offset;
945 } address_translation_cache;
949 typedef struct m68ki_cpu_core
951 uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
952 uint dar[16]; /* Data and Address Registers */
953 uint dar_save[16]; /* Saved Data and Address Registers (pushed onto the
954 stack when a bus error occurs)*/
955 uint ppc; /* Previous program counter */
956 uint pc; /* Program Counter */
957 uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
958 uint vbr; /* Vector Base Register (m68010+) */
959 uint sfc; /* Source Function Code Register (m68010+) */
960 uint dfc; /* Destination Function Code Register (m68010+) */
961 uint cacr; /* Cache Control Register (m68020, unemulated) */
962 uint caar; /* Cache Address Register (m68020, unemulated) */
963 uint ir; /* Instruction Register */
964 floatx80 fpr[8]; /* FPU Data Register (m68030/040) */
965 uint fpiar; /* FPU Instruction Address Register (m68040) */
966 uint fpsr; /* FPU Status Register (m68040) */
967 uint fpcr; /* FPU Control Register (m68040) */
968 uint t1_flag; /* Trace 1 */
969 uint t0_flag; /* Trace 0 */
970 uint s_flag; /* Supervisor */
971 uint m_flag; /* Master/Interrupt state */
972 uint x_flag; /* Extend */
973 uint n_flag; /* Negative */
974 uint not_z_flag; /* Zero, inverted for speedups */
975 uint v_flag; /* Overflow */
976 uint c_flag; /* Carry */
977 uint int_mask; /* I0-I2 */
978 uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
979 uint stopped; /* Stopped state */
980 uint pref_addr; /* Last prefetch address */
981 uint pref_data; /* Data in the prefetch queue */
982 uint address_mask; /* Available address pins */
983 uint sr_mask; /* Implemented status register bits */
984 uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
985 uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
986 int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
987 int has_fpu; /* Indicates if a FPU available */
988 int pmmu_enabled; /* Indicates if the PMMU is enabled */
989 int fpu_just_reset; /* Indicates the FPU was just reset */
992 /* Clocks required for instructions / exceptions */
993 uint cyc_bcc_notake_b;
994 uint cyc_bcc_notake_w;
995 uint cyc_dbcc_f_noexp;
1003 /* Virtual IRQ lines state */
1007 /* PMMU registers */
1008 uint mmu_crp_aptr, mmu_crp_limit;
1009 uint mmu_srp_aptr, mmu_srp_limit;
1013 uint mmu_urp_aptr; /* 040 only */
1015 uint mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
1017 uint mmu_tt0, mmu_tt1;
1018 uint mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
1019 uint mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
1020 uint mmu_last_page_entry, mmu_last_page_entry_addr;
1022 uint16 mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
1023 uint16 mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
1024 uint16 mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
1025 uint8 mmu_tmp_sz; /* temporary hack: size for mmu */
1027 uint mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
1028 uint16 mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
1029 uint16 mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
1030 uint16 mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
1031 uint16 mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */
1033 uint8 mmu_tablewalk; /* set when MMU walks page tables */
1034 uint mmu_last_logical_addr;
1035 uint ic_address[M68K_IC_SIZE]; /* instruction cache address data */
1036 uint ic_data[M68K_IC_SIZE]; /* instruction cache content data */
1037 uint8 ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
1039 const uint8* cyc_instruction;
1040 const uint8* cyc_exception;
1042 /* Callbacks to host */
1043 int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
1044 void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
1045 void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
1046 void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
1047 void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
1048 int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
1049 int (*illg_instr_callback)(int); /* Called when an illegal instruction is encountered, allows handling */
1050 void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
1051 void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
1052 void (*instr_hook_callback)(unsigned int pc); /* Called every instruction cycle prior to execution */
1054 /* address translation caches */
1056 unsigned char read_ranges;
1057 unsigned int read_addr[8];
1058 unsigned int read_upper[8];
1059 unsigned char *read_data[8];
1060 unsigned char write_ranges;
1061 unsigned int write_addr[8];
1062 unsigned int write_upper[8];
1063 unsigned char *write_data[8];
1064 address_translation_cache code_translation_cache;
1070 extern m68ki_cpu_core m68ki_cpu;
1071 extern sint m68ki_remaining_cycles;
1072 extern uint m68ki_tracing;
1073 extern const uint8 m68ki_shift_8_table[];
1074 extern const uint16 m68ki_shift_16_table[];
1075 extern const uint m68ki_shift_32_table[];
1076 extern const uint8 m68ki_exception_cycle_table[][256];
1077 extern uint m68ki_address_space;
1078 extern const uint8 m68ki_ea_idx_cycle_table[];
1080 extern uint m68ki_aerr_address;
1081 extern uint m68ki_aerr_write_mode;
1082 extern uint m68ki_aerr_fc;
1084 /* Forward declarations to keep some of the macros happy */
1085 static inline uint m68ki_read_16_fc(m68ki_cpu_core *state, uint address, uint fc);
1086 static inline uint m68ki_read_32_fc(m68ki_cpu_core *state, uint address, uint fc);
1087 static inline uint m68ki_get_ea_ix(m68ki_cpu_core *state, uint An);
1088 static inline void m68ki_check_interrupts(m68ki_cpu_core *state); /* ASG: check for interrupts */
1090 /* quick disassembly (used for logging) */
1091 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
1094 /* ======================================================================== */
1095 /* =========================== UTILITY FUNCTIONS ========================== */
1096 /* ======================================================================== */
1099 /* ---------------------------- Read Immediate ---------------------------- */
1101 // clear the instruction cache
1102 inline void m68ki_ic_clear(m68ki_cpu_core *state)
1105 for (i=0; i< M68K_IC_SIZE; i++) {
1106 state->ic_address[i] = ~0;
1110 extern uint32 pmmu_translate_addr(m68ki_cpu_core *state, uint32 addr_in, uint16 rw);
1112 // read immediate word using the instruction cache
1114 static inline uint32 m68ki_ic_readimm16(m68ki_cpu_core *state, uint32 address)
1116 if (state->cacr & M68K_CACR_EI)
1118 // 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory)
1119 if (CPU_TYPE & (CPU_TYPE_EC020 | CPU_TYPE_020))
1121 uint32 tag = (address >> 8) | (state->s_flag ? 0x1000000 : 0);
1122 int idx = (address >> 2) & 0x3f; // 1-of-64 select
1124 // do a cache fill if the line is invalid or the tags don't match
1125 if ((!state->ic_valid[idx]) || (state->ic_address[idx] != tag))
1127 // if the cache is frozen, don't update it
1128 if (state->cacr & M68K_CACR_FI)
1130 return m68k_read_immediate_16(state, address);
1133 uint32 data = m68ki_read_32(state, address & ~3);
1135 //printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
1137 // if no buserror occurred, validate the tag
1138 if (!state->mmu_tmp_buserror_occurred)
1140 state->ic_address[idx] = tag;
1141 state->ic_data[idx] = data;
1142 state->ic_valid[idx] = 1;
1146 return m68k_read_immediate_16(state, address);
1150 // at this point, the cache is guaranteed to be valid, either as
1151 // a hit or because we just filled it.
1154 return state->ic_data[idx] & 0xffff;
1158 return state->ic_data[idx] >> 16;
1162 return m68k_read_immediate_16(state, address);
1165 /* Handles all immediate reads, does address error check, function code setting,
1166 * and prefetching if they are enabled in m68kconf.h
1168 uint m68ki_read_imm16_addr_slowpath(m68ki_cpu_core *state, uint32_t pc, address_translation_cache *cache);
1172 static inline uint m68ki_read_imm_16(m68ki_cpu_core *state)
1174 uint32_t pc = REG_PC;
1176 address_translation_cache *cache = &state->code_translation_cache;
1177 if(pc >= cache->lower && pc < cache->upper)
1180 return be16toh(((unsigned short *)(cache->offset + pc))[0]);
1182 return m68ki_read_imm16_addr_slowpath(state, pc, cache);
1185 static inline uint m68ki_read_imm_8(m68ki_cpu_core *state)
1187 /* map read immediate 8 to read immediate 16 */
1188 return MASK_OUT_ABOVE_8(m68ki_read_imm_16(state));
1191 static inline uint m68ki_read_imm_32(m68ki_cpu_core *state)
1193 #if M68K_SEPARATE_READS
1194 #if M68K_EMULATE_PMMU
1195 // if (PMMU_ENABLED)
1196 // address = pmmu_translate_addr(address,1);
1199 uint32_t address = ADDRESS_68K(REG_PC);
1200 for (int i = 0; i < state->read_ranges; i++) {
1201 if(address >= state->read_addr[i] && address < state->read_upper[i]) {
1203 return be32toh(((unsigned int *)(state->read_data[i] + (address - state->read_addr[i])))[0]);
1207 #if M68K_EMULATE_PREFETCH
1210 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1211 state->mmu_tmp_fc = FLAG_S | FUNCTION_CODE_USER_PROGRAM;
1212 state->mmu_tmp_rw = 1;
1213 state->mmu_tmp_sz = M68K_SZ_LONG;
1214 m68ki_check_address_error(state, REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1216 if(REG_PC != CPU_PREF_ADDR)
1218 CPU_PREF_ADDR = REG_PC;
1219 CPU_PREF_DATA = m68ki_ic_readimm16(state, ADDRESS_68K(CPU_PREF_ADDR));
1221 temp_val = MASK_OUT_ABOVE_16(CPU_PREF_DATA);
1223 CPU_PREF_ADDR = REG_PC;
1224 CPU_PREF_DATA = m68ki_ic_readimm16(state, ADDRESS_68K(CPU_PREF_ADDR));
1226 temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | MASK_OUT_ABOVE_16(CPU_PREF_DATA));
1228 CPU_PREF_DATA = m68ki_ic_readimm16(state, REG_PC);
1229 CPU_PREF_ADDR = state->mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
1235 return m68k_read_immediate_32(address);
1236 #endif /* M68K_EMULATE_PREFETCH */
1239 /* ------------------------- Top level read/write ------------------------- */
1241 /* Handles all memory accesses (except for immediate reads if they are
1242 * configured to use separate functions in m68kconf.h).
1243 * All memory accesses must go through these top level functions.
1244 * These functions will also check for address error and set the function
1245 * code if they are enabled in m68kconf.h.
1248 static inline uint m68ki_read_8_fc(m68ki_cpu_core *state, uint address, uint fc)
1251 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1252 state->mmu_tmp_fc = fc;
1253 state->mmu_tmp_rw = 1;
1254 state->mmu_tmp_sz = M68K_SZ_BYTE;
1256 #if M68K_EMULATE_PMMU
1258 address = pmmu_translate_addr(address,1);
1261 for (int i = 0; i < state->read_ranges; i++) {
1262 if(address >= state->read_addr[i] && address < state->read_upper[i]) {
1263 return state->read_data[i][address - state->read_addr[i]];
1267 return m68k_read_memory_8(ADDRESS_68K(address));
1269 static inline uint m68ki_read_16_fc(m68ki_cpu_core *state, uint address, uint fc)
1271 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1272 state->mmu_tmp_fc = fc;
1273 state->mmu_tmp_rw = 1;
1274 state->mmu_tmp_sz = M68K_SZ_WORD;
1275 m68ki_check_address_error_010_less(state, address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1277 #if M68K_EMULATE_PMMU
1279 address = pmmu_translate_addr(state, address,1);
1282 for (int i = 0; i < state->read_ranges; i++) {
1283 if(address >= state->read_addr[i] && address < state->read_upper[i]) {
1284 return be16toh(((unsigned short *)(state->read_data[i] + (address - state->read_addr[i])))[0]);
1288 return m68k_read_memory_16(ADDRESS_68K(address));
1290 static inline uint m68ki_read_32_fc(m68ki_cpu_core *state, uint address, uint fc)
1292 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1293 state->mmu_tmp_fc = fc;
1294 state->mmu_tmp_rw = 1;
1295 state->mmu_tmp_sz = M68K_SZ_LONG;
1296 m68ki_check_address_error_010_less(state, address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1298 #if M68K_EMULATE_PMMU
1300 address = pmmu_translate_addr(state, address,1);
1303 for (int i = 0; i < state->read_ranges; i++) {
1304 if(address >= state->read_addr[i] && address < state->read_upper[i]) {
1305 return be32toh(((unsigned int *)(state->read_data[i] + (address - state->read_addr[i])))[0]);
1309 return m68k_read_memory_32(ADDRESS_68K(address));
1312 static inline void m68ki_write_8_fc(m68ki_cpu_core *state, uint address, uint fc, uint value)
1314 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1315 state->mmu_tmp_fc = fc;
1316 state->mmu_tmp_rw = 0;
1317 state->mmu_tmp_sz = M68K_SZ_BYTE;
1319 #if M68K_EMULATE_PMMU
1321 address = pmmu_translate_addr(address,0);
1324 for (int i = 0; i < state->write_ranges; i++) {
1325 if(address >= state->write_addr[i] && address < state->write_upper[i]) {
1326 state->write_data[i][address - state->write_addr[i]] = (unsigned char)value;
1331 m68k_write_memory_8(ADDRESS_68K(address), value);
1333 static inline void m68ki_write_16_fc(m68ki_cpu_core *state, uint address, uint fc, uint value)
1335 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1336 state->mmu_tmp_fc = fc;
1337 state->mmu_tmp_rw = 0;
1338 state->mmu_tmp_sz = M68K_SZ_WORD;
1339 m68ki_check_address_error_010_less(state, address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1341 #if M68K_EMULATE_PMMU
1343 address = pmmu_translate_addr(address,0);
1346 for (int i = 0; i < state->write_ranges; i++) {
1347 if(address >= state->write_addr[i] && address < state->write_upper[i]) {
1348 ((short *)(state->write_data[i] + (address - state->write_addr[i])))[0] = htobe16(value);
1353 m68k_write_memory_16(ADDRESS_68K(address), value);
1355 static inline void m68ki_write_32_fc(m68ki_cpu_core *state, uint address, uint fc, uint value)
1357 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1358 state->mmu_tmp_fc = fc;
1359 state->mmu_tmp_rw = 0;
1360 state->mmu_tmp_sz = M68K_SZ_LONG;
1361 m68ki_check_address_error_010_less(state, address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1363 #if M68K_EMULATE_PMMU
1365 address = pmmu_translate_addr(address,0);
1368 for (int i = 0; i < state->write_ranges; i++) {
1369 if(address >= state->write_addr[i] && address < state->write_upper[i]) {
1370 ((int *)(state->write_data[i] + (address - state->write_addr[i])))[0] = htobe32(value);
1375 m68k_write_memory_32(ADDRESS_68K(address), value);
1378 #if M68K_SIMULATE_PD_WRITES
1379 /* Special call to simulate undocumented 68k behavior when move.l with a
1380 * predecrement destination mode is executed.
1381 * A real 68k first writes the high word to [address+2], and then writes the
1382 * low word to [address].
1384 static inline void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
1386 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1387 state->mmu_tmp_fc = fc;
1388 state->mmu_tmp_rw = 0;
1389 state->mmu_tmp_sz = M68K_SZ_LONG;
1390 m68ki_check_address_error_010_less(state, address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1392 #if M68K_EMULATE_PMMU
1394 address = pmmu_translate_addr(address,0);
1397 m68k_write_memory_32_pd(ADDRESS_68K(address), value);
1401 /* --------------------- Effective Address Calculation -------------------- */
1403 /* The program counter relative addressing modes cause operands to be
1404 * retrieved from program space, not data space.
1406 static inline uint m68ki_get_ea_pcdi(m68ki_cpu_core *state)
1408 uint old_pc = REG_PC;
1409 m68ki_use_program_space(); /* auto-disable */
1410 return old_pc + MAKE_INT_16(m68ki_read_imm_16(state));
1414 static inline uint m68ki_get_ea_pcix(m68ki_cpu_core *state)
1416 m68ki_use_program_space(); /* auto-disable */
1417 return m68ki_get_ea_ix(state, REG_PC);
1420 /* Indexed addressing modes are encoded as follows:
1422 * Base instruction format:
1423 * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
1424 * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
1426 * Base instruction format for destination EA in move instructions:
1427 * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
1428 * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
1430 * Brief extension format:
1431 * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
1432 * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
1434 * Full extension format:
1435 * F E D C B A 9 8 7 6 5 4 3 2 1 0
1436 * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
1437 * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
1438 * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
1440 * D/A: 0 = Dn, 1 = An (Xn)
1441 * W/L: 0 = W (sign extend), 1 = L (.SIZE)
1442 * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
1443 * BS: 0=add base reg, 1=suppress base reg (An suppressed)
1444 * IS: 0=add index, 1=suppress index (Xn suppressed)
1445 * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
1448 * 0 000 No Memory Indirect
1449 * 0 001 indir prex with null outer
1450 * 0 010 indir prex with word outer
1451 * 0 011 indir prex with long outer
1453 * 0 101 indir postx with null outer
1454 * 0 110 indir postx with word outer
1455 * 0 111 indir postx with long outer
1456 * 1 000 no memory indirect
1457 * 1 001 mem indir with null outer
1458 * 1 010 mem indir with word outer
1459 * 1 011 mem indir with long outer
1460 * 1 100-111 reserved
1462 static inline uint m68ki_get_ea_ix(m68ki_cpu_core *state, uint An)
1464 /* An = base register */
1465 uint extension = m68ki_read_imm_16(state);
1466 uint Xn = 0; /* Index register */
1467 uint bd = 0; /* Base Displacement */
1468 uint od = 0; /* Outer Displacement */
1470 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1472 /* Calculate index */
1473 Xn = REG_DA[extension>>12]; /* Xn */
1474 if(!BIT_B(extension)) /* W/L */
1475 Xn = MAKE_INT_16(Xn);
1477 /* Add base register and displacement and return */
1478 return An + Xn + MAKE_INT_8(extension);
1481 /* Brief extension format */
1482 if(!BIT_8(extension))
1484 /* Calculate index */
1485 Xn = REG_DA[extension>>12]; /* Xn */
1486 if(!BIT_B(extension)) /* W/L */
1487 Xn = MAKE_INT_16(Xn);
1488 /* Add scale if proper CPU type */
1489 if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1490 Xn <<= (extension>>9) & 3; /* SCALE */
1492 /* Add base register and displacement and return */
1493 return An + Xn + MAKE_INT_8(extension);
1496 /* Full extension format */
1498 USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
1500 /* Check if base register is present */
1501 if(BIT_7(extension)) /* BS */
1504 /* Check if index is present */
1505 if(!BIT_6(extension)) /* IS */
1507 Xn = REG_DA[extension>>12]; /* Xn */
1508 if(!BIT_B(extension)) /* W/L */
1509 Xn = MAKE_INT_16(Xn);
1510 Xn <<= (extension>>9) & 3; /* SCALE */
1513 /* Check if base displacement is present */
1514 if(BIT_5(extension)) /* BD SIZE */
1515 bd = BIT_4(extension) ? m68ki_read_imm_32(state) : (uint32)MAKE_INT_16(m68ki_read_imm_16(state));
1517 /* If no indirect action, we are done */
1518 if(!(extension&7)) /* No Memory Indirect */
1519 return An + bd + Xn;
1521 /* Check if outer displacement is present */
1522 if(BIT_1(extension)) /* I/IS: od */
1523 od = BIT_0(extension) ? m68ki_read_imm_32(state) : (uint32)MAKE_INT_16(m68ki_read_imm_16(state));
1526 if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
1527 return m68ki_read_32(state, An + bd) + Xn + od;
1530 return m68ki_read_32(state, An + bd + Xn) + od;
1534 /* Fetch operands */
1535 static inline uint OPER_AY_AI_8(m68ki_cpu_core *state) {uint ea = EA_AY_AI_8(); return m68ki_read_8(state, ea); }
1536 static inline uint OPER_AY_AI_16(m68ki_cpu_core *state) {uint ea = EA_AY_AI_16(); return m68ki_read_16(state, ea);}
1537 static inline uint OPER_AY_AI_32(m68ki_cpu_core *state) {uint ea = EA_AY_AI_32(); return m68ki_read_32(state, ea);}
1538 static inline uint OPER_AY_PI_8(m68ki_cpu_core *state) {uint ea = EA_AY_PI_8(); return m68ki_read_8(state, ea); }
1539 static inline uint OPER_AY_PI_16(m68ki_cpu_core *state) {uint ea = EA_AY_PI_16(); return m68ki_read_16(state, ea);}
1540 static inline uint OPER_AY_PI_32(m68ki_cpu_core *state) {uint ea = EA_AY_PI_32(); return m68ki_read_32(state, ea);}
1541 static inline uint OPER_AY_PD_8(m68ki_cpu_core *state) {uint ea = EA_AY_PD_8(); return m68ki_read_8(state, ea); }
1542 static inline uint OPER_AY_PD_16(m68ki_cpu_core *state) {uint ea = EA_AY_PD_16(); return m68ki_read_16(state, ea);}
1543 static inline uint OPER_AY_PD_32(m68ki_cpu_core *state) {uint ea = EA_AY_PD_32(); return m68ki_read_32(state, ea);}
1544 static inline uint OPER_AY_DI_8(m68ki_cpu_core *state) {uint ea = EA_AY_DI_8(); return m68ki_read_8(state, ea); }
1545 static inline uint OPER_AY_DI_16(m68ki_cpu_core *state) {uint ea = EA_AY_DI_16(); return m68ki_read_16(state, ea);}
1546 static inline uint OPER_AY_DI_32(m68ki_cpu_core *state) {uint ea = EA_AY_DI_32(); return m68ki_read_32(state, ea);}
1547 static inline uint OPER_AY_IX_8(m68ki_cpu_core *state) {uint ea = EA_AY_IX_8(); return m68ki_read_8(state, ea); }
1548 static inline uint OPER_AY_IX_16(m68ki_cpu_core *state) {uint ea = EA_AY_IX_16(); return m68ki_read_16(state, ea);}
1549 static inline uint OPER_AY_IX_32(m68ki_cpu_core *state) {uint ea = EA_AY_IX_32(); return m68ki_read_32(state, ea);}
1551 static inline uint OPER_AX_AI_8(m68ki_cpu_core *state) {uint ea = EA_AX_AI_8(); return m68ki_read_8(state, ea); }
1552 static inline uint OPER_AX_AI_16(m68ki_cpu_core *state) {uint ea = EA_AX_AI_16(); return m68ki_read_16(state, ea);}
1553 static inline uint OPER_AX_AI_32(m68ki_cpu_core *state) {uint ea = EA_AX_AI_32(); return m68ki_read_32(state, ea);}
1554 static inline uint OPER_AX_PI_8(m68ki_cpu_core *state) {uint ea = EA_AX_PI_8(); return m68ki_read_8(state, ea); }
1555 static inline uint OPER_AX_PI_16(m68ki_cpu_core *state) {uint ea = EA_AX_PI_16(); return m68ki_read_16(state, ea);}
1556 static inline uint OPER_AX_PI_32(m68ki_cpu_core *state) {uint ea = EA_AX_PI_32(); return m68ki_read_32(state, ea);}
1557 static inline uint OPER_AX_PD_8(m68ki_cpu_core *state) {uint ea = EA_AX_PD_8(); return m68ki_read_8(state, ea); }
1558 static inline uint OPER_AX_PD_16(m68ki_cpu_core *state) {uint ea = EA_AX_PD_16(); return m68ki_read_16(state, ea);}
1559 static inline uint OPER_AX_PD_32(m68ki_cpu_core *state) {uint ea = EA_AX_PD_32(); return m68ki_read_32(state, ea);}
1560 static inline uint OPER_AX_DI_8(m68ki_cpu_core *state) {uint ea = EA_AX_DI_8(); return m68ki_read_8(state, ea); }
1561 static inline uint OPER_AX_DI_16(m68ki_cpu_core *state) {uint ea = EA_AX_DI_16(); return m68ki_read_16(state, ea);}
1562 static inline uint OPER_AX_DI_32(m68ki_cpu_core *state) {uint ea = EA_AX_DI_32(); return m68ki_read_32(state, ea);}
1563 static inline uint OPER_AX_IX_8(m68ki_cpu_core *state) {uint ea = EA_AX_IX_8(); return m68ki_read_8(state, ea); }
1564 static inline uint OPER_AX_IX_16(m68ki_cpu_core *state) {uint ea = EA_AX_IX_16(); return m68ki_read_16(state, ea);}
1565 static inline uint OPER_AX_IX_32(m68ki_cpu_core *state) {uint ea = EA_AX_IX_32(); return m68ki_read_32(state, ea);}
1567 static inline uint OPER_A7_PI_8(m68ki_cpu_core *state) {uint ea = EA_A7_PI_8(); return m68ki_read_8(state, ea); }
1568 static inline uint OPER_A7_PD_8(m68ki_cpu_core *state) {uint ea = EA_A7_PD_8(); return m68ki_read_8(state, ea); }
1570 static inline uint OPER_AW_8(m68ki_cpu_core *state) {uint ea = EA_AW_8(); return m68ki_read_8(state, ea); }
1571 static inline uint OPER_AW_16(m68ki_cpu_core *state) {uint ea = EA_AW_16(); return m68ki_read_16(state, ea);}
1572 static inline uint OPER_AW_32(m68ki_cpu_core *state) {uint ea = EA_AW_32(); return m68ki_read_32(state, ea);}
1573 static inline uint OPER_AL_8(m68ki_cpu_core *state) {uint ea = EA_AL_8(); return m68ki_read_8(state, ea); }
1574 static inline uint OPER_AL_16(m68ki_cpu_core *state) {uint ea = EA_AL_16(); return m68ki_read_16(state, ea);}
1575 static inline uint OPER_AL_32(m68ki_cpu_core *state) {uint ea = EA_AL_32(); return m68ki_read_32(state, ea);}
1576 static inline uint OPER_PCDI_8(m68ki_cpu_core *state) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(state, ea);}
1577 static inline uint OPER_PCDI_16(m68ki_cpu_core *state) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(state, ea);}
1578 static inline uint OPER_PCDI_32(m68ki_cpu_core *state) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(state, ea);}
1579 static inline uint OPER_PCIX_8(m68ki_cpu_core *state) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(state, ea);}
1580 static inline uint OPER_PCIX_16(m68ki_cpu_core *state) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(state, ea);}
1581 static inline uint OPER_PCIX_32(m68ki_cpu_core *state) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(state, ea);}
1585 /* ---------------------------- Stack Functions --------------------------- */
1587 /* Push/pull data from the stack */
1588 static inline void m68ki_push_16(m68ki_cpu_core *state, uint value)
1590 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1591 m68ki_write_16(state, REG_SP, value);
1594 static inline void m68ki_push_32(m68ki_cpu_core *state, uint value)
1596 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1597 m68ki_write_32(state, REG_SP, value);
1600 static inline uint m68ki_pull_16(m68ki_cpu_core *state)
1602 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1603 return m68ki_read_16(state, REG_SP - 2);
1606 static inline uint m68ki_pull_32(m68ki_cpu_core *state)
1608 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1609 return m68ki_read_32(state, REG_SP - 4);
1613 /* Increment/decrement the stack as if doing a push/pull but
1614 * don't do any memory access.
1616 static inline void m68ki_fake_push_16(m68ki_cpu_core *state)
1618 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1621 static inline void m68ki_fake_push_32(m68ki_cpu_core *state)
1623 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1626 static inline void m68ki_fake_pull_16(m68ki_cpu_core *state)
1628 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1631 static inline void m68ki_fake_pull_32(m68ki_cpu_core *state)
1633 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1637 /* ----------------------------- Program Flow ----------------------------- */
1639 /* Jump to a new program location or vector.
1640 * These functions will also call the pc_changed callback if it was enabled
1643 static inline void m68ki_jump(m68ki_cpu_core *state, uint new_pc)
1646 m68ki_pc_changed(REG_PC);
1649 static inline void m68ki_jump_vector(m68ki_cpu_core *state, uint vector)
1651 REG_PC = (vector<<2) + REG_VBR;
1652 REG_PC = m68ki_read_data_32(state, REG_PC);
1653 m68ki_pc_changed(REG_PC);
1657 /* Branch to a new memory location.
1658 * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
1659 * So far I've found no problems with not calling pc_changed for 8 or 16
1662 static inline void m68ki_branch_8(m68ki_cpu_core *state, uint offset)
1664 REG_PC += MAKE_INT_8(offset);
1667 static inline void m68ki_branch_16(m68ki_cpu_core *state, uint offset)
1669 REG_PC += MAKE_INT_16(offset);
1672 static inline void m68ki_branch_32(m68ki_cpu_core *state, uint offset)
1675 m68ki_pc_changed(REG_PC);
1678 /* ---------------------------- Status Register --------------------------- */
1680 /* Set the S flag and change the active stack pointer.
1681 * Note that value MUST be 4 or 0.
1683 static inline void m68ki_set_s_flag(m68ki_cpu_core *state, uint value)
1685 /* Backup the old stack pointer */
1686 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1687 /* Set the S flag */
1689 /* Set the new stack pointer */
1690 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1693 /* Set the S and M flags and change the active stack pointer.
1694 * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
1696 static inline void m68ki_set_sm_flag(m68ki_cpu_core *state, uint value)
1698 /* Backup the old stack pointer */
1699 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1700 /* Set the S and M flags */
1701 FLAG_S = value & SFLAG_SET;
1702 FLAG_M = value & MFLAG_SET;
1703 /* Set the new stack pointer */
1704 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1707 /* Set the S and M flags. Don't touch the stack pointer. */
1708 static inline void m68ki_set_sm_flag_nosp(m68ki_cpu_core *state, uint value)
1710 /* Set the S and M flags */
1711 FLAG_S = value & SFLAG_SET;
1712 FLAG_M = value & MFLAG_SET;
1716 /* Set the condition code register */
1717 static inline void m68ki_set_ccr(m68ki_cpu_core *state, uint value)
1719 FLAG_X = BIT_4(value) << 4;
1720 FLAG_N = BIT_3(value) << 4;
1721 FLAG_Z = !BIT_2(value);
1722 FLAG_V = BIT_1(value) << 6;
1723 FLAG_C = BIT_0(value) << 8;
1726 /* Set the status register but don't check for interrupts */
1727 static inline void m68ki_set_sr_noint(m68ki_cpu_core *state, uint value)
1729 /* Mask out the "unimplemented" bits */
1730 value &= CPU_SR_MASK;
1732 /* Now set the status register */
1733 FLAG_T1 = BIT_F(value);
1734 FLAG_T0 = BIT_E(value);
1735 FLAG_INT_MASK = value & 0x0700;
1736 m68ki_set_ccr(state, value);
1737 m68ki_set_sm_flag(state, (value >> 11) & 6);
1740 /* Set the status register but don't check for interrupts nor
1741 * change the stack pointer
1743 static inline void m68ki_set_sr_noint_nosp(m68ki_cpu_core *state, uint value)
1745 /* Mask out the "unimplemented" bits */
1746 value &= CPU_SR_MASK;
1748 /* Now set the status register */
1749 FLAG_T1 = BIT_F(value);
1750 FLAG_T0 = BIT_E(value);
1751 FLAG_INT_MASK = value & 0x0700;
1752 m68ki_set_ccr(state, value);
1753 m68ki_set_sm_flag_nosp(state, (value >> 11) & 6);
1756 /* Set the status register and check for interrupts */
1757 static inline void m68ki_set_sr(m68ki_cpu_core *state, uint value)
1759 m68ki_set_sr_noint(state, value);
1760 m68ki_check_interrupts(state);
1764 /* ------------------------- Exception Processing ------------------------- */
1766 /* Initiate exception processing */
1767 static inline uint m68ki_init_exception(m68ki_cpu_core *state)
1769 /* Save the old status register */
1770 uint sr = m68ki_get_sr();
1772 /* Turn off trace flag, clear pending traces */
1773 FLAG_T1 = FLAG_T0 = 0;
1774 m68ki_clear_trace();
1775 /* Enter supervisor mode */
1776 m68ki_set_s_flag(state, SFLAG_SET);
1781 /* 3 word stack frame (68000 only) */
1782 static inline void m68ki_stack_frame_3word(m68ki_cpu_core *state, uint pc, uint sr)
1784 m68ki_push_32(state, pc);
1785 m68ki_push_16(state, sr);
1788 /* Format 0 stack frame.
1789 * This is the standard stack frame for 68010+.
1791 static inline void m68ki_stack_frame_0000(m68ki_cpu_core *state, uint pc, uint sr, uint vector)
1793 /* Stack a 3-word frame if we are 68000 */
1794 if(CPU_TYPE == CPU_TYPE_000)
1796 m68ki_stack_frame_3word(state, pc, sr);
1799 m68ki_push_16(state, vector << 2);
1800 m68ki_push_32(state, pc);
1801 m68ki_push_16(state, sr);
1804 /* Format 1 stack frame (68020).
1805 * For 68020, this is the 4 word throwaway frame.
1807 static inline void m68ki_stack_frame_0001(m68ki_cpu_core *state, uint pc, uint sr, uint vector)
1809 m68ki_push_16(state, 0x1000 | (vector << 2));
1810 m68ki_push_32(state, pc);
1811 m68ki_push_16(state, sr);
1814 /* Format 2 stack frame.
1815 * This is used only by 68020 for trap exceptions.
1817 static inline void m68ki_stack_frame_0010(m68ki_cpu_core *state, uint sr, uint vector)
1819 m68ki_push_32(state, REG_PPC);
1820 m68ki_push_16(state, 0x2000 | (vector << 2));
1821 m68ki_push_32(state, REG_PC);
1822 m68ki_push_16(state, sr);
1826 /* Bus error stack frame (68000 only).
1828 static inline void m68ki_stack_frame_buserr(m68ki_cpu_core *state, uint sr)
1830 m68ki_push_32(state, REG_PC);
1831 m68ki_push_16(state, sr);
1832 m68ki_push_16(state, REG_IR);
1833 m68ki_push_32(state, m68ki_aerr_address); /* access address */
1834 /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
1835 * R/W 0 = write, 1 = read
1836 * I/N 0 = instruction, 1 = not
1837 * FC 3-bit function code
1839 m68ki_push_16(state, m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
1842 /* Format 8 stack frame (68010).
1843 * 68010 only. This is the 29 word bus/address error frame.
1845 static inline void m68ki_stack_frame_1000(m68ki_cpu_core *state, uint pc, uint sr, uint vector)
1849 * INTERNAL INFORMATION, 16 WORDS
1851 m68ki_fake_push_32(state);
1852 m68ki_fake_push_32(state);
1853 m68ki_fake_push_32(state);
1854 m68ki_fake_push_32(state);
1855 m68ki_fake_push_32(state);
1856 m68ki_fake_push_32(state);
1857 m68ki_fake_push_32(state);
1858 m68ki_fake_push_32(state);
1860 /* INSTRUCTION INPUT BUFFER */
1861 m68ki_push_16(state, 0);
1863 /* UNUSED, RESERVED (not written) */
1864 m68ki_fake_push_16(state);
1866 /* DATA INPUT BUFFER */
1867 m68ki_push_16(state, 0);
1869 /* UNUSED, RESERVED (not written) */
1870 m68ki_fake_push_16(state);
1872 /* DATA OUTPUT BUFFER */
1873 m68ki_push_16(state, 0);
1875 /* UNUSED, RESERVED (not written) */
1876 m68ki_fake_push_16(state);
1879 m68ki_push_32(state, 0);
1881 /* SPECIAL STATUS WORD */
1882 m68ki_push_16(state, 0);
1884 /* 1000, VECTOR OFFSET */
1885 m68ki_push_16(state, 0x8000 | (vector << 2));
1887 /* PROGRAM COUNTER */
1888 m68ki_push_32(state, pc);
1890 /* STATUS REGISTER */
1891 m68ki_push_16(state, sr);
1894 /* Format A stack frame (short bus fault).
1895 * This is used only by 68020 for bus fault and address error
1896 * if the error happens at an instruction boundary.
1897 * PC stacked is address of next instruction.
1899 static inline void m68ki_stack_frame_1010(m68ki_cpu_core *state, uint sr, uint vector, uint pc, uint fault_address)
1901 int orig_rw = state->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
1902 int orig_fc = state->mmu_tmp_buserror_fc;
1903 int orig_sz = state->mmu_tmp_buserror_sz;
1905 /* INTERNAL REGISTER */
1906 m68ki_push_16(state, 0);
1908 /* INTERNAL REGISTER */
1909 m68ki_push_16(state, 0);
1911 /* DATA OUTPUT BUFFER (2 words) */
1912 m68ki_push_32(state, 0);
1914 /* INTERNAL REGISTER */
1915 m68ki_push_16(state, 0);
1917 /* INTERNAL REGISTER */
1918 m68ki_push_16(state, 0);
1920 /* DATA CYCLE FAULT ADDRESS (2 words) */
1921 m68ki_push_32(state, fault_address);
1923 /* INSTRUCTION PIPE STAGE B */
1924 m68ki_push_16(state, 0);
1926 /* INSTRUCTION PIPE STAGE C */
1927 m68ki_push_16(state, 0);
1929 /* SPECIAL STATUS REGISTER */
1930 // set bit for: Rerun Faulted bus Cycle, or run pending prefetch
1932 m68ki_push_16(state, 0x0100 | orig_fc | orig_rw << 6 | orig_sz << 4);
1934 /* INTERNAL REGISTER */
1935 m68ki_push_16(state, 0);
1937 /* 1010, VECTOR OFFSET */
1938 m68ki_push_16(state, 0xa000 | (vector << 2));
1940 /* PROGRAM COUNTER */
1941 m68ki_push_32(state, pc);
1943 /* STATUS REGISTER */
1944 m68ki_push_16(state, sr);
1947 /* Format B stack frame (long bus fault).
1948 * This is used only by 68020 for bus fault and address error
1949 * if the error happens during instruction execution.
1950 * PC stacked is address of instruction in progress.
1952 static inline void m68ki_stack_frame_1011(m68ki_cpu_core *state, uint sr, uint vector, uint pc, uint fault_address)
1954 int orig_rw = state->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
1955 int orig_fc = state->mmu_tmp_buserror_fc;
1956 int orig_sz = state->mmu_tmp_buserror_sz;
1957 /* INTERNAL REGISTERS (18 words) */
1958 m68ki_push_32(state, 0);
1959 m68ki_push_32(state, 0);
1960 m68ki_push_32(state, 0);
1961 m68ki_push_32(state, 0);
1962 m68ki_push_32(state, 0);
1963 m68ki_push_32(state, 0);
1964 m68ki_push_32(state, 0);
1965 m68ki_push_32(state, 0);
1966 m68ki_push_32(state, 0);
1968 /* VERSION# (4 bits), INTERNAL INFORMATION */
1969 m68ki_push_16(state, 0);
1971 /* INTERNAL REGISTERS (3 words) */
1972 m68ki_push_32(state, 0);
1973 m68ki_push_16(state, 0);
1975 /* DATA INTPUT BUFFER (2 words) */
1976 m68ki_push_32(state, 0);
1978 /* INTERNAL REGISTERS (2 words) */
1979 m68ki_push_32(state, 0);
1981 /* STAGE B ADDRESS (2 words) */
1982 m68ki_push_32(state, 0);
1984 /* INTERNAL REGISTER (4 words) */
1985 m68ki_push_32(state, 0);
1986 m68ki_push_32(state, 0);
1988 /* DATA OUTPUT BUFFER (2 words) */
1989 m68ki_push_32(state, 0);
1991 /* INTERNAL REGISTER */
1992 m68ki_push_16(state, 0);
1994 /* INTERNAL REGISTER */
1995 m68ki_push_16(state, 0);
1997 /* DATA CYCLE FAULT ADDRESS (2 words) */
1998 m68ki_push_32(state, fault_address);
2000 /* INSTRUCTION PIPE STAGE B */
2001 m68ki_push_16(state, 0);
2003 /* INSTRUCTION PIPE STAGE C */
2004 m68ki_push_16(state, 0);
2006 /* SPECIAL STATUS REGISTER */
2007 m68ki_push_16(state, 0x0100 | orig_fc | (orig_rw << 6) | (orig_sz << 4));
2009 /* INTERNAL REGISTER */
2010 m68ki_push_16(state, 0);
2012 /* 1011, VECTOR OFFSET */
2013 m68ki_push_16(state, 0xb000 | (vector << 2));
2015 /* PROGRAM COUNTER */
2016 m68ki_push_32(state, pc);
2018 /* STATUS REGISTER */
2019 m68ki_push_16(state, sr);
2022 /* Type 7 stack frame (access fault).
2023 * This is used by the 68040 for bus fault and mmu trap
2027 m68ki_stack_frame_0111(m68ki_cpu_core *state, uint sr, uint vector, uint pc, uint fault_address, uint8 in_mmu)
2029 int orig_rw = state->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
2030 int orig_fc = state->mmu_tmp_buserror_fc;
2032 /* INTERNAL REGISTERS (18 words) */
2033 m68ki_push_32(state, 0);
2034 m68ki_push_32(state, 0);
2035 m68ki_push_32(state, 0);
2036 m68ki_push_32(state, 0);
2037 m68ki_push_32(state, 0);
2038 m68ki_push_32(state, 0);
2039 m68ki_push_32(state, 0);
2040 m68ki_push_32(state, 0);
2041 m68ki_push_32(state, 0);
2043 /* FAULT ADDRESS (2 words) */
2044 m68ki_push_32(state, fault_address);
2046 /* INTERNAL REGISTERS (3 words) */
2047 m68ki_push_32(state, 0);
2048 m68ki_push_16(state, 0);
2050 /* SPECIAL STATUS REGISTER (1 word) */
2051 m68ki_push_16(state, (in_mmu ? 0x400 : 0) | orig_fc | (orig_rw << 8));
2053 /* EFFECTIVE ADDRESS (2 words) */
2054 m68ki_push_32(state, fault_address);
2056 /* 0111, VECTOR OFFSET (1 word) */
2057 m68ki_push_16(state, 0x7000 | (vector << 2));
2059 /* PROGRAM COUNTER (2 words) */
2060 m68ki_push_32(state, pc);
2062 /* STATUS REGISTER (1 word) */
2063 m68ki_push_16(state, sr);
2066 /* Used for Group 2 exceptions.
2067 * These stack a type 2 frame on the 020.
2069 static inline void m68ki_exception_trap(m68ki_cpu_core *state, uint vector)
2071 uint sr = m68ki_init_exception(state);
2073 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
2074 m68ki_stack_frame_0000(state, REG_PC, sr, vector);
2076 m68ki_stack_frame_0010(state, sr, vector);
2078 m68ki_jump_vector(state, vector);
2080 /* Use up some clock cycles and undo the instruction's cycles */
2081 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
2084 /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
2085 static inline void m68ki_exception_trapN(m68ki_cpu_core *state, uint vector)
2087 uint sr = m68ki_init_exception(state);
2088 m68ki_stack_frame_0000(state, REG_PC, sr, vector);
2089 m68ki_jump_vector(state, vector);
2091 /* Use up some clock cycles and undo the instruction's cycles */
2092 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
2095 /* Exception for trace mode */
2096 static inline void m68ki_exception_trace(m68ki_cpu_core *state)
2098 uint sr = m68ki_init_exception(state);
2100 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
2102 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2103 if(CPU_TYPE_IS_000(CPU_TYPE))
2105 CPU_INSTR_MODE = INSTRUCTION_NO;
2107 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2108 m68ki_stack_frame_0000(state, REG_PC, sr, EXCEPTION_TRACE);
2111 m68ki_stack_frame_0010(state, sr, EXCEPTION_TRACE);
2113 m68ki_jump_vector(state, EXCEPTION_TRACE);
2115 /* Trace nullifies a STOP instruction */
2116 CPU_STOPPED &= ~STOP_LEVEL_STOP;
2118 /* Use up some clock cycles */
2119 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
2122 /* Exception for privilege violation */
2123 static inline void m68ki_exception_privilege_violation(m68ki_cpu_core *state)
2125 uint sr = m68ki_init_exception(state);
2127 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2128 if(CPU_TYPE_IS_000(CPU_TYPE))
2130 CPU_INSTR_MODE = INSTRUCTION_NO;
2132 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2134 m68ki_stack_frame_0000(state, REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
2135 m68ki_jump_vector(state, EXCEPTION_PRIVILEGE_VIOLATION);
2137 /* Use up some clock cycles and undo the instruction's cycles */
2138 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
2141 extern jmp_buf m68ki_bus_error_jmp_buf;
2143 #define m68ki_check_bus_error_trap() setjmp(m68ki_bus_error_jmp_buf)
2145 /* Exception for bus error */
2146 static inline void m68ki_exception_bus_error(m68ki_cpu_core *state)
2150 /* If we were processing a bus error, address error, or reset,
2151 * this is a catastrophic failure.
2154 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
2156 m68k_read_memory_8(0x00ffff01);
2157 CPU_STOPPED = STOP_LEVEL_HALT;
2160 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
2162 /* Use up some clock cycles and undo the instruction's cycles */
2163 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_BUS_ERROR] - CYC_INSTRUCTION[REG_IR]);
2165 for (i = 15; i >= 0; i--){
2166 REG_DA[i] = REG_DA_SAVE[i];
2169 uint sr = m68ki_init_exception(state);
2170 m68ki_stack_frame_1000(state, REG_PPC, sr, EXCEPTION_BUS_ERROR);
2172 m68ki_jump_vector(state, EXCEPTION_BUS_ERROR);
2173 longjmp(m68ki_bus_error_jmp_buf, 1);
2176 extern int cpu_log_enabled;
2178 /* Exception for A-Line instructions */
2179 static inline void m68ki_exception_1010(m68ki_cpu_core *state)
2182 #if M68K_LOG_1010_1111 == OPT_ON
2183 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
2184 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2185 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2188 sr = m68ki_init_exception(state);
2189 m68ki_stack_frame_0000(state, REG_PPC, sr, EXCEPTION_1010);
2190 m68ki_jump_vector(state, EXCEPTION_1010);
2192 /* Use up some clock cycles and undo the instruction's cycles */
2193 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
2196 /* Exception for F-Line instructions */
2197 static inline void m68ki_exception_1111(m68ki_cpu_core *state)
2201 #if M68K_LOG_1010_1111 == OPT_ON
2202 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
2203 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2204 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2207 sr = m68ki_init_exception(state);
2208 m68ki_stack_frame_0000(state, REG_PPC, sr, EXCEPTION_1111);
2209 m68ki_jump_vector(state, EXCEPTION_1111);
2211 /* Use up some clock cycles and undo the instruction's cycles */
2212 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
2215 #if M68K_ILLG_HAS_CALLBACK == OPT_SPECIFY_HANDLER
2216 extern int m68ki_illg_callback(int);
2219 /* Exception for illegal instructions */
2220 static inline void m68ki_exception_illegal(m68ki_cpu_core *state)
2224 M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
2225 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
2226 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC),CPU_TYPE)));
2227 if (m68ki_illg_callback(REG_IR))
2230 sr = m68ki_init_exception(state);
2232 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2233 if(CPU_TYPE_IS_000(CPU_TYPE))
2235 CPU_INSTR_MODE = INSTRUCTION_NO;
2237 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2239 m68ki_stack_frame_0000(state, REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
2240 m68ki_jump_vector(state, EXCEPTION_ILLEGAL_INSTRUCTION);
2242 /* Use up some clock cycles and undo the instruction's cycles */
2243 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
2246 /* Exception for format errror in RTE */
2247 static inline void m68ki_exception_format_error(m68ki_cpu_core *state)
2249 uint sr = m68ki_init_exception(state);
2250 m68ki_stack_frame_0000(state, REG_PC, sr, EXCEPTION_FORMAT_ERROR);
2251 m68ki_jump_vector(state, EXCEPTION_FORMAT_ERROR);
2253 /* Use up some clock cycles and undo the instruction's cycles */
2254 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
2257 /* Exception for address error */
2258 static inline void m68ki_exception_address_error(m68ki_cpu_core *state)
2260 uint32 sr = m68ki_init_exception(state);
2262 /* If we were processing a bus error, address error, or reset,
2263 * this is a catastrophic failure.
2266 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET_WSF)
2268 m68k_read_memory_8(0x00ffff01);
2269 CPU_STOPPED = STOP_LEVEL_HALT;
2273 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET_WSF;
2275 if (CPU_TYPE_IS_000(CPU_TYPE))
2277 /* Note: This is implemented for 68000 only! */
2278 m68ki_stack_frame_buserr(state, sr);
2280 else if (CPU_TYPE_IS_010(CPU_TYPE))
2282 /* only the 68010 throws this unique type-1000 frame */
2283 m68ki_stack_frame_1000(state, REG_PPC, sr, EXCEPTION_BUS_ERROR);
2285 else if (state->mmu_tmp_buserror_address == REG_PPC)
2287 m68ki_stack_frame_1010(state, sr, EXCEPTION_BUS_ERROR, REG_PPC, state->mmu_tmp_buserror_address);
2291 m68ki_stack_frame_1011(state, sr, EXCEPTION_BUS_ERROR, REG_PPC, state->mmu_tmp_buserror_address);
2294 m68ki_jump_vector(state, EXCEPTION_ADDRESS_ERROR);
2296 state->run_mode = RUN_MODE_BERR_AERR_RESET;
2298 /* Use up some clock cycles. Note that we don't need to undo the
2299 instruction's cycles here as we've longjmp:ed directly from the
2300 instruction handler without passing the part of the excecute loop
2301 that deducts instruction cycles */
2302 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR]);
2306 /* Service an interrupt request and start exception processing */
2307 static inline void m68ki_exception_interrupt(m68ki_cpu_core *state, uint int_level)
2313 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2314 if(CPU_TYPE_IS_000(CPU_TYPE))
2316 CPU_INSTR_MODE = INSTRUCTION_NO;
2318 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2320 /* Turn off the stopped state */
2321 CPU_STOPPED &= ~STOP_LEVEL_STOP;
2323 /* If we are halted, don't do anything */
2327 /* Acknowledge the interrupt */
2328 vector = m68ki_int_ack(int_level);
2330 /* Get the interrupt vector */
2331 if(vector == M68K_INT_ACK_AUTOVECTOR)
2332 /* Use the autovectors. This is the most commonly used implementation */
2333 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
2334 else if(vector == M68K_INT_ACK_SPURIOUS)
2335 /* Called if no devices respond to the interrupt acknowledge */
2336 vector = EXCEPTION_SPURIOUS_INTERRUPT;
2337 else if(vector > 255)
2339 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
2340 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
2344 /* Start exception processing */
2345 sr = m68ki_init_exception(state);
2347 /* Set the interrupt mask to the level of the one being serviced */
2348 FLAG_INT_MASK = int_level<<8;
2350 /* Get the new PC */
2351 new_pc = m68ki_read_data_32(state, (vector << 2) + REG_VBR);
2353 /* If vector is uninitialized, call the uninitialized interrupt vector */
2355 new_pc = m68ki_read_data_32(state, (EXCEPTION_UNINITIALIZED_INTERRUPT << 2) + REG_VBR);
2357 /* Generate a stack frame */
2358 m68ki_stack_frame_0000(state, REG_PC, sr, vector);
2359 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
2361 /* Create throwaway frame */
2362 m68ki_set_sm_flag(state, FLAG_S); /* clear M */
2363 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
2364 m68ki_stack_frame_0001(state, REG_PC, sr, vector);
2367 m68ki_jump(state, new_pc);
2369 /* Defer cycle counting until later */
2370 USE_CYCLES(CYC_EXCEPTION[vector]);
2372 #if !M68K_EMULATE_INT_ACK
2373 /* Automatically clear IRQ if we are not using an acknowledge scheme */
2375 #endif /* M68K_EMULATE_INT_ACK */
2379 /* ASG: Check for interrupts */
2380 static inline void m68ki_check_interrupts(m68ki_cpu_core *state)
2382 if(state->nmi_pending)
2384 state->nmi_pending = FALSE;
2385 m68ki_exception_interrupt(state, 7);
2387 else if(CPU_INT_LEVEL > FLAG_INT_MASK)
2388 m68ki_exception_interrupt(state, CPU_INT_LEVEL >> 8);
2393 /* ======================================================================== */
2394 /* ============================== END OF FILE ============================= */
2395 /* ======================================================================== */
2401 #endif /* M68KCPU__HEADER */